JPH0430548A - Semiconductor device, and test method - Google Patents

Abstract

PURPOSE:To enable inspection of the state of device isolation of chips after dicing by providing monitor sections for monitoring device isolation, each of which is surrounded by an isolation film, both sides of which electrodes are provided. CONSTITUTION:At lease one insulating film 13 for a chip monitor section is formed to surround a chip area, and inner electrodes 14 and outer electrodes 15 are provided inside and outside the insulating film 13. This arrangement forms a monitor section. For example, four or five monitor sections are provided on a chip, and the inner electrodes are interconnected by a wiring 17 to measure a plurality of monitor sections.

Description

[Detailed Description of the Invention] [Summary] 5ol (Silicon On In5ulator)
Regarding inspection methods for structural semiconductor devices and element isolation.

The object of the present invention is to provide a structure and an inspection method for a semiconductor device, which allows non-destructive inspection of the state of element isolation in a wafer state, and also enables observation and confirmation of the element isolation state after cutting into chips.

1) A monitor for inspecting the state of element isolation in a semiconductor device in which an element formation layer formed on a support substrate via an insulating layer is electrically isolated from other element formation layers by an element isolation insulating film. The monitor includes a region surrounded by a monitoring isolation insulating film formed in the element forming layer, and has electrodes connected to the element forming layer inside and outside the monitoring isolation insulating film. Configure.

2) The device is configured to measure current conduction between electrodes respectively connected to the inner and outer element formation layers of the monitoring isolation insulating film.

3) A semiconductor device in which an element formation layer formed on a supporting substrate with an insulating layer interposed therebetween is electrically isolated by an element bone@insulating film, and a device for cross-sectional observation is provided on the element formation layer at the periphery of the substrate. The configuration is such that an isolation insulating film is formed.

4) The cross section of the isolation insulating film for cross-section observation is observed to confirm that the isolation insulating film for cross-section observation is connected to the insulating layer.

[Industrial application field]

The present invention relates to a semiconductor device having an SOI structure and a method for inspecting element isolation.

[Conventional technology]

In a semiconductor device formed on an SO1 substrate, elements are isolated by contact between an element isolation insulating film and an insulating layer having a 501 structure.

The effects include improved radiation resistance, prevention of latch-up phenomena, and immunity to electrical fluctuations such as noise.

However, if the thickness of the element formation layer varies.

Complete separation of elements becomes impossible, and the above advantages cannot be obtained.

Furthermore, if there are parts that are completely separated and parts that are not completely separated within a single chip, the characteristics of each element will vary and the characteristics of the entire circuit will become unstable.

There was a problem that sufficient functions were not realized.

Therefore, it is desirable to confirm whether element isolation is complete within each chip, and in particular, a non-destructive and simple inspection method is required in the wafer state.

FIGS. 3A and 3B are cross-sectional views illustrating the element isolation state of the SOI structure.

In the figure, 1 is a support substrate, 2 is an insulating layer constituting the SOT structure, 3 is an element formation layer, and 4 is an isolation insulating film.

5 is a gate insulating film, 6 is a gate, and 7.8 is a source/drain region.

FIG. 3(a) shows a state in which adjacent element regions are completely separated by the isolation insulating film 4, and FIG. Shows complete condition.

[Problem to be solved by the invention]

The present invention provides a semiconductor device structure and an inspection method that can non-destructively inspect the element isolation state of each chip in a wafer state;
Another object of the present invention is to provide a structure and an inspection method for a semiconductor device that allows the state of isolation of elements to be observed and confirmed after cutting into chips.

[Means to solve the problem]

What is the solution to the above problem?

1) A monitor for inspecting the state of element isolation in a semiconductor device in which an element formation layer formed on a support substrate via an insulating layer is electrically isolated from other element formation layers by an element isolation insulating film. , the monitor includes a region surrounded by a monitoring isolation insulating film formed in the element forming layer, and has electrodes connected to the element forming layer inside and outside the monitoring isolation insulating film, respectively. equipment or.

2) The method for testing a semiconductor device as described in 1) above, in which conduction of current is measured between electrodes connected to the inner and outer element formation layers of the monitoring isolation insulating film, or 3) the method of testing a semiconductor device on a supporting substrate via an insulating layer. A semiconductor device in which an element formation layer formed by a process is electrically isolated by an element isolation insulating film, and an isolation insulating film for cross-sectional observation is formed on the element formation layer at the edge of the substrate Ii1. or 4) achieved by the semiconductor device inspection method described in 3) above, which comprises observing the cross section of the isolation insulating film for cross-sectional observation and confirming that the isolation insulating film for cross-sectional observation is connected to the insulating layer. Ru.

[Effect]

In the present invention, a region surrounded by a monitoring device isolation insulating film is provided in the chip, and electrodes are provided on the chip surface inside and outside the region to check the conduction of current, thereby making it possible to inspect the isolation state. It is.

That is, this method utilizes the fact that if there is complete separation, there is no conduction, but if one separation is incomplete, there is conduction.

In addition, in the present invention, an element isolation insulating film is formed in an island shape or a linear shape around the chip, and after cutting into chips, the cross section of the element isolation insulating film is observed with an SEM (scanning electron microscope), etc., and the element isolation insulating film is This makes it possible to confirm whether the film and the insulating layer of the Sol structure are in complete contact.

〔Example〕

FIGS. 1(a) to 1(h) are plan views illustrating various embodiments of the first and second inventions.

In the figure, 11 is a chip, 12 is a region surrounded by a monitoring device isolation insulating film, 13 is a monitoring isolation insulating film formed in a closed linear shape, and 14.15 is an electrode ( (at least one is in contact with the substrate), and 16 is an isolation insulating film surrounding the element region.

17 is wiring.

In FIG. 1 (al), a monitoring isolation insulating film 13 is formed so as to surround the entire element region, and electrodes 14 and 15 are provided inside and outside the monitoring isolation insulating film 13.

In FIG. 1 (bl), an isolation region surrounding the element region is provided, a monitoring isolation insulating film 13 is formed on the outside of the isolation region, and electrodes 14 and 15 are provided inside and outside the isolation region.

Figure 1 (C1, at least 1
Two monitoring isolation insulating films 13 are formed, and electrodes 14 and 15 are provided inside and outside of each of them to constitute a monitor.

Figure 1(d) shows four monitors on the chip and Figure 1(e)
) is an example in which five monitors are formed.

Figure 1 (fl, (gl is the wiring 1 for the inner electrode of the monitor)
7 to facilitate measurements on multiple monitors.

In FIG. 1(h), the entire element region is covered with an isolation insulating film 16.
In this example, four monitors are placed outside of the box.

The wiring 17 may be eliminated so that each monitor can be measured separately.

Figures 2 fa) to fhl are plan views illustrating various embodiments of the invention No. 3.4.

In the figure, 11 is a chip, and 18 is an isolation insulating film for cross-sectional observation.

FIG. 2(a) shows an example in which a linear isolation insulating film 18 for cross-sectional observation is formed along one side of the chip.

Figure 2 (bl is an L-shaped example, Figure 2 (C) is a U-shaped example, and Figure 2 +d+ is an example in which the isolation insulating film 18 for cross-sectional observation is formed in an open-shape shape in contact with the periphery of the chip. be.

The isolation insulating film 18 for cross-sectional observation is formed on the corner of the chip in FIG. 2(e), on a part of the − side in FIG. This is an example.

Figure 2 (h) is an example of combining (a) and (el),
In addition, the combinations shown in FIGS. 2(al to (C)) and 2(e) to (phantom) are possible.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to non-destructively inspect the element separation state of each 1,000 knobs in the wafer state, and it has become possible to observe and confirm the element isolation state after cutting into chips.

As a result, the number of inspection steps could be shortened and the reliability of the inspection could be improved.

[Brief explanation of drawings]

FIGS. 1(a) to 1(h) are plan views illustrating various embodiments of the first invention. FIG. 2 (al to hl are plan views explaining various embodiments of the second invention. FIGS. 3(a) and (g)) are cross-sectional views explaining the element isolation state of the Sol structure. In the figure. 1 is a support substrate. 2 is an insulating layer 3 that constitutes the SOR structure is an element formation layer. 4 is an isolation insulating film. 5 is a gate insulating film 6 is a gate. 7.8 is a source/drain region 11 as a chip Reference numeral 12 indicates an isolation insulating film for monitoring, and a region 13 is an isolation insulating film for monitoring. Reference numerals 14 and 15 indicate electrodes formed on the chip surface. Reference numeral 16 indicates an isolation insulating film 17 surrounding the element region, and wiring 18 is for cross-sectional observation. Isolation insulating film (C) (cl) (e) Ge) (h) Tenko example n Senmenguchi (7) 'PJ1f￥1 1. #Boiled, F Hireshiki Chiro) 帛 #Rin state, theory September 1゛ Ko 1 Junri collection 31 yen

Claims (1)

[Scope of Claims] 1) A semiconductor device in which an element formation layer formed on a support substrate with an insulating layer interposed therebetween is electrically isolated from other element formation layers by an element isolation insulating film, comprising: A monitor for inspecting a separation state is provided, and the monitor includes a region surrounded by a monitoring isolation insulating film formed on the element forming layer, and includes a region surrounded by a monitoring isolation insulating film formed on the monitoring isolation insulating film and on the element forming layer outside the monitoring isolation insulating film. A semiconductor device characterized by having electrodes to be connected. 2) The method for testing a semiconductor device according to claim 1, further comprising measuring current conduction between electrodes connected to the inner and outer element formation layers of the monitoring isolation insulating film, respectively. 3) A semiconductor device in which an element formation layer formed on a supporting substrate with an insulating layer interposed therebetween is electrically isolated by an element isolation insulating film, wherein an isolation layer for cross-sectional observation is provided in the element formation layer at the periphery of the substrate. A semiconductor device characterized in that an insulating film is formed. 4) The method for inspecting a semiconductor device according to claim 3, further comprising: observing a cross section of the isolation insulating film for cross-sectional observation to confirm that the isolation insulating film for cross-sectional observation is connected to the insulating layer. .