JPH04304453A - Reticle and exposing method - Google Patents

Abstract

PURPOSE:To reduce the exchange of a reticle and to shorten the time required for positioning or inspection by providing a two-layer or two or more kinds of chip areas in one reticle. CONSTITUTION:The chip areas of (x) and (y) layers of forms A and B are provided on one reticle 1. In the case of exposing the chip area of the (x) layer of the form A, the light shielding band 2 of a stepper is set in the area of Ax so that the areas Ay, Bx, and By being the areas outside the light shielding band may not be exposed. The light shielding band 2 is constituted by movably arranging four aluminum plates in the respective areas of the reticle 1 as one part of the stepper. Thus, only the optional chip is exposed without moving and repositioning the reticle 1. The respective chip areas Ax-By are arranged at the positions separate from the light shielding band 2 by as much as the stopping accuracy of the light shielding band 2 which shields the adjacent area from light. Thus, the number of reticles is reduced, the control of the reticle is facilitated, and the processing time required for positioning or the inspection of the reticle is shortened.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reticle and an exposure method used in the manufacture of semiconductor devices. L.S.
Regarding the exposure step of the I-wafer process, in recent years there has been a demand for reducing the cost of LSI and improving production efficiency. For this reason, even in the exposure process in which a device pattern is exposed using a reticle, there is a need to shorten the number of steps and reduce the number of management items.

0002

[Prior Art] Conventionally, a reticle having one layer and one type of chip area in one reticle is set on a stepper, and a wafer or full-size mask is exposed to light to form an element pattern of that layer on a wafer, etc. After baking, the reticle is replaced with a reticle having the element pattern of the next layer, the reticle is set on a stepper, and the same process is performed. Also, after exposing one type of device pattern, when exposing another type of device pattern, the reticle is replaced in the same way, and the next reticle is set on the stepper and exposed.

A conventional reticle is shown in FIG. In the figure, 1 is a reticle, and 2 is a light-shielding band provided outside the reticle. The light-shielding band is made of a surface-treated aluminum plate and serves to block light. In this reticle 1, the same type A
, four chip patterns of the same layer type x are exposed simultaneously. Further, a indicates the chip size. However, when a chip area of a different layer y and a different type B is to be exposed next time, another reticle 2 (Fig. 4) having a chip area of a different layer and a different type is prepared, the reticle is replaced, and then the stepper He then inspected the reticle again.

0004

[Problems to be Solved by the Invention] Therefore, in ASICs and the like that need to manufacture small lots and a wide variety of products, reticle exchange, reticle repositioning, and reticle inspection occupy a large proportion of the time in the exposure process, and the throughput of the exposure equipment is reduced. This caused the problem of dropping the . Furthermore, the number of reticles increases depending on the product type, making it difficult to manage reticles such as confirming the location of necessary reticles and just-in-time supply to exposure manufacturing equipment.

[0005]

[Means for Solving the Problems] A reticle according to the present invention includes element patterns of two or more layers of a multilayer semiconductor device and/or one or two layers of two or more types of semiconductor devices in one reticle.
It is characterized by having an element pattern of more than one layer. Further, the exposure method of the present invention is characterized in that the reticle is set on a stepper, positioned, and only the element pattern of one or more arbitrary chips is exposed using a movable light-shielding band.

FIG. 1 is a diagram showing the principle of a reticle according to the present invention. FIG. 1 shows a reticle 1 having chip regions of x and y layers of types A and B, respectively. In addition, when exposing the chip area of Ax, if the stepper's light-shielding band 2 is set in the Ax area as shown in FIG.
y, Bx, By are not exposed. The light-shielding band 2 is constituted by four aluminum plates or the like as part of a stepper movable in each region of Ax, Ay, Bx, and By of the reticle. In this way, only another arbitrary chip can be exposed without moving or repositioning the reticle. Each of the chip areas Ax, Ay, Bx, and By is arranged at a position separated from the light-shielding band by the stopping precision of the light-shielding band that blocks light from the adjacent chip area, for example, 1 mm or more. In order to set the order of the shading bands of the stepper, a special file in which the shading order is written is prepared in advance, and when that file is selected, the shading order is automatically set.

[0007]

[Operation] In the present invention, as shown in FIG. 2, by preparing a reticle in which chips of a plurality of different types and layers are arranged, different chip areas arranged on one reticle can be
By changing the reticle, positioning, and inspecting the reticle multiple times, it is possible to perform arbitrary exposure simply by polarizing the light shielding zone position of the stepper. The present invention will be explained below with reference to Examples.

[0008]

Embodiment FIG. 3 is a diagram showing an embodiment of a reticle according to the present invention. A small chip product with a chip size of 2 mm x 2 mm has an element isolation layer E, a gate formation layer F, an electrode format layer G, and a wiring format layer H4 layer of 2 m in one chrome plate reticle 10.
Reticles 10 arranged at intervals of m (dimensions on the wafer)
It is. The effective exposure area of a stepper is usually 15mm x
Since it has an area of 15 mm, all of E, F, G, and H can be printed. Layers that are not shaded by the shade band are set at positions E, F, G, and H to limit the printing area. The open area set by the shading zone is 10mm x 1 for each layer.
Since it is larger than 0 mm, the area where the pattern is not placed is Cr.
Leave it so that no light passes through. Although FIG. 3 shows an example in which four types of layers are arranged at four locations, four or more layers may be inserted as long as they can be efficiently arranged within the effective exposure area of the stepper. In this example, we first spent about an hour replacing the reticle, positioning, and inspecting the reticle.
After that, E is exposed to light, and the etching and oxidation for forming the device isolation zone are completed. Next, a light-shielding zone is set, the wafer is moved, and gate formation (I) is performed sequentially. Exposure for formation (G) and wiring layer formation (H) is performed.

[0009]

[Effects of the Invention] As explained above, according to the present invention, 1
Two layers or two or more types of chip regions are arranged in the reticle. Furthermore, once this is set on a stepper, any desired chip area can be exposed. As a result, according to the present invention, the following effects are achieved. (a) Reticle management becomes easier due to a reduction in the number of reticles, so reticle waiting time is shortened and troubles due to incorrect reticles are reduced. (b) The number of times the reticle is replaced can be reduced, positioning, reticle inspection, and processing time can be shortened, so the throughput of the exposure apparatus can be improved.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a reticle according to the present invention.

FIG. 2 is an explanatory diagram of an exposure method according to the present invention.

FIG. 3 is a diagram showing a reticle according to an example.

FIG. 4 is a diagram showing a conventional reticle.

FIG. 5 is a diagram showing a conventional reticle.

[Explanation of code] 1 Reticle 2. Shading zone 10 Reticle

Claims (2)

[Claims] 1. A reticle comprising, in one reticle, element patterns of two or more layers of a multilayer semiconductor device and/or element patterns of one or more layers of two or more types of semiconductor devices. 2. An exposure method, which comprises setting the reticle according to claim 1 on a stepper, positioning the reticle, and exposing only the element pattern of one or more arbitrary chips using a movable light-shielding band.