JPH04291388A - Fluorescent display device - Google Patents

Fluorescent display device

Info

Publication number
JPH04291388A
JPH04291388A JP8056891A JP8056891A JPH04291388A JP H04291388 A JPH04291388 A JP H04291388A JP 8056891 A JP8056891 A JP 8056891A JP 8056891 A JP8056891 A JP 8056891A JP H04291388 A JPH04291388 A JP H04291388A
Authority
JP
Japan
Prior art keywords
substrate
fluorescent display
display device
field emission
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8056891A
Other languages
Japanese (ja)
Other versions
JPH0715612B2 (en
Inventor
Hisashi Nakada
久士 中田
Shigeo Ito
茂生 伊藤
Teruo Watanabe
渡辺 照男
Kazuyoshi Otsu
大津 和佳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Futaba Corp
Original Assignee
Futaba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Futaba Corp filed Critical Futaba Corp
Priority to JP3080568A priority Critical patent/JPH0715612B2/en
Publication of JPH04291388A publication Critical patent/JPH04291388A/en
Publication of JPH0715612B2 publication Critical patent/JPH0715612B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Vessels, Lead-In Wires, Accessory Apparatuses For Cathode-Ray Tubes (AREA)
  • Cathode-Ray Tubes And Fluorescent Screens For Display (AREA)

Abstract

PURPOSE:To form a bump for IC packaging which is durable to a heat treatment process on the substrate of the fluorescent display device which has an electric field radiation type cathode. CONSTITUTION:The electric field radiation type cathode 11 formed on the substrate is covered with a container part 15 and faces a display part 19. On the substrate 2 outside an enclosure 16, the bump 12 where an IC 21 is packaged is formed of the same material in the same process with the emitter 10 of the electric field radiation cathode 11.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、電界放出用陰極を電子
源とし、駆動用ICの実装用端子を備えた蛍光表示装置
に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fluorescent display device which uses a field emission cathode as an electron source and is provided with terminals for mounting a driving IC.

【0002】0002

【従来の技術】従来、基板上にICを実装する方法とし
ては、次の■〜■の方法が知られている。 ■ICを基板上に接着しておき、ICの電極と基板上の
電極をボンディングワイヤで接続するワイヤボンディン
グ方式。 ■ベースフィルム上に銅の配線パターンと接続用のフィ
ンガーリードを設け、ICのバンプにフィンガーリード
を熱圧着するTAB(Tape Automated 
Bonding)方式。 ■ICの端子に半田バンプを形成して基板上に載置し、
リフロー炉を通すことによって半田バンプを溶融させて
実装するフリップチップボンディング方式。 ■ICにAu等のバンプを形成しておき、導電性接着剤
で基板の電極上に実装する方法。 ■ICと基板に対して加圧し、その状態で光硬化性樹脂
を硬化させてICを固定し、IC端子と電極との接続を
保持するマイクロバンプ方式。
2. Description of the Related Art Conventionally, the following methods (1) to (4) are known as methods for mounting ICs on a substrate. ■Wire bonding method, in which the IC is glued onto the substrate and the electrodes of the IC and the electrodes on the substrate are connected using bonding wires. ■ TAB (Tape Automated
Bonding method. ■Form solder bumps on the IC terminals and place them on the board,
A flip chip bonding method in which the solder bumps are melted and mounted by passing them through a reflow oven. ■A method in which bumps such as Au are formed on the IC and then mounted on the electrodes of the board using conductive adhesive. ■Microbump method that applies pressure to the IC and substrate, hardens the photocurable resin under that condition, fixes the IC, and maintains the connection between the IC terminal and the electrode.

【0003】0003

【発明が解決しようとする課題】ところで、蛍光表示装
置においては、構成上の都合等により、蛍光表示装置の
外囲器を構成する基板上に駆動用のICを実装し、該基
板上の配線とICを直接接続したい場合がある。蛍光表
示装置では、外囲器を構成している基板上の電極は一般
にAl・Ag・ITOなどから形成されているが、Al
は表面が酸化しやすく、絶縁膜が形成されやすい。また
、ITOは表面抵抗が高い。さらにAgはマイグレーシ
ョンを起しやすく、配線どうしの絶縁を保持できない。
[Problems to be Solved by the Invention] However, in fluorescent display devices, due to structural reasons, etc., a driving IC is mounted on a substrate constituting the envelope of the fluorescent display device, and the wiring on the substrate is There are cases where you want to connect the IC directly. In fluorescent display devices, the electrodes on the substrate constituting the envelope are generally made of Al, Ag, ITO, etc.
The surface is easily oxidized and an insulating film is easily formed. Furthermore, ITO has a high surface resistance. Furthermore, Ag is prone to migration and cannot maintain insulation between wirings.

【0004】従って、前述した■〜■の方法を用いて蛍
光表示装置の基板上にICを実装する場合には、前述し
たような材料から成る基板上の電極は表面をめっき処理
しなければならない。例えば、前記電極にAuの単独層
を形成したり、Ni層形成後にAu層を形成する等して
、電極とIC端子との接続・導通が確実となるようにし
なければならない。
[0004] Therefore, when an IC is mounted on a substrate of a fluorescent display device using the above-mentioned methods ① to ②, the surface of the electrodes on the substrate made of the above-mentioned materials must be plated. . For example, it is necessary to ensure the connection and conduction between the electrode and the IC terminal by forming a single layer of Au on the electrode or forming an Au layer after forming the Ni layer.

【0005】しかしながら、めっき層の電極に対する付
着強度はそれほど大きくはない。そして、蛍光表示装置
は、製造工程途中に必ず熱処理の工程がある。従って、
この熱処理工程の前に、基板の電極を前述したようにめ
っき処理すると、めっき層は熱処理工程で熱膨張係数の
差によって力を受け、界面から剥離しやすくなってしま
う。
However, the adhesion strength of the plating layer to the electrode is not so high. Fluorescent display devices always include a heat treatment process during the manufacturing process. Therefore,
If the electrodes of the substrate are plated as described above before this heat treatment step, the plating layer will be subjected to force due to the difference in thermal expansion coefficient during the heat treatment step, and will easily peel off from the interface.

【0006】また、蛍光表示装置が完成した後に前記め
っき処理を行なうと、熱処理工程を経た封着ガラスの鉛
成分がめっき液に反応し、封着ガラスが溶融してしまう
という問題があった。
[0006] Furthermore, when the plating treatment is performed after the fluorescent display device is completed, there is a problem in that the lead component of the sealing glass that has undergone the heat treatment process reacts with the plating solution, causing the sealing glass to melt.

【0007】以上のように、蛍光表示管では、基板の配
線にめっき処理をすることが困難で、前述した■〜■の
方法では基板上にICを実装できないという問題があっ
た。
As described above, in fluorescent display tubes, it is difficult to perform plating on the wiring on the substrate, and there is a problem that ICs cannot be mounted on the substrate using the methods (1) to (4) described above.

【0008】[0008]

【課題を解決するための手段】前記の問題を解決するた
め、本発明の蛍光表示装置は、基板と、前記基板上に形
成される電界放出形陰極と、前記電界放出形陰極に相対
する表示部を備えて前記基板に設けられる容器部と、前
記電界放出形陰極の電極と同一材料で前記基板上に形成
されたIC実装用のバンプとを具備している。
Means for Solving the Problems In order to solve the above problems, a fluorescent display device of the present invention includes a substrate, a field emission type cathode formed on the substrate, and a display facing the field emission type cathode. The device includes a container portion provided on the substrate, and a bump for IC mounting formed on the substrate using the same material as the electrode of the field emission type cathode.

【0009】[0009]

【作用】基板上に電界放出形陰極を形成する際に、電界
放出形陰極の電極と同一材料で同時にIC実装用のバン
プを形成することができる。
[Operation] When forming a field emission type cathode on a substrate, bumps for IC mounting can be simultaneously formed using the same material as the electrode of the field emission type cathode.

【0010】0010

【実施例】本発明の一実施例である蛍光表示装置1の構
成を、図1〜図7に示した製造工程に従って説明する。 本実施例の蛍光表示装置1は、コーン形状のエミッタ1
0を有するSpindt型の電界放出形陰極11を電子
源としている。そして外囲器16の一部を成す基板2上
にエミッタ10と同一材料のバンプ12が設けられ、外
囲器16外の基板2上にIC21を実装できるようにな
っている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of a fluorescent display device 1 which is an embodiment of the present invention will be explained according to the manufacturing steps shown in FIGS. 1 to 7. The fluorescent display device 1 of this embodiment has a cone-shaped emitter 1
A Spindt type field emission type cathode 11 having 0 is used as an electron source. Bumps 12 made of the same material as the emitter 10 are provided on the substrate 2 forming a part of the envelope 16, so that the IC 21 can be mounted on the substrate 2 outside the envelope 16.

【0011】まず、図1に示すように、ガラス又はシリ
コン等からなる基板2の上面に、AlやITO等で配線
導体3を形成する。この配線導体3には、後述する電界
放出形陰極11のエミッタ10と駆動用のIC21が接
続される。そして、この配線導体3の上に、IC21が
実装される部分を除いて抵抗層4を形成する。
First, as shown in FIG. 1, a wiring conductor 3 made of Al, ITO, etc. is formed on the upper surface of a substrate 2 made of glass, silicon, or the like. The wiring conductor 3 is connected to an emitter 10 of a field emission type cathode 11 and a driving IC 21, which will be described later. Then, a resistive layer 4 is formed on this wiring conductor 3 except for the portion where the IC 21 is mounted.

【0012】図2に示すように、前記抵抗層4、配線導
体3及び基板2を覆って絶縁層5を形成する。
As shown in FIG. 2, an insulating layer 5 is formed covering the resistance layer 4, wiring conductor 3, and substrate 2. As shown in FIG.

【0013】図3に示すように、前記抵抗層4に対応す
る前記絶縁層5の上に、電界放出形陰極11のゲート8
となるゲート層6をNbの蒸着によって形成する。
As shown in FIG. 3, a gate 8 of a field emission type cathode 11 is formed on the insulating layer 5 corresponding to the resistive layer 4.
A gate layer 6 is formed by vapor deposition of Nb.

【0014】図4に示すように、ゲート8の開口部とバ
ンプ12の形成部分を除いた領域を覆うようにレジスト
層7を形成する。このレジスト層7は、前記ゲート層6
及び前記絶縁層5の上面にレジストを一面に塗布し、所
定パターンの露光を行なって現像することにより得られ
る。
As shown in FIG. 4, a resist layer 7 is formed to cover the area except for the opening of the gate 8 and the area where the bumps 12 are to be formed. This resist layer 7 includes the gate layer 6
It is obtained by applying a resist over the entire upper surface of the insulating layer 5, exposing it to light in a predetermined pattern, and developing it.

【0015】前記レジスト層7に設けられた所定パター
ンの開口部を介して、前記絶縁層5及びゲート層6を選
択的にエッチングする。これによって開口部を有するゲ
ート8が形成され、IC実装部の配線導体3が露出する
。エッチング終了後、前記レジスト層7を除去し、図5
に示すように、絶縁層5及びゲート8の上面のみにAl
等からなる剥離層9を形成する。剥離層9の形成は、例
えば基板2に対して斜め上方からAlを蒸着させる方法
によって行ない、ゲート8内や露出した配線導体3にA
lが付着しないようにする。
The insulating layer 5 and gate layer 6 are selectively etched through openings in a predetermined pattern provided in the resist layer 7. As a result, a gate 8 having an opening is formed, and the wiring conductor 3 of the IC mounting portion is exposed. After etching, the resist layer 7 is removed and
As shown in FIG.
A peeling layer 9 consisting of the following is formed. The peeling layer 9 is formed, for example, by a method of vapor depositing Al from diagonally above the substrate 2, and Al is deposited inside the gate 8 and on the exposed wiring conductor 3.
Make sure that l does not get attached.

【0016】図6に示すように、基板2の全面にMoを
蒸着させ、ゲート8内の抵抗層4上にコーン形状のエミ
ッタ10を形成して電界放出形陰極11を構成するとと
もに、露出した配線導体3上にバンプ12を形成する。 このようにMoの蒸着によってエミッタ10とバンプ1
2を同一工程で形成した後、前記剥離層9上に蒸着した
不要なMoを剥離層9と共に除去する。
As shown in FIG. 6, Mo is deposited on the entire surface of the substrate 2, and a cone-shaped emitter 10 is formed on the resistance layer 4 in the gate 8 to constitute a field emission type cathode 11. Bumps 12 are formed on the wiring conductor 3. In this way, the emitter 10 and the bump 1 are formed by vapor deposition of Mo.
2 is formed in the same process, unnecessary Mo deposited on the release layer 9 is removed together with the release layer 9.

【0017】図7に示すように、前面板13と側面板1
4からなる容器部15を前記基板2の上面に封着固定し
、前記電界放出形陰極11を内部に収納する箱形の外囲
器16を構成する。前面板13の内面には、透光性のあ
る陽極導体17に蛍光体層18が被着された表示部19
が形成されており、該表示部19は前記電界放出形陰極
11に対面している。
As shown in FIG. 7, the front plate 13 and the side plate 1
4 is sealed and fixed to the upper surface of the substrate 2 to form a box-shaped envelope 16 in which the field emission cathode 11 is housed. On the inner surface of the front panel 13 is a display section 19 in which a phosphor layer 18 is adhered to a translucent anode conductor 17.
is formed, and the display section 19 faces the field emission cathode 11.

【0018】本実施例では、前記バンプ12は外囲器1
6の外にある。このバンプ12に、半田又は導電性接着
材20を介してIC21を実装する。基板2とIC21
の間には樹脂22を封入する。このIC21は、バンプ
12及び配線導体3を介して外囲器16内の電界放出形
陰極11に接続され、電界放出形陰極11に駆動信号を
与えることができる。
In this embodiment, the bump 12 is connected to the envelope 1.
It is outside of 6. An IC 21 is mounted on this bump 12 via solder or a conductive adhesive 20. Board 2 and IC21
A resin 22 is sealed between them. This IC 21 is connected to the field emission type cathode 11 in the envelope 16 via the bump 12 and the wiring conductor 3, and can give a drive signal to the field emission type cathode 11.

【0019】本実施例によれば、電界放出形陰極11の
エミッタ10を形成する工程で、IC21を実装するた
めのバンプ12も同時に形成することができる。従って
、従来のようにIC上の電極と配線を接続するための配
線上のめっき工程を設ける必要がなく、より少い工程で
IC上の電極と接続するための電極を形成できる。また
、バンプ12は蒸着によって成膜されるので、めっきと
比較して膜の付着強度が大きく、蛍光表示装置の製造に
必須の熱処理工程を経ても配線導体3から剥離すること
はない。なお、基板2へのIC21の実装は前述した■
〜■の方法で行なえるが、めっきが不要なので基板2に
封着した容器部15の封着ガラスがめっき液で溶融して
しまうことはない。
According to this embodiment, in the step of forming the emitter 10 of the field emission type cathode 11, the bump 12 for mounting the IC 21 can also be formed at the same time. Therefore, there is no need to provide a plating process on the wiring for connecting the electrodes on the IC and the wiring as in the conventional method, and the electrodes for connecting to the electrodes on the IC can be formed in fewer steps. Further, since the bumps 12 are formed by vapor deposition, the adhesion strength of the film is greater than that of plating, and the bumps 12 will not peel off from the wiring conductor 3 even after undergoing a heat treatment step essential for manufacturing a fluorescent display device. In addition, the mounting of the IC 21 on the board 2 is as described above.
This can be done by the methods of ~ (), but since plating is not required, the sealing glass of the container portion 15 sealed to the substrate 2 will not be melted by the plating solution.

【0020】以上説明した一実施例では、エミッタ10
を形成すると同時に、エミッタ10と同一材料でバンプ
12を形成したが、ゲート層6を形成すると同時に、ゲ
ート8と同一材料でバンプを形成するようにしてもよい
In the embodiment described above, the emitter 10
Although the bumps 12 are formed of the same material as the emitter 10 at the same time as the gate layer 6 is formed, the bumps may be formed of the same material as the gate 8 at the same time as the gate layer 6 is formed.

【0021】また、本実施例では、外囲器16外の基板
2上にバンプ12を設けたが、外囲器16内の基板2上
にバンプを形成して外囲器16内にIC21を収納・実
装するようにしてもよい。さらに電界放出形陰極のタイ
プとしては、エミッタが櫛歯状に形成され、かつゲート
とエミッタが同一平面に形成された構成のものにも適用
できる。
In this embodiment, the bumps 12 are provided on the substrate 2 outside the envelope 16, but the bumps are formed on the substrate 2 inside the envelope 16 and the IC 21 is placed inside the envelope 16. It may be stored and mounted. Further, as a type of field emission cathode, a structure in which the emitter is formed in a comb-like shape and the gate and the emitter are formed on the same plane can also be applied.

【0022】[0022]

【発明の効果】本発明によれば、IC実装用のバンプを
電界放出形陰極の電極と同一材料で基板上に形成するよ
うにしたので、付着強度の大きいバンプを備えた蛍光表
示装置を工程を増やすことなく得るこどができた。
According to the present invention, the bumps for IC mounting are formed on the substrate using the same material as the electrode of the field emission type cathode, so that a fluorescent display device equipped with bumps with high adhesion strength can be manufactured easily during the process. I was able to get a child without having to increase the amount.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例である蛍光表示装置の製造工
程における一工程を示す断面図である。
FIG. 1 is a sectional view showing one step in the manufacturing process of a fluorescent display device according to an embodiment of the present invention.

【図2】本発明の一実施例である蛍光表示装置の製造工
程における一工程を示す断面図である。
FIG. 2 is a cross-sectional view showing one step in the manufacturing process of a fluorescent display device according to an embodiment of the present invention.

【図3】本発明の一実施例である蛍光表示装置の製造工
程における一工程を示す断面図である。
FIG. 3 is a cross-sectional view showing one step in the manufacturing process of a fluorescent display device according to an embodiment of the present invention.

【図4】本発明の一実施例である蛍光表示装置の製造工
程における一工程を示す断面図である。
FIG. 4 is a cross-sectional view showing one step in the manufacturing process of a fluorescent display device according to an embodiment of the present invention.

【図5】本発明の一実施例である蛍光表示装置の製造工
程における一工程を示す断面図である。
FIG. 5 is a cross-sectional view showing one step in the manufacturing process of a fluorescent display device according to an embodiment of the present invention.

【図6】本発明の一実施例である蛍光表示装置の製造工
程における一工程を示す断面図である。
FIG. 6 is a sectional view showing one step in the manufacturing process of a fluorescent display device according to an embodiment of the present invention.

【図7】本発明の一実施例である蛍光表示装置の製造工
程における一工程を示す断面図である。
FIG. 7 is a cross-sectional view showing one step in the manufacturing process of a fluorescent display device according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1…蛍光表示装置、2…基板、8…電界放出形陰極の電
極であるゲート、10…電界放出形陰極の電極であるエ
ミッタ、11…電界放出形陰極、12…バンプ、15…
容器部、19…表示部。
DESCRIPTION OF SYMBOLS 1... Fluorescent display device, 2... Substrate, 8... Gate which is an electrode of a field emission type cathode, 10... Emitter which is an electrode of a field emission type cathode, 11... Field emission type cathode, 12... Bump, 15...
Container section, 19...display section.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  基板と、前記基板上に形成される電界
放出形陰極と、前記電界放出形陰極に相対する表示部を
備えて前記基板に設けられる容器部と、前記電界放出形
陰極の電極と同一材料で前記基板上に形成されたIC実
装用のバンプとを具備する蛍光表示装置。
1. A substrate, a field emission cathode formed on the substrate, a container section provided on the substrate and including a display section facing the field emission cathode, and an electrode of the field emission cathode. and bumps for IC mounting formed on the substrate using the same material.
JP3080568A 1991-03-20 1991-03-20 Fluorescent display Expired - Fee Related JPH0715612B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3080568A JPH0715612B2 (en) 1991-03-20 1991-03-20 Fluorescent display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3080568A JPH0715612B2 (en) 1991-03-20 1991-03-20 Fluorescent display

Publications (2)

Publication Number Publication Date
JPH04291388A true JPH04291388A (en) 1992-10-15
JPH0715612B2 JPH0715612B2 (en) 1995-02-22

Family

ID=13721944

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3080568A Expired - Fee Related JPH0715612B2 (en) 1991-03-20 1991-03-20 Fluorescent display

Country Status (1)

Country Link
JP (1) JPH0715612B2 (en)

Also Published As

Publication number Publication date
JPH0715612B2 (en) 1995-02-22

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