JPH0311565A - Connecting configuration for electrodes - Google Patents

Connecting configuration for electrodes

Info

Publication number
JPH0311565A
JPH0311565A JP1147044A JP14704489A JPH0311565A JP H0311565 A JPH0311565 A JP H0311565A JP 1147044 A JP1147044 A JP 1147044A JP 14704489 A JP14704489 A JP 14704489A JP H0311565 A JPH0311565 A JP H0311565A
Authority
JP
Japan
Prior art keywords
electrode
substrate
electrodes
resin layer
synthetic resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1147044A
Other languages
Japanese (ja)
Inventor
Hiromasa Tsukamoto
弘昌 塚本
Hisashi Shin
新 久司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP1147044A priority Critical patent/JPH0311565A/en
Publication of JPH0311565A publication Critical patent/JPH0311565A/en
Pending legal-status Critical Current

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  • Multi-Conductor Connections (AREA)
  • Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)

Abstract

PURPOSE:To enable electrodes to be joined with no stress accompanied by sealing a pair of the electrodes while liquid metal is intervened between them. CONSTITUTION:An electrode 2 is formed on the substrate 1 of a semi-conductor integrated circuit while being patterned. Another electrode 4 to be connected with the electrode 2 is formed on a substrate 3 made of a material such as ceramics and the like. A film is formed by covering the top of the substrate 3 with a synthetic resin layer 8 while the film is half hardened. An opening 9 is made by a hot etching process at a position corresponding to the electrode 2 of the semi-conductor integrated circuit 1 in the synthetic resin layer 8. A liquid metal 5 is filled in over the electrode 4 exposed out of the opening 9 of the substrate 3. The electrodes 2 and 4 in the substrates 1 and 3 are finally aligned in position while the synthetic resin layer 8 is completely hardened, it is concurrently accelerated that the synthetic resin layer 8 and the electrode 4 are closely adhered to the substrate 3 and a conductor 4a respectively. In this case, the substrates 1 and 3 may be pressed with pressure in the proximity direction in order to improve adhering strength thereon.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、IC(集積回路、IntegratedCi
rcuit)などの半導体素子が形成された集積回路基
板とプリント基板、フレキシブル基板、あるいはセラミ
ック基板などの回路基板とを電気的に接続するなめに好
適に実施される電極の接続構造に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is applied to an IC (integrated circuit).
The present invention relates to an electrode connection structure suitably implemented for electrically connecting an integrated circuit board on which a semiconductor element such as a circuit board (such as an integrated circuit board) is formed, and a circuit board such as a printed circuit board, a flexible board, or a ceramic board.

従来の技術 I Cなどの半導体集積回路基板と、これが実装される
回路基板との各電極の接続においては通常、W B (
1’1ire Dondi+1g)方式、T A B 
(TapeAuLotnaLed Donding)方
式、F (?、 (Flip Chip)方式などが採
られている。近年では実装面積の縮小化、接続時間の短
縮化、接続長の短小化などの点において有利なFC方式
が注目されている。
Conventional technology In the connection of each electrode between a semiconductor integrated circuit board such as an IC and a circuit board on which it is mounted, W B (
1'1ire Dondi+1g) method, T A B
(TapeAuLotnaLedDonding) method, F (?, Flip Chip) method, etc.In recent years, the FC method has been adopted, which is advantageous in terms of reducing the mounting area, shortening the connection time, and shortening the connection length. Attention has been paid.

FC方式とは、ICなとの半導体集積回路基板に半田金
属材料などから成るバユ・プと呼ばれる突起電極を設け
て他方の回路基板と対向させた状態で、この突起電極を
加熱溶融して前記他方の回路基板の電極に接続する構造
である。
The FC method is a semiconductor integrated circuit board such as an IC that is provided with protruding electrodes called bayu-pu made of solder metal material, etc., facing the other circuit board, and the protruding electrodes are heated and melted. This structure connects to the electrode of the other circuit board.

発明が解決しようとする課題 従来のFC方式による側基板間の接続においては、■一
方基板にバリア、メタル層の形成および半田金属材料に
よるバンブを形成する工程と、■他方基板に親半田金属
を形成する工程との2工程が少なくとも必要であり、コ
ス■・高になる。
Problems to be Solved by the Invention In connection between side boards using the conventional FC method, there are two steps: (1) forming a barrier and a metal layer on one board, and forming a bump using a solder metal material, and (2) applying a parent solder metal to the other board. At least two steps including the forming step are required, resulting in high cost.

接6時の接ぎ強度としては、半田金属と親半田金属との
メタラジカル接芹は強固ではあるが、半田金属と親半田
金属の接合による内部応力の発生や、側基板間の膨張率
の差に起因する熱応力による接続部の応力発生のため、
信顆性面で不安定要素が生じていた。
Regarding the bonding strength at the time of contact 6, although the metal radical bonding between the solder metal and the parent solder metal is strong, internal stress is generated due to the bonding between the solder metal and the parent solder metal, and the difference in expansion coefficient between the side substrates. Due to the generation of stress in the connection part due to thermal stress caused by
There was an element of instability in terms of reliability.

本発明σ)目的は、生産性が優れており、しかも信頼性
か向上された電極の接続構造を提供することである。
The object of the present invention σ) is to provide an electrode connection structure with excellent productivity and improved reliability.

課題を解決するための手段 本発明は、接続されるべき一対の電極間に、液状金属を
介在して封止したことを特徴とする電極の接続構造であ
る。
Means for Solving the Problems The present invention is an electrode connection structure characterized in that a pair of electrodes to be connected are sealed with a liquid metal interposed between them.

作  用 本発明に従えば、接続されるべき一対の電極間には、液
状金属が介在され、これによって前記−対の電極が電気
的に導通される。したか−)で、ワイヤーポジディング
接続方法のようなワイヤーポンデイ〉・グ工程の削減、
現状のフリップチッグボンディング接な方法におけるバ
ンブ形成工程の削減ができ、さらにはストレスフリー構
造、すなわち応力の発生がない構造の接きが可能になる
。そのため生産性が向上され、また接きの信頼性が向上
される。
Function According to the present invention, a liquid metal is interposed between a pair of electrodes to be connected, thereby electrically conducting the pair of electrodes. ), reducing wire bonding processes such as wire positive connection methods,
It is possible to reduce the bump forming process in the current flip chip bonding method, and furthermore, it is possible to bond a stress-free structure, that is, a structure in which no stress is generated. Therefore, productivity is improved and contact reliability is also improved.

実施例 第1図は、本発明の一実施例の断面図である。Example FIG. 1 is a sectional view of one embodiment of the present invention.

半導体集積回路などの−・方の基板1に形成されている
、たとえばAN−3iなどの金属材料から成る電極2は
、その半導体集積回路の基板1か搭載されるセラミック
などの材1’E+から成るもう1−)の基板3Fの導体
である電極4とは、液状金属5を介在して電気的に導通
される。この液状金属5は、たとえば水銀などである。
The electrode 2 made of a metal material such as AN-3i, which is formed on the - side substrate 1 of a semiconductor integrated circuit, is made of a material 1'E+, such as ceramic, on which the substrate 1 of the semiconductor integrated circuit is mounted. The electrode 4, which is a conductor of the substrate 3F of the other 1-), is electrically connected via the liquid metal 5. This liquid metal 5 is, for example, mercury.

液状金属5は、電気絶縁性自戒樹脂材料などから成る封
止部材8によって封止される。
The liquid metal 5 is sealed with a sealing member 8 made of an electrically insulating resin material or the like.

第1図に示される電極の接続構造グ)製造手順を第2(
21を参照して述I\る。先ず、第2図(1)で示され
るように半導体4A積回路の基板1上には、電極2がパ
ターン形成されている。セラミックなとの材料から成る
基板3上には、電極2に接続されるべきもう1−)の電
極4が形成されている。この電f!4は、たとえばAN
2 、Ti、Cu、NiT j / Wなどで構成され
てもよい。このような電極4は、エツチングおよび印刷
などによ−)てパターン形成される。電極4は、それと
−木的な導体4aに連なって延びて、配線される。電極
2.4を電気的に接続するために、第2図(2)で示さ
れるように、その基板3上の電極4およびそれに連なる
導体=18、ならびに電極4および導体4εtが形成さ
れていない残余の領域7上に、全面に亘−)て、6成樹
脂M8をコーティングして被覆形成する。この6成樹脂
層8は、熱、紫外線および電子線などによって硬化反応
を生じる6成樹脂材料から成り、スピニング法、スプレ
ー法、およびデイラフ法などによって形成される。こう
して、き成樹脂層8を形成した後、硬化反応を促進させ
る熱、紫外線などを付与していわば半硬化状態とする。
The electrode connection structure shown in FIG.
I\\ with reference to 21. First, as shown in FIG. 2(1), electrodes 2 are patterned on a substrate 1 of a semiconductor 4A multilayer circuit. Another electrode 4 to be connected to the electrode 2 is formed on a substrate 3 made of a ceramic material. This electric f! 4 is, for example, AN
2, Ti, Cu, NiT j /W, etc. Such an electrode 4 is patterned by etching, printing, or the like. The electrode 4 extends and is wired in series with the wooden conductor 4a. In order to electrically connect the electrode 2.4, as shown in FIG. 2 (2), the electrode 4 and the conductor connected thereto = 18 on the substrate 3, and the electrode 4 and the conductor 4εt are not formed. The remaining region 7 is coated with the 6-component resin M8 over the entire surface. This six-component resin layer 8 is made of a six-component resin material that undergoes a curing reaction by heat, ultraviolet rays, electron beams, etc., and is formed by a spinning method, a spray method, a day rough method, or the like. After forming the curing resin layer 8 in this manner, heat, ultraviolet rays, etc. are applied to promote the curing reaction to bring it into a so-called semi-cured state.

その後、第2図(3)て示されるように、ポl−リング
ラフィ、すなわちホトエンチング工程によって半導体回
路基板1の電極2に対応する電極4を参照狩って示すよ
うにして自戒樹脂層8に開口をあけて露出する。
Thereafter, as shown in FIG. 2(3), the electrode 4 corresponding to the electrode 2 of the semiconductor circuit board 1 is opened in the resin layer 8 as shown in FIG. Open and expose.

合成樹脂層8が、熱硬化形ポリイミド樹脂であるときに
は、半硬化状態とするために120〜150 ’Cに加
熱させ、ホl〜レジス■・を介して、アルカリ系液また
4、Jヒドラジン液なとて、開口9を形成して電極4を
露出する。
When the synthetic resin layer 8 is a thermosetting polyimide resin, it is heated to 120 to 150'C to make it into a semi-cured state, and then heated with an alkaline liquid or a J hydrazine liquid through a resistor. Then, an opening 9 is formed to expose the electrode 4.

また、き成樹脂層8が紫外線硬化形会成樹脂、たとえば
シリコン、感光性ポリイミド、または感光性アクリル樹
脂なとであるときには、半硬化状態にするために短時間
だけ紫外線光を照射し、適切なエッチャント液を用いて
開口9を形成して電極4を露出させる。
In addition, when the molded resin layer 8 is an ultraviolet curable resin, such as silicone, photosensitive polyimide, or photosensitive acrylic resin, it may be irradiated with ultraviolet light for a short period of time to bring it into a semi-cured state. An opening 9 is formed using an etchant solution to expose the electrode 4.

そこで、第2図(3)の状態て、基板3の開口9から露
出している電極4上に液状金属6を印刷方式て、あるい
はまた細長いノズルから供給する、いわゆるディスベン
ザ方式で、充填する。
Therefore, in the state shown in FIG. 2(3), the liquid metal 6 is filled onto the electrode 4 exposed through the opening 9 of the substrate 3 by a printing method or by a so-called dispenser method in which it is supplied from an elongated nozzle.

最後に、基板1,3の電fi2.4を位置なぜして、き
成樹脂層8が熱硬化形であるときには、熱を加え、また
紫外線硬化形であるときには、紫外線光を与えて、その
合成樹脂層8を本硬化させるとともに、基板1と6成樹
脂R8との密着を促進させ、また合成樹脂層8ならびに
基板3、電極4および導体4aとの間を密着促進させ、
密着強度を向上する。この密着時に、その密着強度を向
」二するために、基板」、3を相互の近接方向に加圧し
てもよい。、二のようにして、基板1,3とは、機械的
に一体的となり、電極2,4は液状金属5を介して電気
的に接続される。
Finally, position the electric fi 2.4 of the substrates 1 and 3, apply heat if the molded resin layer 8 is a thermosetting type, or apply ultraviolet light if it is an ultraviolet curable type. While fully curing the synthetic resin layer 8, promoting adhesion between the substrate 1 and the six-synthetic resin R8, and promoting adhesion between the synthetic resin layer 8, the substrate 3, the electrode 4, and the conductor 4a,
Improves adhesion strength. At the time of this close contact, the substrates 3 may be pressed in the direction toward each other in order to improve the strength of the close contact. , 2, the substrates 1 and 3 are mechanically integrated, and the electrodes 2 and 4 are electrically connected via the liquid metal 5.

こび)ようなtM成によれは、在来のフリッブヂソプボ
〉ディングの基板と比較し、バンプ作業の工程が不必要
となることと、基板に親半田金属のパターン形成が不要
となることにより、コスト低減か可能となる。さらに、
半田バ〉フ゛作製時に、半田メツキ酸のバンプ形成およ
び集積回路との接6時において、接6部、ずなわぢ電極
2.4間は、応力のないストレスフリーの椙造となるた
め、大幅に信頼性向上を図ることが可能となる。
Compared to the conventional flip-flop board, the tM formation reduces costs by eliminating the need for a bumping process and by eliminating the need to form a parent solder metal pattern on the board. reduction is possible. moreover,
During solder buffer fabrication, during bump formation with solder plating acid and connection to the integrated circuit, the contact area and the gap between the wire electrodes 2 and 4 are made stress-free, so there is no stress. This makes it possible to improve reliability.

6成樹脂層Sに代えてその池の電気絶縁性材料が用いら
れてもよい。
In place of the six synthetic resin layer S, an electrically insulating material may be used.

発明の効果 Lブ」二のように本発明によれば、一対の電極間に液状
金属を介在して封止して、これら一対の電極を電気的に
導通するようにしたので、製造が容易であり、生産性が
1憂れてJ〕す、しかもその電極などに応力か発生ずろ
ことがなく、これによ−)て信頼性が向上される。
Effects of the Invention As described in Section 2, according to the present invention, a liquid metal is interposed between a pair of electrodes to seal them, and the pair of electrodes are electrically conductive, so manufacturing is easy. This reduces productivity, but there is no stress generated in the electrodes, which improves reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の−・実施例の断面図、第2図は第1図
に示される実施例の製造工程を示す断面図である。
FIG. 1 is a cross-sectional view of an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing the manufacturing process of the embodiment shown in FIG.

Claims (1)

【特許請求の範囲】[Claims] 接続されるべき一対の電極間に、液状金属を介在して封
止したことを特徴とする電極の接続構造。
An electrode connection structure characterized in that a pair of electrodes to be connected are sealed with a liquid metal interposed between them.
JP1147044A 1989-06-09 1989-06-09 Connecting configuration for electrodes Pending JPH0311565A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1147044A JPH0311565A (en) 1989-06-09 1989-06-09 Connecting configuration for electrodes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1147044A JPH0311565A (en) 1989-06-09 1989-06-09 Connecting configuration for electrodes

Publications (1)

Publication Number Publication Date
JPH0311565A true JPH0311565A (en) 1991-01-18

Family

ID=15421243

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1147044A Pending JPH0311565A (en) 1989-06-09 1989-06-09 Connecting configuration for electrodes

Country Status (1)

Country Link
JP (1) JPH0311565A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100457062B1 (en) * 2002-07-23 2004-11-12 동아전기부품 주식회사 Blower resister

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100457062B1 (en) * 2002-07-23 2004-11-12 동아전기부품 주식회사 Blower resister

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