JPH04273150A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH04273150A JPH04273150A JP3033266A JP3326691A JPH04273150A JP H04273150 A JPH04273150 A JP H04273150A JP 3033266 A JP3033266 A JP 3033266A JP 3326691 A JP3326691 A JP 3326691A JP H04273150 A JPH04273150 A JP H04273150A
- Authority
- JP
- Japan
- Prior art keywords
- board
- control circuit
- power
- substrate
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 15
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 13
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 13
- 239000000919 ceramic Substances 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims description 40
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims description 2
- 239000004020 conductor Substances 0.000 abstract description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 5
- 239000011889 copper foil Substances 0.000 abstract description 3
- 238000009413 insulation Methods 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000010276 construction Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 241000784732 Lycaena phlaeas Species 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/145—Organic substrates, e.g. plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は、例えばインバータなど
のパワーデバイスを対象とした半導体装置の構成に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure of a semiconductor device intended for power devices such as inverters.
【０００２】0002
【従来の技術】頭記したパワーデバイスは、パワーチッ
プ、およびパワーチップの駆動回路，保護回路を含めた
制御回路を構成する電子部品を基板上に実装し、この組
立体をパッケージ内に納めて構成されている。ここで、
従来実施されている前記半導体装置の構造を図３に示す
。図において、１はアルミ板１ａの上にエポキシ系樹脂
などの絶縁層１ｂを介して導体パターン１ｃ（数十μｍ
厚の銅箔）を形成したアルミ絶縁基板、２はパワー回路
を構成するパワーチップ、３は制御回路を構成する各種
の電子部品（チップ部品）、４はパワーチップ２と導体
パターン１ｃとの間を接続するボンディングワイヤ、５
はパッケージであり、パワーチップ２，電子部品３はア
ルミ絶縁基板１の上に並べて導体パターン１ｃに半田付
け接合されている。[Prior Art] The above-mentioned power device has a power chip and electronic components constituting a control circuit including a drive circuit and a protection circuit for the power chip mounted on a substrate, and this assembly is housed in a package. It is configured. here,
FIG. 3 shows the structure of the conventional semiconductor device. In the figure, 1 is a conductor pattern 1c (several tens of μm
2 is a power chip forming a power circuit; 3 is various electronic components (chip parts) forming a control circuit; 4 is between the power chip 2 and the conductor pattern 1c; bonding wire to connect, 5
is a package in which a power chip 2 and an electronic component 3 are arranged on an aluminum insulating substrate 1 and soldered to a conductor pattern 1c.
【０００３】0003
【発明が解決しようとする課題】ところで、前記の構成
のパワーデバイスに採用したアルミ絶縁基板１は微細な
パターンニングが可能で、かつ安価に入手できる利点が
ある反面、アルミ板１ａと導体パターン１ｃとの間の絶
縁層１ｂに熱伝導率の低い樹脂を使用しているので、該
部での熱抵抗が大きい。したがって、特に大きな熱損失
を発生するパワーチップに対しては放熱性の面で非常に
厳しい条件となり、必然的にパワーチップのディレーテ
ィング使用が必要となってその適用範囲が限られる。こ
のために、パワーデバイスとして所要の通電容量を確保
するには、必要以上に大きな定格容量のパワーチップを
使用する必要があり、結果として製品がコスト高となる
。[Problems to be Solved by the Invention] By the way, the aluminum insulating substrate 1 employed in the power device having the above structure has the advantage of being capable of fine patterning and being available at low cost. Since a resin with low thermal conductivity is used for the insulating layer 1b between the two, the thermal resistance in this part is large. Therefore, particularly for power chips that generate large heat losses, the conditions are extremely severe in terms of heat dissipation, and derating of the power chips is inevitably required, which limits the range of application. Therefore, in order to secure the required current carrying capacity as a power device, it is necessary to use a power chip with a larger rated capacity than necessary, resulting in an increase in the cost of the product.
【０００４】本発明は上記の点にかんがみなされたもの
であり、パワー回路部と制御回路部とで基板の種類を使
い分けることにより、小形な構成で通電容量の大きなパ
ワーデバイスにも十分対応できる半導体装置を提供する
ことを目的とする。The present invention has been made in consideration of the above points, and by using different types of substrates for the power circuit section and the control circuit section, it is possible to create a semiconductor that can be sufficiently adapted to power devices with a large current carrying capacity with a small structure. The purpose is to provide equipment.
【０００５】[0005]
【課題を解決するための手段】上記課題を解決するため
に、本発明の半導体装置においては、基板をパワー回路
用の基板と制御回路用の基板とに分けてパワー回路用基
板にパワーチップ，制御回路用基板に制御回路を構成す
る電子部品をそれぞれ実装し、かつパワー回路用の基板
には熱伝導率の高い基板を採用し、制御回路用の基板に
は微細な導体パターンの形成に適合する基板を採用して
構成するものとする。[Means for Solving the Problems] In order to solve the above problems, in the semiconductor device of the present invention, the substrate is divided into a power circuit board and a control circuit board, and the power chip and control circuit board are separated into a power circuit board and a control circuit board. Each electronic component that makes up the control circuit is mounted on the control circuit board, and a board with high thermal conductivity is used for the power circuit board, and the control circuit board is suitable for forming fine conductor patterns. It shall be constructed using a board that
【０００６】ここで、前記構成のパワーチップを実装し
た基板には銅貼りセラミックス基板を採用し、制御回路
用の電子部品を実装した基板にはアルミ絶縁基板を採用
するのがよい。また、パワーチップを実装した基板と制
御回路用の電子部品を実装した基板を共通な金属ベース
板の上に並べて構成することもできる。[0006] Here, it is preferable to adopt a copper-clad ceramic substrate as the substrate on which the power chip of the above configuration is mounted, and to adopt an aluminum insulating substrate as the substrate on which electronic components for the control circuit are mounted. Alternatively, a substrate on which a power chip is mounted and a substrate on which electronic components for a control circuit are mounted can be arranged side by side on a common metal base plate.
【０００７】[0007]
【作用】上記の構成において、パワー回路用の基板とし
て採用した銅貼りセラミックス基板は熱抵抗が小さく、
該基板に搭載したパワーチップに対して十分高い放熱性
が確保される。一方、アルミ絶縁基板には熱損失が小さ
い制御回路用の電子部品を搭載しているのて基板自身の
熱抵抗が多少大きくても電子部品の特性に悪影響を及ぼ
すおそれはなく、しかもアルミ絶縁基板は微細なパター
ンニングが可能であるので、複雑な制御回路を小形寸法
の基板上に高実装密度で構成することができる。[Function] In the above configuration, the copper-clad ceramic substrate used as the power circuit board has low thermal resistance.
Sufficiently high heat dissipation is ensured for the power chip mounted on the substrate. On the other hand, since aluminum insulated substrates are equipped with electronic components for control circuits with low heat loss, even if the thermal resistance of the substrate itself is somewhat large, there is no risk of adversely affecting the characteristics of the electronic components. Because micropatterning is possible, complex control circuits can be constructed with high packaging density on small-sized substrates.
【０００８】[0008]
【実施例】図１，図２はそれぞれ異なる本発明の実施例
を示すものであり、図３と対応する同一部材には同じ符
号が付してある。まず、図１の構成では、基板がパワー
回路部と制御回路部とで別な種類の基板に分けてあり、
パワー回路用の基板には銅板６の上に重ねた銅貼りセラ
ミックス基板７が、また制御回路用の基板にはアルミ絶
縁基板８が使用されている。ここで、銅貼りセラミック
ス基板７はセラミックス板７ａの上に厚い銅箔の導体パ
ターン７ｂがパターンニングされたものであり、この上
にパワーチップ２が半田付けして実装されている。一方
、アルミ絶縁基板８は、アルミ板８ａの上にエポキシ樹
脂系の絶縁層８ｂを介して薄い銅箔の導体パターン８ｃ
がパターンニングされたものであり、この上に制御回路
を構成する各種電子部品３が半田付けして実装されてい
る。また、銅貼りセラミックス基板７とアルミ絶縁基板
８とは導体パターンが同一面に並ぶよう左右に並置して
接着剤などで接合し、かつ基板７と８にまたがってパワ
ー回路と制御回路との間をボンディングワイヤ９で接続
した上で、この回路組立体をパッケージ５に組み込んで
パワーデバイスを構成している。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIGS. 1 and 2 show different embodiments of the present invention, and the same members corresponding to those in FIG. 3 are given the same reference numerals. First, in the configuration shown in FIG. 1, the board is divided into different types of boards for the power circuit section and the control circuit section.
A copper-clad ceramic substrate 7 stacked on a copper plate 6 is used as a power circuit substrate, and an aluminum insulating substrate 8 is used as a control circuit substrate. Here, the copper-clad ceramic substrate 7 has a thick copper foil conductor pattern 7b patterned on a ceramic plate 7a, and the power chip 2 is soldered and mounted thereon. On the other hand, the aluminum insulating substrate 8 has a thin copper foil conductor pattern 8c on an aluminum plate 8a with an epoxy resin insulating layer 8b interposed therebetween.
is patterned, and various electronic components 3 constituting a control circuit are soldered and mounted thereon. In addition, the copper-clad ceramic substrate 7 and the aluminum insulating substrate 8 are placed side by side on the left and right so that the conductor patterns are on the same surface, and are bonded with adhesive or the like, and the substrates 7 and 8 are straddled between the power circuit and the control circuit. are connected with bonding wires 9, and this circuit assembly is assembled into a package 5 to constitute a power device.
【０００９】図２は図１の応用実施例であり、パワー回
路用の銅貼りセラミックス基板７とセラミックス回路用
のアルミ絶縁基板８が共通な銅板６の上に並べて接合さ
れており、その他の構成は図１と同様である。FIG. 2 shows an applied example of FIG. 1, in which a copper-clad ceramic substrate 7 for a power circuit and an aluminum insulating substrate 8 for a ceramic circuit are bonded side by side on a common copper plate 6, and other configurations are shown. is the same as in FIG.
【００１０】0010
【発明の効果】本発明の半導体装置は、以上説明したよ
うに構成されているので、次記の効果を奏する。すなわ
ち、基板をパワー回路用の基板と制御回路用の基板とに
分けてパワー回路用基板にパワーチップ，制御回路用基
板に制御回路を構成する電子部品をそれぞれ実装し、か
つパワー回路用には熱伝導率の高い基板として銅貼りセ
ラミックス基板を採用し、制御回路用には微細な導体パ
ターンの形成に適合した基板としてアルミ絶縁基板を採
用したことにより、パワーチップに対して十分高い放熱
性を確保しつつ、制御回路を小形寸法の基板上に高実装
密度で構成することが可能となり、小形なモジュールで
通電容量の大きなパワーデバイスにも十分対応可能な半
導体装置を提供することができる。Since the semiconductor device of the present invention is constructed as described above, it achieves the following effects. That is, the board is divided into a power circuit board and a control circuit board, and the power chip is mounted on the power circuit board, and the electronic components that make up the control circuit are mounted on the control circuit board, and the power circuit board is mounted with the electronic components that make up the control circuit. By adopting a copper-clad ceramic substrate as a substrate with high thermal conductivity and an aluminum insulating substrate as a substrate suitable for forming fine conductor patterns for control circuits, we have achieved sufficiently high heat dissipation for the power chip. It becomes possible to configure a control circuit with high packaging density on a small-sized substrate while ensuring the above-mentioned characteristics, and it is possible to provide a semiconductor device that can be used as a small module and sufficiently compatible with a power device with a large current carrying capacity.
【図１】本発明実施例の構成図[Figure 1] Configuration diagram of an embodiment of the present invention
【図２】図１と異なる本発明実施例の構成図[Fig. 2] A configuration diagram of an embodiment of the present invention different from Fig. 1.
【図３】従
来における半導体装置の構成図[Figure 3] Configuration diagram of a conventional semiconductor device
２ パワーチップ ３ 電子部品 ６ 銅板 ７ 銅貼りセラミックス基板 ８ アルミ絶縁基板 2 Power chip ３ Electronic parts 6 Copper plate 7 Copper-clad ceramic substrate 8 Aluminum insulation board
Claims (4)
回路を構成する電子部品を実装してモジュールと成した
半導体装置において、基板をパワー回路用の基板と制御
回路用の基板とに分けてパワー回路用基板にパワーチッ
プ，制御回路用基板に制御回路を構成する電子部品をそ
れぞれ実装し、かつパワー回路用の基板には熱伝導率の
高い基板を採用し、制御回路用の基板には微細な導体パ
ターンの形成に適合する基板を採用したことを特徴とす
る半導体装置。Claim 1: A semiconductor device in which a power chip and electronic components constituting its control circuit are mounted on a board to form a module, in which the board is divided into a power circuit board and a control circuit board. The power chip is mounted on the circuit board, and the electronic components that make up the control circuit are mounted on the control circuit board.The power circuit board uses a board with high thermal conductivity, and the control circuit board uses microscopic A semiconductor device characterized by employing a substrate suitable for forming a conductive pattern.
ワー回路用の基板が銅貼りセラミックス基板であること
を特徴とする半導体装置。2. The semiconductor device according to claim 1, wherein the power circuit substrate is a copper-clad ceramic substrate.
御回路用の基板がアルミ絶縁基板であることを特徴とす
る半導体装置。3. The semiconductor device according to claim 1, wherein the substrate for the control circuit is an aluminum insulating substrate.
ワーチップを実装した基板と制御回路用の電子部品を実
装した基板を共通な金属ベース板の上に並べて取付けた
ことを特徴とする半導体装置。4. The semiconductor device according to claim 1, wherein a substrate on which a power chip is mounted and a substrate on which electronic components for a control circuit are mounted are mounted side by side on a common metal base plate. Device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3033266A JPH04273150A (en) | 1991-02-28 | 1991-02-28 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3033266A JPH04273150A (en) | 1991-02-28 | 1991-02-28 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04273150A true JPH04273150A (en) | 1992-09-29 |
Family
ID=12381722
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3033266A Pending JPH04273150A (en) | 1991-02-28 | 1991-02-28 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04273150A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998010508A1 (en) * | 1996-09-06 | 1998-03-12 | Hitachi, Ltd. | Semiconductor device |
| US5747875A (en) * | 1993-09-08 | 1998-05-05 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor power module with high speed operation and miniaturization |
| US5854740A (en) * | 1995-04-27 | 1998-12-29 | Lg Semicon Co., Ltd. | Electronic circuit board with semiconductor chip mounted thereon, and manufacturing method therefor |
| KR100419051B1 (en) * | 1999-02-25 | 2004-02-19 | 가부시끼가이샤 히다치 세이사꾸쇼 | Semiconductor device |
| US6940164B1 (en) | 2000-08-18 | 2005-09-06 | Mitsubishi Denki Kabushiki Kaisha | Power module |
| WO2015071238A1 (en) * | 2013-11-18 | 2015-05-21 | BSH Hausgeräte GmbH | Device having a power electronics module for supplying an electric load of a household appliance with electrical supply voltage, household appliance, and method for producing such a device |
| JPWO2014064822A1 (en) * | 2012-10-26 | 2016-09-05 | 株式会社日立産機システム | Power semiconductor module and power converter equipped with the same |
| JP2017079268A (en) * | 2015-10-20 | 2017-04-27 | 株式会社豊田自動織機 | Semiconductor device |
-
1991
- 1991-02-28 JP JP3033266A patent/JPH04273150A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5747875A (en) * | 1993-09-08 | 1998-05-05 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor power module with high speed operation and miniaturization |
| DE4418426B4 (en) * | 1993-09-08 | 2007-08-02 | Mitsubishi Denki K.K. | Semiconductor power module and method of manufacturing the semiconductor power module |
| US5854740A (en) * | 1995-04-27 | 1998-12-29 | Lg Semicon Co., Ltd. | Electronic circuit board with semiconductor chip mounted thereon, and manufacturing method therefor |
| WO1998010508A1 (en) * | 1996-09-06 | 1998-03-12 | Hitachi, Ltd. | Semiconductor device |
| KR100419051B1 (en) * | 1999-02-25 | 2004-02-19 | 가부시끼가이샤 히다치 세이사꾸쇼 | Semiconductor device |
| US6940164B1 (en) | 2000-08-18 | 2005-09-06 | Mitsubishi Denki Kabushiki Kaisha | Power module |
| JPWO2014064822A1 (en) * | 2012-10-26 | 2016-09-05 | 株式会社日立産機システム | Power semiconductor module and power converter equipped with the same |
| WO2015071238A1 (en) * | 2013-11-18 | 2015-05-21 | BSH Hausgeräte GmbH | Device having a power electronics module for supplying an electric load of a household appliance with electrical supply voltage, household appliance, and method for producing such a device |
| CN105745751A (en) * | 2013-11-18 | 2016-07-06 | Bsh家用电器有限公司 | Device having a power electronics module for supplying an electric load of a household appliance with electrical supply voltage, household appliance, and method for producing such a device |
| RU2636415C1 (en) * | 2013-11-18 | 2017-11-23 | Бсх Хаусгерете Гмбх | Device with power circuit module for electrical voltage supply for electrical load of household device, household device and method of manufacture of such device |
| CN105745751B (en) * | 2013-11-18 | 2019-03-29 | Bsh家用电器有限公司 | Device, household appliance with power electronics modules and the method for manufacturing the device |
| JP2017079268A (en) * | 2015-10-20 | 2017-04-27 | 株式会社豊田自動織機 | Semiconductor device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6029343A (en) | Insulated surface mount circuit board construction | |
| US4941033A (en) | Semiconductor integrated circuit device | |
| US5616888A (en) | Rigid-flex circuit board having a window for an insulated mounting area | |
| JP2936855B2 (en) | Power semiconductor device | |
| JP2001250911A (en) | Resin-sealed semiconductor device for power | |
| JP5106519B2 (en) | Thermally conductive substrate and electronic component mounting method thereof | |
| JPH033290A (en) | Thermal shunt for electronic circuit assembly and manufacture thereof | |
| JPH07142674A (en) | Power module | |
| JP2848068B2 (en) | Semiconductor device | |
| US5804873A (en) | Heatsink for surface mount device for circuit board mounting | |
| JPH04273150A (en) | Semiconductor device | |
| US6483706B2 (en) | Heat dissipation for electronic components | |
| WO2018168504A1 (en) | Component mounting body and electronic device | |
| JPH03195053A (en) | Inverter device | |
| US5260602A (en) | Hybrid integrated-circuit device having an asymmetrical thermal dissipator | |
| CN111354692A (en) | Power heat dissipation device | |
| JPH05259373A (en) | Power semiconductor device | |
| JPH07297518A (en) | Mounting structure of electronic part | |
| JP3036236B2 (en) | Circuit board | |
| JP2879503B2 (en) | Surface mount type electronic circuit device | |
| JPH0414852A (en) | Semiconductor device | |
| JP2007123453A (en) | Controller | |
| JPH0465193A (en) | High density mounting heat dissipating board | |
| JPH0636592Y2 (en) | Hybrid integrated circuit device | |
| JPS6225444A (en) | Continuous circuit board |