JPS6225444A - Continuous circuit board - Google Patents
Continuous circuit boardInfo
- Publication number
- JPS6225444A JPS6225444A JP16415185A JP16415185A JPS6225444A JP S6225444 A JPS6225444 A JP S6225444A JP 16415185 A JP16415185 A JP 16415185A JP 16415185 A JP16415185 A JP 16415185A JP S6225444 A JPS6225444 A JP S6225444A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- wiring board
- present
- continuous circuit
- bonded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は半導体素子を実装するための連続配線基板に関
し、特に、同一パターンを２列以上配列した連続配線基
板に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a continuous wiring board for mounting semiconductor elements, and particularly to a continuous wiring board in which two or more rows of the same pattern are arranged.
従来から用いられていた連続配線基板のパターンを第２
図に示す。これらのパターンは同一パターンを１次元方
向に繰り返し配列したものであり。The pattern of the conventionally used continuous wiring board was changed to the second pattern.
As shown in the figure. These patterns are made by repeatedly arranging the same pattern in a one-dimensional direction.
半導体素子を配線基板に接着するには、１回の操作によ
り１素子を接着することしかできないので、同時に多数
個の素子を基板に接着することを妨げていた。In order to bond a semiconductor device to a wiring board, only one device can be bonded in one operation, which prevents bonding of a large number of devices to the substrate at the same time.
なお、連続配線基板を用いて素子を結線する方法はＴＡ
Ｂ方式と称されており、これは、電子材料１９８５年２
月号、Ｐ３３に記載されている５〔発明の目的〕
本発明の目的は、同一方向に同一パターンを繰り返し配
列した連続配線基板に、半導体素子を接着する工程にお
いて、同一時間に２個以上の半導体素子を基板に接着可
能とする連続配線基板を提供することにある。Note that the method for connecting elements using a continuous wiring board is TA.
This is called the B method, and is based on the Electronic Materials 1985 2nd Edition.
5 [Object of the Invention] The purpose of the present invention is to bond two or more semiconductor devices at the same time to a continuous wiring board in which the same pattern is repeatedly arranged in the same direction. An object of the present invention is to provide a continuous wiring board that allows semiconductor elements to be bonded to the board.
本発明では、同一パターンを２次元的に配置することに
より、１回の操作により多数個の素子を基板に接着する
ことを可能とするものである。In the present invention, by arranging the same pattern two-dimensionally, it is possible to bond a large number of elements to a substrate in one operation.
本発明の一実施例を第１図により説明する。 An embodiment of the present invention will be described with reference to FIG.
本発明の効果を最も効率よく発揮させる連続配線基板の
材料は、絶縁板としてイミド系ポリマを用い、導電部分
に銅箔を用いる構造のものである。The material of the continuous wiring board that exhibits the effects of the present invention most efficiently is one in which an imide-based polymer is used as the insulating plate and copper foil is used for the conductive portion.
しかし、本発明の効果は、これ以外の材料のものにも広
く適用される。たとえば、絶縁材料として熱可塑性レジ
ン、ポリフェニレンスルフィド、芳香族ポリエテスル、
芳香族ポリエステルあるいは、ガラス繊維を誉むエポキ
シ樹脂などがある。このほかに、絶縁材料としてセラミ
ックスを用いた連続配線基板であっても本発明の効果は
何らさまたげられない。However, the effects of the present invention are widely applicable to materials other than these. For example, thermoplastic resin, polyphenylene sulfide, aromatic polyester,
There are aromatic polyesters and epoxy resins that compliment glass fibers. In addition, the effects of the present invention are not impeded in any way even with a continuous wiring board using ceramics as an insulating material.
本発明では、素子を基板に接着する方法として半田ある
いは金属（Ａｕ、Ａｕ−８ｎ）を用いて半田付けあるい
は、熱圧着することが好ましい。In the present invention, as a method of bonding the element to the substrate, it is preferable to use solder or metal (Au, Au-8n) to solder or thermocompress.
しかし、Ａｕ線を用いて接続しても、本発明の効果は何
らさまたげられない。素子を基板に接着するための接着
治具は、横方向に配列したパターンの数だけ有する圧着
材、ワイヤボンダ治具を具備した機械を用いればよい。However, even if Au wires are used for connection, the effects of the present invention are not impaired in any way. As the bonding jig for bonding the element to the substrate, a machine equipped with pressure bonding materials and wire bonder jigs as many as the number of patterns arranged in the horizontal direction may be used.
このほかに、基板に接着された素子の表面を保護するた
めに、レジンをコーティングする方法として印刷方式を
用いると一回の操作により多数個の素子の保護膜形成が
可能となる。In addition, if a printing method is used as a resin coating method to protect the surface of an element bonded to a substrate, it becomes possible to form a protective film on a large number of elements in a single operation.
第１図は、本発明の一実施例の説明図、第２図は従来の
例を示す連続配線基板の説明図である。
■・・・絶縁基板、２・・・リード線、３・ガイド穴。FIG. 1 is an explanatory diagram of one embodiment of the present invention, and FIG. 2 is an explanatory diagram of a continuous wiring board showing a conventional example. ■...Insulated board, 2...Lead wire, 3.Guide hole.
Claims (1)
において、同一パターンを２列以上配列することを特徴
とする連続配線基板。1. A continuous wiring board comprising lead wires on an insulating substrate, characterized in that two or more rows of the same pattern are arranged.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16415185A JPS6225444A (en) | 1985-07-26 | 1985-07-26 | Continuous circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16415185A JPS6225444A (en) | 1985-07-26 | 1985-07-26 | Continuous circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6225444A true JPS6225444A (en) | 1987-02-03 |
Family
ID=15787708
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16415185A Pending JPS6225444A (en) | 1985-07-26 | 1985-07-26 | Continuous circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6225444A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6163069A (en) * | 1997-10-09 | 2000-12-19 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having pads for connecting a semiconducting element to a mother board |
| US6787389B1 (en) | 1997-10-09 | 2004-09-07 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having pads for connecting a semiconducting element to a mother board |
-
1985
- 1985-07-26 JP JP16415185A patent/JPS6225444A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6163069A (en) * | 1997-10-09 | 2000-12-19 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having pads for connecting a semiconducting element to a mother board |
| US6787389B1 (en) | 1997-10-09 | 2004-09-07 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having pads for connecting a semiconducting element to a mother board |
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