JPH04270978A - Ic tester - Google Patents

Abstract

PURPOSE:To enable a number of output pins of a DUT to be tested by one comparator and a semiconductor integrated circuit(IC) tester to be compact and energy-saving by providing a multiplexer before and after a comparator for judging the device (DUT) to be measured. CONSTITUTION:When an input pattern waveform is waveform-shaped by a driver 2 and then is fed to an input pin of a DUT 4 from a pattern memory for input waveform and expectation value 1a, an output waveform is output from an output pin of the DUT 4 and then is fed to a comparator 3a and a multiplexer 6. The output waveform which is fed to the comparator 3a is compared with an expectation pattern from the memory 1a and it is judged whether the DUT4 is proper or not. One of the output waveforms which are fed to the multiplexer 6 is selected and fed to a comparator 3b, is compared with one of the expectation value patterns from a pattern memory for expectation value 1b which is selected by a multiplexer 5, and then it is judged whether the DUT 4 is proper or not. Next output pins of the DUT 4 are tested by switching the multiplexers 5 and 6 in sequence.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a determination circuit in the structure of a test device (hereinafter referred to as an IC tester) for testing the electrical characteristics of a semiconductor integrated circuit (hereinafter referred to as an IC).

0002

2. Description of the Related Art FIG. 2 is a partial block diagram of a conventional IC tester and its connection to a device under test (hereinafter referred to as DUT). In the figure, 1a is a pattern memory, 2 is a driver, 3a is a comparator, and 4 is the DUT. Usually, the number of sets of pattern memory 1a, driver 2, and comparator 3a is equal to the number of pins of the DUT. The driver 2 and comparator 3a are housed in a pin electronics card (not shown).

Next, the operation will be explained. When performing a functional test of DUT4, the IC tester itself (not shown)
The input pattern waveform is supplied to the driver 2 from the pattern memory 1a corresponding to the input pin of the DUT 4 among the pattern memories 1a built-in for the number of tester pins (not shown). The input pattern waveform shaped by the driver 2 is supplied to the input pin of the DUT 4. By supplying the input pattern waveform to the input pin of DUT4,
The output waveform is output from the output pin 4. The output waveform from DUT4 is stored in the pattern memory 1a corresponding to that pin.
is supplied to the comparator 3a along with the expected waveform from D.
It is determined whether UT4 is a good product.

0004

Since the conventional IC tester is configured as described above, it must be equipped with at least as many sets of pattern memories, drivers, and comparators as the number of pins of the DUT. Since the comparator and comparator are housed in the test head installed near the DUT, as the number of pins on the DUT increases, the test head becomes larger, requires more power, generates more heat, and makes the IC tester expensive. There were problems such as.

The present invention was made to solve the above-mentioned problems, and it is possible to make the test head smaller, save power, save heat, and reduce the price.
An object of the present invention is to obtain an IC tester that can be easily connected to peripheral equipment such as a prober.

[0006]

[Means for Solving the Problem] The IC tester of the present invention connects a set of a driver and a comparator to an input pin or an input/output pin of a DUT, and connects the output pin of the DUT to a pin electronics card dedicated to the output pin via a multiplexer. Connect to the comparator. Further, among the memory patterns, a memory pattern dedicated to expectation is also connected to a pin electronics card dedicated to output pins via a multiplexer.

[0007]

[Operation] Considering that about half of the pins of the DUT are output pins, the IC tester according to the present invention suppresses the increase in the number of drivers and uses one comparator as the DUT.
By switching and using each output pin of the UT, the number of comparators can be reduced.

[0008]

[Example] Example 1. An embodiment of the present invention will be described below with reference to the drawings. In the figure, since 1a, 2, 3a, and 4 are the same as 1a, 2, 3a, and 4 shown in the conventional example of FIG. 2, the explanation thereof will be omitted. 1b is a pattern memory. The pattern memory 1a is for input waveforms and expected values, and the pattern memory 1b is for expected values, and has the same structure as pattern memory 1a. 3b is a comparator in the pin electronics card, and since this pin electronics card is dedicated to the output pin of DUT 4, there is no need to provide a driver.

A multiplexer 5 selects one expected value pattern from the pattern memory 1b, sends it to the comparator 3b, and sequentially selects all pattern memories 1b to be used. A multiplexer 6 selects one output waveform from the DUT 4 and sends it to the comparator 3b, and sequentially selects all output pins of the DUT 4.

Next, the operation will be explained. An input pattern waveform is waveform-shaped by the driver 2 from the memory pattern 1a connected to the input pin of the DUT 4, and is supplied to the input pin of the DUT 4. When the input pattern waveform is supplied to the input pin of the DUT 4, an output waveform is output from the output pin of the DUT 4, and is supplied to the comparator 3a and the multiplexer 6 connected to the output pin. The output waveform of the DUT 4 supplied to the comparator 3a is compared with the expected value pattern from the pattern memory 1a to determine whether the DUT 4 is a good product.

On the other hand, the DU supplied to the multiplexer 6
One of the output waveforms of T4 is selected by the multiplexer 6 and supplied to the comparator 3b, and compared with one of the expected value patterns from the pattern memory 1b selected by the multiplexer 5 to determine whether or not the DUT 4 is a good product. do. Next, multiplexer 5 and multiplexer 6 are switched to test the next output pin of DUT 4. Similarly, all output pins of DUT4 are tested by sequentially switching.

Example 2. In the above embodiment, all test patterns are run and tested each time multiplexers 5 and 6 are switched, and multiplexers 5 and 6 are sequentially switched. All output pins may be selected and tested in a time-division manner for each vector, and all vectors may be similarly tested.

Example 3. Further, although the above embodiment has been described for a functional test system, it can also be applied to a parameter system test circuit, and instead of the comparator 3b in FIG. 1, a voltmeter,
It may also include an ammeter, a frequency counter, etc.

[0014]

[Effects of the Invention] As described above, according to the present invention, one comparator can correspond to a large number of output pins of a DUT, so the head portion of an IC tester can be miniaturized.
In addition to reducing power consumption and heat generation,
It is also possible to reduce the price of the IC tester.

Furthermore, since the test is performed using the same comparator or measurement system, each output pin of the DUT can be tested under completely uniform conditions.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram showing a connection between a part of a test circuit of an IC tester and a DUT according to an embodiment of the present invention.

[Figure 2] Part of the test circuit of a conventional IC tester and DUT
FIG. 2 is an explanatory diagram showing connections.

[Explanation of symbols]

1a Pattern memory 1b Pattern memory 2 Driver 3a Comparator 4 DUT 5 Multiplexer 6 Multiplexer

Claims (1)

[Claims] Claim 1: In a test device for testing the electrical characteristics of a semiconductor integrated circuit, a determination circuit for one pin or a very small number of pins is sequentially connected to a large number of expected value pattern memories and output pins of a device under test. An IC tester that can be switched for inspection.