JPH04260375A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable deterioration of characteristics accompanied by thinning of a field oxide film by forming a field reinforcement film including N-type impurities on an upper surface of a field oxide film continuously. CONSTITUTION:A source hold 8 is formed by opening one portion of a field oxide film 7. Then, a polysilicon film 9 as a conductive film is formed on an upper surface of the field oxide film 7 including an upper surface of a P-type channel region 4 facing the source hole 8 of the field oxide film 7. Then, the polysilicon film 9 which are on an upper portion of an n<->-type epitaxial region 3, a p-type gate region 5, and a p-type guard ring region 6 is eliminated. Then, a PSG film 9a as a field reinforcement film including phosphor of n-type impurities is formed continuously on an upper surface of the field oxide film 7 and the polysilicon film 9 as a film thickness which is approximately 1mum by the CVD of a phosphor glass.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device having an n-type semiconductor region with a fine structure.

0002

2. Description of the Related Art Generally, in order to improve the DC current amplification factor hFE of a semiconductor device having an npn structure or an n-channel structure, it is necessary to
It is desirable to form the type source region into a fine structure. Therefore, when manufacturing this type of semiconductor device, a special technique is used to form the n-type semiconductor region, which serves as the electron flow supply port, into a fine structure.

FIG. 2 is a manufacturing process diagram showing a conventional method for manufacturing a semiconductor device having an npn structure or an n-channel structure in the order of steps ((a) to (e)) using cross sections of essential parts of a semiconductor substrate. Note that this figure shows a conventional method for manufacturing an SIT (static induction transistor).

First, as shown in FIG. 2A, a semiconductor substrate 1 is constructed of an n+ type drain region 2 containing a high concentration of n type impurities, and an n- type drain region 2 containing a low concentration of n type impurities.
A type epitaxial region 3 is prepared. Here, the n+ type drain region 2 uses the silicon wafer as a base material as it is, and the n-
type epitaxial region 3 is n+ type drain region 2
It is formed by epitaxial growth on the upper surface of the .

Next, as shown in FIG. 3B, a p-type impurity is diffused into the upper layer of the n- type epitaxial region 3 three times from the upper surface of the n- type epitaxial region 3, and then a drive-in process is performed. By processing, p
A type channel region 4, a p type gate region 5, and a p type guard ring region 6 are formed adjacent to each other. And n-
type epitaxial region 3, p type channel region 4, p
A field oxide film 7 is continuously formed on the upper surfaces of the type gate region 5 and the p-type guard ring region 6 by oxidizing the upper surface of the semiconductor substrate 1 in a high temperature environment. Note that the thickness of the field oxide film 7 formed at this time is 1μ.
m or less.

Next, as shown in FIG. 2C, a field oxide film 7 located above the p-type channel region 4 is removed.
A source hole 8 is formed by opening a part of the field oxide film 7.

Next, as shown in FIG. 2D, the upper surface of the field oxide film 7 including the upper surface of the p-type channel region 4 facing the source hole 8 of the field oxide film 7 is placed in a reduced pressure environment of about 600° C. By CVD of polysilicon below,
A polysilicon film 9 is formed to a thickness of about 0.35 μm. Then, p facing the source hole 8 of the field oxide film 7
In the upper layer of the type channel region 4, n-type impurities are ion-implanted from the top surface of the polysilicon film 9 through the source hole 8, and then annealing is performed to form a fine structure of n+.
A type source region 10 is formed.

Next, as shown in FIG. 4E, a part of the field oxide film 7 located above the p-type guard ring region 6 is opened, and the n- type epitaxial region 3 and the p-type guard ring region 3 are opened. Polysilicon film 9 located above type gate region 5 and p-type guard ring region 6 is removed. Then, a gate electrode 11 and a source electrode 12 are respectively provided on the upper surface of the field oxide film 7 including the upper surface of the p-type guard ring region 6 exposed to the outside, and on the upper surface of the patterned polysilicon film 9, and finally, A passivation film 13 for protecting field oxide film 7 is formed.

[0009]

By the way, in the conventional semiconductor device manufacturing method described above, the film thickness of the field oxide film 7 continuously formed on the upper surface of the semiconductor substrate 1 is suppressed to 1 μm or less. . This is to ensure that polysilicon film 9, which will be formed in a later step, comes into electrical contact with the upper surface of p-type channel region 4 facing fine source hole 8 of field oxide film 7. Therefore, it is essential to form the field oxide film 7 to a predetermined thickness or less in order to form the n+ type source region 10 as an n type semiconductor region having a fine structure.

However, if the thickness of the field oxide film 7 is kept below a predetermined thickness, various semiconductor regions will inevitably be affected by the charges existing in the passivation film 13. Even if the current amplification factor hFE can be improved, other characteristics may deteriorate significantly. Furthermore, if the field oxide film 7 is thin, damage (crystal defects, etc.) may remain in the p-type channel region 4 due to ion implantation when forming the n+-type source region 10, resulting in a short lifetime. The direct current amplification factor hFE may also decrease due to the decrease.

The present invention has been made in view of the above circumstances, and its purpose is to provide a method for manufacturing a semiconductor device for suppressing the deterioration of various characteristics due to thinning of the field oxide film. There is a particular thing.

0012

[Means for Solving the Problems] First, a method for manufacturing a semiconductor device according to the present invention as set forth in claim 1 includes forming a field oxide film having an opening in a portion on the upper surface of a substrate having a p-type semiconductor region formed thereon. Field oxide film formation process to form a field oxide film, and field reinforcement film formation in which a field reinforcement film containing n-type impurities is continuously formed on the upper surface of the field oxide film including the upper surface of the p-type semiconductor region facing the opening of the field oxide film. and an n-type semiconductor region forming step of diffusing n-type impurities contained in the field enhancement film to form an n-type semiconductor region with a fine structure in the upper layer of the p-type semiconductor region facing the opening of the field oxide film. It is characterized by having the following.

The method for manufacturing a semiconductor device according to the present invention as set forth in claim 2 also includes forming a field oxide film having an opening in a portion on the upper surface of a substrate having a p-type semiconductor region formed thereon. a conductive film forming step in which a conductive film is formed on a predetermined region of the upper surface of the field oxide film including the upper surface of the p-type semiconductor region facing the opening of the field oxide film; A field enhancement film forming step in which a field enhancement film containing type impurities is continuously formed, and a p-type impurity formed in the opening of the field oxide film by diffusing the n-type impurity contained in the field enhancement film through a conductive film. The method is characterized by comprising an n-type semiconductor region forming step of forming an n-type semiconductor region with a fine structure in an upper layer of the semiconductor region.

[0014]

[Function] First, in the method of manufacturing a semiconductor device of the present invention as set forth in claim 1, in the field oxide film forming step,
A field oxide film having an opening in part is formed on the upper surface of the substrate with a p-type semiconductor region formed thereon, and the field enhancement film forming step includes the upper surface of the p-type semiconductor region facing the opening of the field oxide film. A field enhancement film containing an n-type impurity is continuously formed on the upper surface of the field oxide film, and in the n-type semiconductor region forming process, the n-type impurity contained in the field enhancement film is diffused to form an opening in the field oxide film. An n-type semiconductor region having a fine structure is formed in the upper layer of the p-type semiconductor region facing the substrate.

Further, in the method for manufacturing a semiconductor device according to the second aspect of the present invention, in the field oxide film forming step, a field oxide film having an opening in a part of the upper surface of the substrate having a p-type semiconductor region formed thereon is formed. A conductive film is formed in a predetermined region of the upper surface of the field oxide film including the upper surface of the p-type semiconductor region facing the opening of the field oxide film in a conductive film forming step, A field enhancement film containing n-type impurities is continuously formed on the top surface of the field oxide film and the conductive film, and
In the step of forming a type semiconductor region, the n-type impurity contained in the field enhancement film is diffused through the conductive film, and an n-type semiconductor region with a fine structure is formed in the upper layer of the p-type semiconductor region facing the opening of the field oxide film. It is formed.

That is, in the present invention, by forming a field reinforcing film on the top surface of the field oxide film, the influence of charges existing in the passivation film etc. on various semiconductor regions is suppressed, and at the same time, the effect of the charge existing in the passivation film etc. on various semiconductor regions is suppressed. By not using ion implantation when forming the type semiconductor regions, degeneration of various semiconductor regions is suppressed.

[0017]

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a manufacturing process diagram showing a method for manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps ((a) to (e)) using a cross section of a main part of a semiconductor substrate. Note that this figure also shows a method for manufacturing an SIT (static induction transistor), as in the conventional example. Therefore, in this embodiment, the steps that are characteristic of the present invention will be mainly illustrated and explained. Further, the same parts as those shown in the conventional example will be described with the same reference numerals.

First, as shown in FIG. 1A, a p-type channel is formed in the upper layer of the n- type epitaxial region 3 of the n+-type drain region 2 and the n--type epitaxial region 3 constituting the semiconductor substrate 1. A region 4, a p-type gate region 5, and a p-type guard ring region 6 are formed adjacent to each other. A field oxide film 7 having a thickness of 1 μm or less is continuously formed on the upper surface by oxidizing the upper surface of the semiconductor substrate 1 in a high temperature environment. And p
A source hole 8 is formed in the field oxide film 7 located above the type channel region 4 by opening a part of the field oxide film 7.

Next, as shown in FIG. 2B, the upper surface of the field oxide film 7 including the upper surface of the p-type channel region 4 facing the source hole 8 of the field oxide film 7 is placed in a reduced pressure environment of about 600° C. By CVD of polysilicon below,
A polysilicon film 9 as a conductive film is formed to a thickness of about 0.35 μm.

Next, as shown in FIG. 2C, a polysilicon film 9 located above the n- type epitaxial region 3, the p-type gate region 5, and the p-type guard ring region 6 is removed.
is removed, leaving only polysilicon film 9 located above p-type channel region 4.

Next, as shown in FIG. 2D, the upper surfaces of the field oxide film 7 and the polysilicon film 9 are coated with n-type impurity P( A PSG film (phosphorus glass film) 9a as a field reinforcing film containing phosphorus) is continuously formed to a thickness of about 1 μm. Note that the impurity concentration of P contained in the PSG film 9a is approximately 4 mol%. Then, in the upper layer of the p-type channel region 4 facing the source hole 8 of the field oxide film 7, the n-type impurity P contained in the PSG film 9a is subjected to a drive-in process through the polysilicon film 9. An n+ type source region 10 having a similar structure is formed.

Next, as shown in FIG. 5E, a portion of the field oxide film 7 and the PSG film 9a located above the p-type guard ring region 6 is opened, and the polysilicon film 9 is opened. The PSG film 9a located above is removed. Then, a gate electrode 11 and a source electrode 12 are respectively provided on the upper surface of the PSG film 9a including the upper surface of the p-type guard ring region 6 exposed to the outside, and on the upper surface of the polysilicon film 9.Finally, a passivation film 13 is further formed. be done.

Note that if the connection between the n + -type source region 10 formed by the n-type impurity contained in the PSG film 9a and the source electrode 12 is ensured, the polysilicon film 9 does not necessarily need to be provided. In this case, the same figure (b
) and (c) are omitted, and in the step shown in (d) of the figure, the source hole 8 of the field oxide film 7 is
A PSG film 9a is continuously formed on the upper surface of the field oxide film 7 including the upper surface of the p-type channel region 4 facing the PSG film 9a.
It is preferable to form the n+ type source region 10 by directly diffusing the n type impurity P contained in the SG film 9a into the upper layer of the p type channel region 4 facing the source hole 8 of the field oxide film 7.

Although the embodiments of the present invention have been described in detail above, the present invention is not limited to application to the SIT manufacturing method, and may be applied to other unipolar transistors having an n-channel structure or having an npn structure. It can also be applied to methods of manufacturing bipolar transistors and the like.

[0025]

As described above in detail, according to the method of manufacturing a semiconductor device of the present invention, a field strengthening film is formed on the top surface of a field oxide film, so that charges existing in a passivation film etc. can be transferred to various semiconductor devices. The influence on the area can be suppressed. In addition, since ion implantation is not used when forming the n-type semiconductor region with a fine structure, it is possible to suppress degeneration of various semiconductor regions, and the time required for the entire manufacturing process of the device is shortened, resulting in mass production. Sexuality will also greatly improve.

[Brief explanation of the drawing]

FIG. 1 is a manufacturing process diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention in order of steps using a cross section of a main part of a semiconductor substrate.

FIG. 2 is a manufacturing process diagram illustrating a conventional method for manufacturing a semiconductor device having an npn structure or an n-channel structure in order of steps using a cross section of a main part of a semiconductor substrate.

[Explanation of symbols]

1 Semiconductor substrate 4 P-type channel region 7 Field oxide film 8 Source hole 9 Polysilicon film 9a PSG film 10 n+ type source region

Claims (2)

[Claims] 1. A field oxide film forming step of forming a field oxide film partially having an opening on the upper surface of a substrate having a p-type semiconductor region formed thereon; a field strengthening film forming step of continuously forming a field strengthening film containing an n-type impurity on the upper surface of the field oxide film including the upper surface of the semiconductor region; and diffusing the n-type impurity contained in the field strengthening film. A method for manufacturing a semiconductor device, comprising the step of forming an n-type semiconductor region having a fine structure in an upper layer of the p-type semiconductor region facing the opening of the field oxide film. 2. A field oxide film forming step of forming a field oxide film partially having an opening on the upper surface of a substrate having a p-type semiconductor region formed thereon; a conductive film forming step of forming a conductive film in a predetermined region of the upper surface of the field oxide film including the upper surface of the semiconductor region; and a field strengthening film containing an n-type impurity on the field oxide film and the upper surface of the conductive film. a step of forming a field enhancement film, and diffusing the n-type impurity contained in the field enhancement film through the conductive film to form an upper layer of the p-type semiconductor region facing the opening of the field oxide film. 1. A method of manufacturing a semiconductor device, comprising: an n-type semiconductor region forming step of forming an n-type semiconductor region with a fine structure.