JPH0425707B2 - - Google Patents

Info

Publication number
JPH0425707B2
JPH0425707B2 JP57096207A JP9620782A JPH0425707B2 JP H0425707 B2 JPH0425707 B2 JP H0425707B2 JP 57096207 A JP57096207 A JP 57096207A JP 9620782 A JP9620782 A JP 9620782A JP H0425707 B2 JPH0425707 B2 JP H0425707B2
Authority
JP
Japan
Prior art keywords
layer
gnd
linear
substrate
type semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57096207A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58213462A (ja
Inventor
Yoshinori Akamatsu
Kazuo Hoya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Microcomputer System Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Microcomputer System Ltd, Hitachi Ltd filed Critical Hitachi Microcomputer System Ltd
Priority to JP57096207A priority Critical patent/JPS58213462A/ja
Publication of JPS58213462A publication Critical patent/JPS58213462A/ja
Publication of JPH0425707B2 publication Critical patent/JPH0425707B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65Integrated injection logic
    • H10D84/658Integrated injection logic integrated in combination with analog structures

Landscapes

  • Bipolar Integrated Circuits (AREA)
JP57096207A 1982-06-07 1982-06-07 半導体集積回路装置 Granted JPS58213462A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57096207A JPS58213462A (ja) 1982-06-07 1982-06-07 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57096207A JPS58213462A (ja) 1982-06-07 1982-06-07 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS58213462A JPS58213462A (ja) 1983-12-12
JPH0425707B2 true JPH0425707B2 (enrdf_load_stackoverflow) 1992-05-01

Family

ID=14158815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57096207A Granted JPS58213462A (ja) 1982-06-07 1982-06-07 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPS58213462A (enrdf_load_stackoverflow)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55115356A (en) * 1979-02-28 1980-09-05 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device
JPS5621362A (en) * 1979-07-28 1981-02-27 Nec Corp Semiconductor integrated circuit device

Also Published As

Publication number Publication date
JPS58213462A (ja) 1983-12-12

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