JPH04253340A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To provide a semiconductor and its manufacturing method which can simultaneously connect the gate electrode of an MOS transistor to the wiring and the gate electrode to a base layer without deteriorating the reliability of the gate oxide film of the MOS transistor. CONSTITUTION:After the gate oxide film 103 and polysilicon film 107 of a MOS transistor are successively formed on a substrate 101, a resist pattern 104 is formed on the film 107 and an opening is opened to the substrate 101 by etching the film 107 by using the pattern 104 as a mask. Then a diffusion layer is formed on the exposed surface of the substrate and metal is formed on the entire surface. Thereafter, the gate and wiring section of the MOS transistor are formed in a two-layer structure of the metal and polysilicon by patterning the metal and polysilicon film and, at the same time, the connecting section to the diffusion layer composed only of the metal is formed.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device and a method of manufacturing the same in which a gate material of a MOS transistor is used for interconnection and connection with an underlying layer.

0002

[Prior Art] FIG. 5 shows the gate of a MOS transistor,
1 shows a cross-sectional structure of a conventional semiconductor device in which a gate metal material is used for wiring and connection with an underlying layer. Also, Figure 6(a)
-(d) are cross-sectional views of each main process showing the manufacturing method for obtaining the structure of FIG. 5.

Hereinafter, the structure of the semiconductor device shown in FIG. 5 will be explained with reference to FIGS. 6(a) to 6(d), along with its manufacturing method. First, an oxide film 2 for element isolation is formed on a semiconductor substrate 1 by a well-known selective oxidation method, and then a gate oxide film 3 of a MOS transistor is formed on the entire surface (FIG. 6).
(a) ).

[0004] After that, a resist is applied to the entire surface, and a resist pattern 4 is formed which has an opening in a portion to be connected to the underlying layer.
is formed, and the gate oxide film 3 is etched using the resist pattern 4 as a mask. Thereafter, impurities are implanted by ion implantation using the resist pattern 4 as a mask to form a diffusion layer 6 on the substrate surface exposed in the opening (FIG. 6(b)).

Next, after removing the resist 4, a polysilicon film 7 that will serve as a gate electrode and wiring is formed over the entire surface (FIG. 6(c)). This polysilicon film 7 may be doped with an impurity of the same conductivity type as the diffusion layer 6, or may be non-doped polysilicon doped with an impurity.

Next, the gate electrode 8 and the wiring 9 are patterned at the same time (FIG. 6(d)). Thereafter, the source/drain regions 10 of the MOS transistor are formed by ion implantation, thereby forming the semiconductor device shown in FIG.

[0007]

As described above, in the conventional semiconductor device, as shown in FIG. 6(b), there is a step in which the gate oxide film 3 and the resist 4 come into contact with each other. However, in this step, the gate oxide film is contaminated by organic substances, carbon, etc. contained in the resist 4, resulting in a problem that the reliability of the gate oxide film 8 is deteriorated.

The present invention was made to solve the above-mentioned problems, and provides a structure of a semiconductor device that can maintain the reliability of the gate oxide film of a MOS transistor, and
An object of the present invention is to provide a method for manufacturing a semiconductor device that can simultaneously form connections between a gate electrode of a MOS transistor, a wiring, and an underlying layer while maintaining the reliability of a gate oxide film of an OS transistor.

[0009]

[Means for Solving the Problems] In a semiconductor device according to the present invention, the gate electrode and wiring portion of a MOS transistor have a two-layer structure of polysilicon and metal, and the connection portion with the underlying layer has a structure of only metal. It is.

The method for manufacturing a semiconductor device according to the present invention also includes a step of forming a gate oxide film of a MOS transistor on a base substrate, a step of forming a polysilicon film on the gate oxide film, and a step of forming a resist on the polysilicon film. A step of forming a pattern, a step of etching the polysilicon film using the resist pattern as a mask and forming an opening that reaches the underlying layer, a step of forming metal on the entire surface, patterning the metal and polysilicon film, and etching the polysilicon film with the resist pattern as a mask. This method is characterized in that it includes the steps of forming a gate and a wiring portion of a MOS transistor having a two-layer structure of silicon film, and forming a connection portion with an underlying layer made only of metal.

[0011]

[Operation] In this invention, the gate electrode and wiring part of the MOS transistor have a two-layer structure of polysilicon and metal, and the connection part with the base layer has a structure of only metal, so that the connection with the base layer can be made. The resist pattern used to form the opening will be formed on the gate oxide film of the MOS transistor via a polysilicon film.
There is no fear that the gate oxide film will be contaminated by the resist.

Further, in the present invention, a gate oxide film of a MOS transistor is formed, a polysilicon film is formed on it, a resist pattern is further formed on it, and the polysilicon film is etched using this as a mask. Form an opening that reaches the underlying layer, form metal on the entire surface, and pattern the metal and polysilicon film to form the gate, wiring, and metal only of the MOS transistor, which has a two-layer structure of metal and polysilicon film. The gate oxide film of the MOS transistor does not come into contact with the resist when forming the opening for connection with the base layer, thus maintaining the reliability of the gate oxide film. Connections between the gate electrode, the wiring, and the underlying layer are simultaneously formed.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a sectional view of a semiconductor device showing an embodiment of the present invention. Moreover, FIGS. 2(a) to 2(e) are cross-sectional views of each main process showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

The structure of the semiconductor device shown in FIG. 1 will be explained below with reference to FIG. 2(a).
) to (e), the manufacturing method will be described and explained. First, an oxide film 102 for element isolation is formed on a semiconductor substrate 101 by a well-known selective oxidation method, and then a gate oxide film 103 of a MOS transistor is formed on the entire surface, and a polysilicon film 107 that becomes a gate electrode material is further formed on this. (Figure 2(a)). This polysilicon film 107 may contain impurities in order to control the work function of the gate, as in the conventional device.

Next, a resist is applied to the entire surface, and a resist pattern 1 is formed with openings for connecting portions 105 for connection with the underlying layer.
04 (Fig. 2(b)).

Thereafter, the polysilicon film and gate oxide film 103 are etched using the resist pattern 104 as a mask to form an opening reaching the substrate 101, and impurities are implanted into the exposed substrate surface by ion implantation to form a diffusion layer. 106 (FIG. 2(c)).

Next, after removing the resist pattern 104, metal 111 is deposited on the entire surface (FIG. 2(d)). Thereafter, as in the past, the gate electrode 108 of the MOS transistor and the wiring 109 are patterned at the same time.
At the same time, a connection portion with the base layer consisting only of metal 111 is formed (FIG. 2(e)).

Thereafter, source/drain regions 110 are formed by ion implantation of a MOS transistor, thereby completing the semiconductor device shown in FIG.

As described above, according to the present embodiment, in the step of forming an opening in the gate oxide film 103 for connection with the underlying layer, the resist 104 is removed from the polysilicon film 1.
Gate oxide film 103 of the MOS transistor via 07
Since the gate oxide film 103 and the resist 10 are formed on the
4 is not in direct contact with the gate oxide film 10 due to organic matter, carbon, etc. contained in the resist 104, as in the conventional case.
There is no worry that the gate oxide film 103 will be contaminated and the reliability of the gate oxide film 103 will deteriorate. Therefore, according to this embodiment, the reliability of the gate oxide film 103 is maintained while the gate electrode 10
8, the wiring 109, and the base diffusion layer 106 can be formed simultaneously, and elements can be stably formed.

[0020] In the above embodiment, a two-dimensional device was explained, but the present invention can also be applied to a three-dimensional device. That is, FIG. 3 shows a cross-sectional structure of a semiconductor device according to another embodiment of the present invention, and shows a case where the gate electrode of the upper layer MOS transistor is used to connect the upper layer device 112 and the lower layer device 113. There is. In the figure, the same reference numerals as in FIGS. 1 and 2 indicate the same or corresponding parts, and 114
115 is an insulating layer made of silicon oxide or the like for insulating between the upper layer device 112 and the lower layer device, and 115 is a single crystal silicon layer formed in the element formation region of the upper layer device 112.

The method for manufacturing the semiconductor device shown in FIG. 3 will be described below with reference to FIG.
This will be briefly explained using (a) to (d). First, after forming an oxide film 102 for element isolation on the surface of a semiconductor substrate 101, a gate oxide film 103 of a MOS transistor is formed on the entire surface, a polysilicon film 107 is formed on this, and a metal 111 is further formed on this. Then, the gate 108 of the MOS transistor is formed by patterning. Thereafter, the source/drain regions 110 of the MOS transistor are formed by ion implantation, and the lower layer device 113 is completed. After that, an insulating layer 11 made of silicon oxide or the like is formed on the entire surface.
4 is formed, and the single crystal silicon layer 11 of the upper layer device is formed on the insulating layer 114 by a method such as solid phase epitaxial growth.
5 is formed, and further an oxide film 102 for element isolation is formed (FIG. 4(a)).

Then, after forming a gate oxide film 103 of a MOS transistor on the entire surface and forming a polysilicon film 107 thereon, a gate oxide film 103 is formed on the polysilicon film 107 corresponding to a connection part with a diffusion layer 110 of a lower layer device 113. A resist pattern 104 having openings at the positions is formed (FIG. 4(b)).

Next, the polysilicon film, gate oxide film 103, isolation oxide film 102, and insulating layer 114 are etched using the resist pattern 104 as a mask, and the lower layer device 1 is etched.
An opening reaching the No. 13 diffusion layer 110 is formed. Then, metal 111 is deposited on the entire surface (FIG. 4(c)).

Thereafter, the gate electrode 108 and interconnection 107 of the MOS transistor of the upper layer device are patterned at the same time, and the gate electrode 108 and interconnection 109 of the MOS transistor consisting of the two-layer film of metal 111 and polysilicon film 107 are patterned only from the metal. A connection portion 5 with the lower layer device is formed (FIG. 4(d)).

Thereafter, the source/drain regions 110 of the MOS transistor are formed by ion implantation, thereby completing the upper layer device 112 and obtaining the three-dimensional device shown in FIG. 3.

In this embodiment as well, the resist pattern 104 for forming an opening for connecting the lower dehyde layer 113 to the diffusion layer 110 is connected to the gate oxide film 10 of the MOS transistor via the polysilicon film 107.
3, so the gate oxide film 103 and resist 1
04 does not come into direct contact with the resist 104, so there is no fear that the gate oxide film 103 will be contaminated by the resist 104 and the reliability of the gate oxide film 103 will deteriorate. Therefore, the gate oxide film 103
The gate electrode 108 of the upper layer device 112, the wiring 109, and the connection portion 105 with the lower layer device 113 can be formed at the same time while maintaining reliability.

Furthermore, according to this embodiment, the upper layer device 1
12 and the lower layer device 113 are connected by metal, which also has the effect of realizing low resistance.

[0028]

[Effects of the Invention] As described above, according to this invention, MOS
In those in which the gate material of the transistor is used for wiring and connection with the base layer, the gate and wiring part of the MOS transistor has a two-layer structure of polysilicon and metal, and the connection part with the base layer has a structure consisting only of metal. Therefore, the resist pattern used to form the opening for connection with the underlying layer is formed on the gate oxide film of the MOS transistor via the polysilicon film, thereby preventing contamination of the gate oxide film by the resist. It can be prevented. This has the effect that the reliability of the gate oxide film can be maintained and a stable device having a highly reliable gate oxide film can be realized.

Further, according to the present invention, a resist pattern is formed on the gate oxide film of a MOS transistor through a polysilicon film, and using this as a mask, the polysilicon film is etched to form an opening that reaches the underlying layer. death,
Metal is formed on the entire surface, and then the metal and polysilicon film are patterned to form the gate of the MOS transistor, which has a two-layer structure of metal and polysilicon film, the wiring part, and the connection part with the base layer made only of metal. This has the effect that connections between the gate electrode, the wiring, and the underlying layer can be formed simultaneously while maintaining the reliability of the gate oxide film.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of each main process showing a method for manufacturing the semiconductor device of FIG. 1;

FIG. 3 is a sectional view showing a semiconductor device according to another embodiment of the invention.

FIG. 4 is a cross-sectional view of each main process showing a method for manufacturing the semiconductor device of FIG. 3;

FIG. 5 is a cross-sectional view of a conventional semiconductor device.

FIG. 6 is a cross-sectional view showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

101 Semiconductor substrate 102 Isolation oxide film 103 Gate oxide film 104 Resist 105 Connection part 106 Diffusion layer 107 Polysilicon 108 Gate electrode 109 Wiring 110 Source/drain region 111 Metal 112 Upper layer device 113 Lower layer device 114 Insulating layer 115 Single crystal silicon layer

Claims (2)

[Claims] 1. A semiconductor device in which a gate material of a MOS transistor is used for connection with wiring and an underlying layer, wherein the gate and wiring portion of the MOS transistor have a two-layer structure of polysilicon and metal; A semiconductor device characterized in that a connection part with a stratum is made only of metal. 2. A step of forming a gate oxide film of a MOS transistor on a base substrate, a step of forming a polysilicon film on the gate oxide film, and a step of forming a resist pattern on the polysilicon film, etching the polysilicon film using the resist pattern as a mask to form an opening that reaches the base layer; and etching metal on the polysilicon, the opening in the polysilicon, and the base layer exposed in the opening. The gate of a MOS transistor having a two-layer structure of metal and polysilicon film is formed by patterning the metal and polysilicon film.
and a step of forming a wiring portion and forming a connection portion with a base layer made only of metal.