JPH0423838B2 - - Google Patents

Info

Publication number
JPH0423838B2
JPH0423838B2 JP59173374A JP17337484A JPH0423838B2 JP H0423838 B2 JPH0423838 B2 JP H0423838B2 JP 59173374 A JP59173374 A JP 59173374A JP 17337484 A JP17337484 A JP 17337484A JP H0423838 B2 JPH0423838 B2 JP H0423838B2
Authority
JP
Japan
Prior art keywords
flat package
lead pins
lead
soldering
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59173374A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6152000A (ja
Inventor
Toshio Yamamoto
Masakazu Nakazono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP17337484A priority Critical patent/JPS6152000A/ja
Publication of JPS6152000A publication Critical patent/JPS6152000A/ja
Publication of JPH0423838B2 publication Critical patent/JPH0423838B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP17337484A 1984-08-22 1984-08-22 フラットパッケージ形半導体素子のはんだ付け方法 Granted JPS6152000A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17337484A JPS6152000A (ja) 1984-08-22 1984-08-22 フラットパッケージ形半導体素子のはんだ付け方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17337484A JPS6152000A (ja) 1984-08-22 1984-08-22 フラットパッケージ形半導体素子のはんだ付け方法

Publications (2)

Publication Number Publication Date
JPS6152000A JPS6152000A (ja) 1986-03-14
JPH0423838B2 true JPH0423838B2 (enrdf_load_stackoverflow) 1992-04-23

Family

ID=15959203

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17337484A Granted JPS6152000A (ja) 1984-08-22 1984-08-22 フラットパッケージ形半導体素子のはんだ付け方法

Country Status (1)

Country Link
JP (1) JPS6152000A (enrdf_load_stackoverflow)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5567190A (en) * 1978-11-15 1980-05-21 Matsushita Electric Works Ltd Soldering method
JPS5983079U (ja) * 1982-11-26 1984-06-05 株式会社東芝 フラツトパツクｉｃリフロ−はんだ付装置

Also Published As

Publication number Publication date
JPS6152000A (ja) 1986-03-14

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