JPH0423150A - Method and device for memory control of semiconductor disk device - Google Patents

Method and device for memory control of semiconductor disk device

Info

Publication number
JPH0423150A
JPH0423150A JP2128368A JP12836890A JPH0423150A JP H0423150 A JPH0423150 A JP H0423150A JP 2128368 A JP2128368 A JP 2128368A JP 12836890 A JP12836890 A JP 12836890A JP H0423150 A JPH0423150 A JP H0423150A
Authority
JP
Japan
Prior art keywords
addresses
address
error
errors
semiconductor memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2128368A
Other languages
Japanese (ja)
Inventor
Keisuke Tokoro
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2128368A priority Critical patent/JPH0423150A/en
Publication of JPH0423150A publication Critical patent/JPH0423150A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To improve the availability of a semiconductor memory part by providing an address control part to store the addresses excluding only the error addresses into an address register when plural address errors are produced at the semiconductor memory part.
CONSTITUTION: When plural address errors are produced at a semiconductor memory part 9, the addresses excluding these error addresses are stored in an address register 6 by an address control part 14. Then the part 14 performs the address addition processing to skip over the error addresses when optional addresses have errors at the part 9. The presence or absence of errors is also checked in regard of the added addresses. Then the addresses having no error are stored in the register 6 excluding the error addresses. Thus it is possible to inhibit the writing operations into plural error addresses of a semiconductor memory.
COPYRIGHT: (C)1992,JPO&Japio
JP2128368A 1990-05-18 1990-05-18 Method and device for memory control of semiconductor disk device Pending JPH0423150A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2128368A JPH0423150A (en) 1990-05-18 1990-05-18 Method and device for memory control of semiconductor disk device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2128368A JPH0423150A (en) 1990-05-18 1990-05-18 Method and device for memory control of semiconductor disk device

Publications (1)

Publication Number Publication Date
JPH0423150A true JPH0423150A (en) 1992-01-27

Family

ID=14983098

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2128368A Pending JPH0423150A (en) 1990-05-18 1990-05-18 Method and device for memory control of semiconductor disk device

Country Status (1)

Country Link
JP (1) JPH0423150A (en)

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