JPH04211195A - Manufacture of ceramic multilayered wiring board - Google Patents

Manufacture of ceramic multilayered wiring board

Info

Publication number
JPH04211195A
JPH04211195A JP4324391A JP4324391A JPH04211195A JP H04211195 A JPH04211195 A JP H04211195A JP 4324391 A JP4324391 A JP 4324391A JP 4324391 A JP4324391 A JP 4324391A JP H04211195 A JPH04211195 A JP H04211195A
Authority
JP
Japan
Prior art keywords
green sheet
carrier film
hole
ceramic
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4324391A
Other languages
Japanese (ja)
Other versions
JP2906697B2 (en
Inventor
Jun Inasaka
稲坂 純
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=26382995&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPH04211195(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4324391A priority Critical patent/JP2906697B2/en
Publication of JPH04211195A publication Critical patent/JPH04211195A/en
Application granted granted Critical
Publication of JP2906697B2 publication Critical patent/JP2906697B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To prevent the positional deviation of a through hole at the time of piling up layers by performing the process for forming the through hole, etc., in a state where a carrier film is stuck to a green sheet. CONSTITUTION:Since the first process in which a through hole, etc., is formed through a green sheet cast on a carrier film 12 while the carrier film 12 is stuck to the green sheet 11 and the second process in which the carrier film 12 is removed after the green sheet 11 processed in the first process is piled up one by one and the piled up sheets 11 are adhered to each other by pressing are provided, the elongation of the green sheet is eliminated in each process and a ceramic multilayered wiring board which is free from positional deviation can be manufactured.

Description

【発明の詳細な説明】[Detailed description of the invention]

[0001] [0001]

【産業上の利用分野】本発明はセラミック多層配線基板
の製造方法に関する。 [0002]
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a ceramic multilayer wiring board. [0002]

【従来の技術】従来のグリーンシート法によるセラミッ
ク多層配線基板の製造方法は、セラミックの泥漿をドク
ターブレード法によりキャスティングフィルム上にキャ
スティング、乾燥させ、セラミックグリーンシートにし
た後に、キャスティングフィルムよりグリーンシートを
剥離し、基板の大きさに該当する大きさに切断し、その
1枚1枚に位置合せ用の穴の打抜き、導体ペースト印刷
、スルーホール形成、ビアフィル、積層の後に焼成とい
う工程を行っていた。 [0003]
[Prior Art] The conventional method for manufacturing ceramic multilayer wiring boards using the green sheet method involves casting ceramic slurry onto a casting film using a doctor blade method, drying it to form a ceramic green sheet, and then removing the green sheet from the casting film. The process involved peeling it off, cutting it into pieces that corresponded to the size of the board, punching holes for alignment on each piece, printing conductor paste, forming through holes, filling vias, laminating, and then firing. . [0003]

【発明が解決しようとする課題】この従来のセラミック
多層配線基板の製造方法では、セラミックの泥漿をキャ
スティングし、グリーンシートにした後、グリーンシー
トはキャスティングフィルムより剥離され、その後の工
程を施されるため、スルーホール形成、スルーホールへ
の導体ペースト埋込みおよび導体パターン印刷の各工程
でのハンドリングの際、あるいはグリーンシートの保管
状態の良し悪しでグリーンシートが変形し易く、積層時
にスルーホールの積層による位置ずれが生じるという欠
点があった。 [0004]
[Problems to be Solved by the Invention] In this conventional method of manufacturing a ceramic multilayer wiring board, a ceramic slurry is cast to form a green sheet, and then the green sheet is peeled off from the casting film and subjected to subsequent processes. Therefore, the green sheet is easily deformed during handling during each process of forming through holes, embedding conductive paste in the through holes, and printing conductive patterns, or due to poor storage conditions of the green sheet, and when laminating through holes, the green sheet is easily deformed. There was a drawback that positional deviation occurred. [0004]

【課題を解決するための手段】本発明のセラミック多層
配線基板の製造方法は、キャリアフィルムにキャスティ
ングされたセラミックグリーンシートに、スルーホール
形成、スルーホールへの導体ペースト埋込みおよびグリ
ーンシート面への導体パターン印刷の各工程をグリーン
シートにキャリアフィルムを付けたまま行う第1の工程
と、前記第1の工程を施したキャリアフィルム付グリー
ンシートを1枚ずつ積層、圧着し、その後キャリアフィ
ルムを引きはがす第2の工程とを含んで構成される。 [0005]
[Means for Solving the Problems] The method for manufacturing a ceramic multilayer wiring board of the present invention includes forming through holes in a ceramic green sheet cast on a carrier film, embedding a conductor paste in the through holes, and applying a conductor to the surface of the green sheet. A first step in which each step of pattern printing is performed with the carrier film attached to the green sheet, and the green sheets with the carrier film that have been subjected to the first step are laminated and pressed one by one, and then the carrier film is peeled off. and a second step. [0005]

【実施例】次に本発明の実施例について図面を参照して
説明する。 [0006]図1はキャリアフィルム12上にドクター
ブレード法に依りキャスティングされた、グリーンシー
ト11を示す。この時のグリーンシート11の厚さは約
100μmであり、キャリアフィルム12の厚さは10
0μmである。キャリアフィルム12の厚さはキャステ
ィングするグリーンシート11の幅によって変えること
ができる。即ち広い幅でキャスティングする場合(幅〉
300 mm)の場合はフィルムを巻きとるテンション
に依り、フィルムが波釘たない様に100μm厚程度の
キャリアフィルムを用いるのが良い。キャリアフィルム
は通常、ポリエステルで出来ており、熱的安定性、機械
的強度にすぐれており、柔らかいグリーンシートを保持
するのに適している。 [0007]図2はキャスティングされたグリーンシー
ト11をキャリアフィルム12ごと切断し、位置合せ用
の穴21を四隅に形成したものの断面図である。位置合
せ用の穴はいかなる形状のものでも良いが、グリーンシ
ートが大型の場合は図の様にそれぞれの角に直径5mm
ぐらいの複数個の穴を明けるのが、位置ずれを小さくす
るのに有効である。この後の工程は全てこの位置決め用
の穴を規準にして行われる。 [0008]図3は、グリーンシート11にキャリアフ
ィルム12ごとスルーホール31を形成したものの断面
図である。この時のスルーホール31の径は、そのホー
ルが基板内で信号配線に接続される時は直径0. 1〜
0.2mmであり、基板表面に実装されるLSIへの電
源供給用に使われる時は、直径0.2〜0.3mmであ
る。
Embodiments Next, embodiments of the present invention will be described with reference to the drawings. [0006] FIG. 1 shows a green sheet 11 cast onto a carrier film 12 by a doctor blade method. The thickness of the green sheet 11 at this time is approximately 100 μm, and the thickness of the carrier film 12 is approximately 10 μm.
It is 0 μm. The thickness of the carrier film 12 can be changed depending on the width of the green sheet 11 to be cast. In other words, when casting with a wide width (width)
300 mm), depending on the tension at which the film is wound, it is best to use a carrier film with a thickness of about 100 μm to prevent the film from becoming wavy. Carrier films are usually made of polyester and have excellent thermal stability and mechanical strength, making them suitable for holding soft green sheets. [0007] FIG. 2 is a cross-sectional view of the cast green sheet 11 cut together with the carrier film 12, with alignment holes 21 formed at the four corners. The holes for alignment can be of any shape, but if the green sheet is large, a hole of 5 mm in diameter should be placed at each corner as shown in the diagram.
Drilling multiple holes of about 100 mL is effective in reducing misalignment. All subsequent steps are performed using this positioning hole as a reference. [0008] FIG. 3 is a cross-sectional view of a green sheet 11 in which through holes 31 are formed together with the carrier film 12. At this time, the diameter of the through hole 31 is 0.00 mm when the hole is connected to the signal wiring within the board. 1~
The diameter is 0.2 mm, and when used for power supply to an LSI mounted on the surface of the substrate, the diameter is 0.2 to 0.3 mm.

【0009】次に、図4は、スルーホール形成されたグ
リーンシート11のホールに導体ペースト41を埋込ん
だものの断面図である。導体ペースト41としては、金
、銀、銀−パラジウム、タングステン、モリブデン等が
用いられ、メタルマスクによるスクリーン印刷によって
スルーホール部に埋込まれる。ペースト精度は300〜
500kcpsである。
Next, FIG. 4 is a cross-sectional view of a green sheet 11 in which through-holes are formed, with conductive paste 41 embedded in the holes. Gold, silver, silver-palladium, tungsten, molybdenum, or the like is used as the conductive paste 41, and is embedded in the through-hole portion by screen printing using a metal mask. Paste accuracy is 300~
It is 500 kcps.

【0010】次に、図5に示す様に、グリーンシート1
1の表面に信号配線、及び電源配線の導体パターン51
を印刷により形成する。導体ペースト材はスルーホール
部と同じものを用い、精度は100〜250kcpsで
ある。パターン形成はスクリーン印刷によって行なわれ
、この時のスクリーンメツシュサイズでは325メツシ
ユのものが用いられる。これで信号パターンの最小線幅
として約100μm、厚さ12μm(乾燥後)の信号配
線パターンが印刷される。 [0011]図65図7は以上の様にしてT/H形成、
導体ペーストの埋込み、導体パターンの印刷を施したシ
ートを1枚1枚位置合せ用のピン65を使って積層型6
4内に積層し、グリーンシートの積層体73にしている
ところである。この時、一番下部には基板ベース72と
なるグリーンシートを数枚置く必要がある。このシート
は電気的には全く意味がなく、単にその上部にグリーン
シートを積層する為だけに必要なものである。基板ベー
ス72のグリーンシートは金型の中でズレない様に下型
下部の穴より真空吸着されている。次にその上にパター
ン形成を施したグリーンシート11をキャリアフィルム
12を付けたまま、逆向きに積層、積層金型(周辺)6
2、積層金型(上部)63および積層金型(下部3)6
4により、軽く熱圧着させ、キャリアフィルム12をと
り除く (図6)。この時、グリーンシート11のキャ
リアフィルム12側と表面側が交互に積層する様にする
。 この熱圧着の温度は80℃、圧力は70kg/cm2で
ある。この様にしてグリーンシートを積層した後に再び
、積層金型62,63.64により熱圧着させる。この
時の温度は110℃、圧力は180kg/cm2である
。これによりグリーンシートは1体化し、セラミックグ
リーンシート積層体となる(図7)。 [0012]基板ベース72はセラミックグリーンシー
ト積層体73を脱バインダー、焼成し、セラミック焼結
体にした後に研削によってとり除き、回路面を露出させ
る。 [0013]なお本実施例はキャリアフィルム上にキャ
スティングされたセラミックグリーンシートにキャリア
フィルムごと位置合せ用の穴21を四隅に形成し、その
後の工程はこの位置合せ用の穴を利用して位置合せを行
ったのであるが、この他にも図8の様にキャリアフィル
ム付グリーンシートを位置合せ及びハンドリングの為の
枠81に貼り付けた様な構造にすることも考えられる。 図9は図8の断面図である。枠81の材質は金属もしく
は変形の小さなエンジニアリングプラスチックが考えら
れ、グリーンシート同士の位置合わせは枠81に位置合
せ用の穴、もしくは溝を付けるか枠81の外形合わせで
行うことが出来る。さらに位置合せの別の方法としてグ
リーンシート面に予め位置合せマークを形成し、各工程
での位置合せはそのマークを光学的に認識することによ
っても可能である。 [0014]
Next, as shown in FIG.
Conductor pattern 51 for signal wiring and power wiring on the surface of 1
is formed by printing. The conductive paste material used is the same as that used for the through-hole portion, and the accuracy is 100 to 250 kcps. Pattern formation is performed by screen printing, and a screen mesh size of 325 meshes is used at this time. In this way, a signal wiring pattern with a minimum line width of about 100 μm and a thickness of 12 μm (after drying) is printed. [0011] Figure 65 Figure 7 shows the T/H formation as described above,
The sheets with embedded conductor paste and printed conductor patterns are stacked one by one using pins 65 for positioning.
4 to form a green sheet laminate 73. At this time, it is necessary to place several green sheets that will become the substrate base 72 at the bottom. This sheet has no electrical meaning at all and is only needed to laminate the green sheet on top of it. The green sheet of the substrate base 72 is vacuum-adsorbed through a hole at the bottom of the lower mold so that it does not shift inside the mold. Next, the green sheet 11 with the pattern formed thereon is laminated in the opposite direction with the carrier film 12 attached, and the laminated mold (periphery) 6
2. Laminated mold (upper part) 63 and laminated mold (lower part 3) 6
4, heat and press lightly and remove the carrier film 12 (Fig. 6). At this time, the carrier film 12 side and the front side of the green sheets 11 are alternately laminated. The temperature of this thermocompression bonding was 80° C. and the pressure was 70 kg/cm 2 . After the green sheets are laminated in this manner, they are again bonded by thermocompression using the lamination molds 62, 63, and 64. At this time, the temperature was 110°C and the pressure was 180 kg/cm2. As a result, the green sheets are unified to form a ceramic green sheet laminate (FIG. 7). [0012] The substrate base 72 is obtained by removing the binder from the ceramic green sheet laminate 73 and firing it to form a ceramic sintered body, which is then removed by grinding to expose the circuit surface. [0013] In this example, alignment holes 21 are formed in the four corners of the ceramic green sheet cast on the carrier film, and the subsequent steps are performed using these alignment holes. In addition to this, it is also conceivable to create a structure in which a green sheet with a carrier film is attached to a frame 81 for positioning and handling, as shown in FIG. FIG. 9 is a cross-sectional view of FIG. 8. The material of the frame 81 may be metal or engineering plastic with small deformation, and the alignment of the green sheets can be performed by providing alignment holes or grooves in the frame 81 or by adjusting the outer shape of the frame 81. Furthermore, another method for alignment is to form alignment marks on the surface of the green sheet in advance, and to perform alignment in each step by optically recognizing the marks. [0014]

【発明の効果】以上説明した様に本発明は、グリーンシ
ートキャスティング時のキャリアフィルムをグリーンシ
ートに付けたまま、各プロセスを流すことによりグリー
ンシートのプロセス中の伸びをなくし、位置ずれのない
セラミック多層配線基板を作ることができる効果がある
[Effects of the Invention] As explained above, the present invention eliminates elongation of the green sheet during the process by performing each process with the carrier film attached to the green sheet at the time of green sheet casting. This has the effect of making it possible to create a multilayer wiring board.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例の縦断面図。FIG. 1 is a longitudinal sectional view of an embodiment of the present invention.

【図2】本発明の一実施例の縦断面図。FIG. 2 is a longitudinal sectional view of one embodiment of the present invention.

【図3】本発明の一実施例の縦断面図。FIG. 3 is a longitudinal sectional view of one embodiment of the present invention.

【図4】本発明の一実施例の縦断面図。FIG. 4 is a longitudinal sectional view of one embodiment of the present invention.

【図5】本発明の一実施例の縦断面図。FIG. 5 is a longitudinal sectional view of one embodiment of the present invention.

【図6】本発明の一実施例の縦断面図。FIG. 6 is a longitudinal sectional view of one embodiment of the present invention.

【図7】本発明の一実施例の縦断面図。FIG. 7 is a longitudinal sectional view of an embodiment of the present invention.

【図8】本発明の他の実施例の縦断面図。FIG. 8 is a longitudinal sectional view of another embodiment of the invention.

【図9】本発明の他の実施例の縦断面図。FIG. 9 is a longitudinal sectional view of another embodiment of the invention.

【符号の説明】[Explanation of symbols]

11  グリーンシート 12  キャリアフィルム 21  位置決め穴 31  スルーホール 41  導体ペースト 51  導体パターン 62  積層金型(周辺) 63  積層金型(上部) 64  積層金型(下部) 65  位置決めピン 71  多層配線層 72  基板ベース 73  積層体 81枠 11 Green sheet 12 Carrier film 21 Positioning hole 31 Through hole 41 Conductor paste 51 Conductor pattern 62 Laminated mold (periphery) 63 Laminated mold (upper part) 64 Laminated mold (lower part) 65 Positioning pin 71 Multilayer wiring layer 72 Board base 73 Laminated body 81 frames

【図1】[Figure 1]

【図2】[Figure 2]

【図3】[Figure 3]

【図4】[Figure 4]

【図5】[Figure 5]

【図6】[Figure 6]

【図7】[Figure 7]

【図8】[Figure 8]

【図9】[Figure 9]

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 グリーンシート法によるセラミック基板
の製造方法において、キャリアフィルム上にキャスティ
ングされたセラミックグリーンシートにスルーホール形
式、前記スルーホールへの導体ペーストの埋込みおよび
グリーンシート面への導体パターン印刷の各工程をキャ
リアフィルムを付けたまま行う第1の工程と、前記第1
の工程を施したキャリアフィルム付グリーンシートを1
枚ずつ順次積層、圧着し、その後キャリアフィルムを引
きはがす第2の工程とを含むことを特徴とするセラミッ
ク多層配線基板の製造方法。
1. A method for manufacturing a ceramic substrate using a green sheet method, which includes forming a through hole in a ceramic green sheet cast on a carrier film, embedding conductive paste in the through hole, and printing a conductive pattern on the surface of the green sheet. a first step in which each step is performed with the carrier film attached;
1 green sheet with carrier film subjected to the process of
1. A method for manufacturing a ceramic multilayer wiring board, comprising the steps of sequentially laminating and press-bonding the boards one by one, and then peeling off the carrier film.
JP4324391A 1990-03-09 1991-03-08 Manufacturing method of ceramic multilayer wiring board Expired - Fee Related JP2906697B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4324391A JP2906697B2 (en) 1990-03-09 1991-03-08 Manufacturing method of ceramic multilayer wiring board

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP5918290 1990-03-09
JP2-59182 1990-03-09
JP4324391A JP2906697B2 (en) 1990-03-09 1991-03-08 Manufacturing method of ceramic multilayer wiring board

Publications (2)

Publication Number Publication Date
JPH04211195A true JPH04211195A (en) 1992-08-03
JP2906697B2 JP2906697B2 (en) 1999-06-21

Family

ID=26382995

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4324391A Expired - Fee Related JP2906697B2 (en) 1990-03-09 1991-03-08 Manufacturing method of ceramic multilayer wiring board

Country Status (1)

Country Link
JP (1) JP2906697B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06120074A (en) * 1991-03-22 1994-04-28 Taiyo Yuden Co Ltd Manufacture of laminated porcelain capacitor
US6942745B2 (en) 2000-12-28 2005-09-13 Matsushita Electric Industrial Co., Ltd. Production method of circuit board module
US7383866B2 (en) 2000-07-31 2008-06-10 Murata Manufacturing Co., Ltd. Manufacturing apparatus for manufacturing electronic monolithic ceramic components

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06120074A (en) * 1991-03-22 1994-04-28 Taiyo Yuden Co Ltd Manufacture of laminated porcelain capacitor
JPH0793230B2 (en) * 1991-03-22 1995-10-09 太陽誘電株式会社 How to stack ceramic sheets
US7383866B2 (en) 2000-07-31 2008-06-10 Murata Manufacturing Co., Ltd. Manufacturing apparatus for manufacturing electronic monolithic ceramic components
US8657987B2 (en) 2000-07-31 2014-02-25 Murata Manufacturing Co., Ltd. Manufacturing apparatus for manufacturing electronic monolithic ceramic components
US6942745B2 (en) 2000-12-28 2005-09-13 Matsushita Electric Industrial Co., Ltd. Production method of circuit board module

Also Published As

Publication number Publication date
JP2906697B2 (en) 1999-06-21

Similar Documents

Publication Publication Date Title
EP0565033B1 (en) Method for fabricating a ceramic multi-layer substrate
JP4045143B2 (en) Manufacturing method of wiring film connecting member and manufacturing method of multilayer wiring board
JP2004235323A (en) Manufacturing method of wiring substrate
JPH05167254A (en) Manufacture of ceramic multilayer electronic component
JP2581436B2 (en) Manufacturing method of ceramic multilayer wiring board
JP4553466B2 (en) Printed circuit board
US4802945A (en) Via filling of green ceramic tape
JPH04211195A (en) Manufacture of ceramic multilayered wiring board
JP3846241B2 (en) Manufacturing method of multilayer ceramic electronic component
KR100366411B1 (en) Multi layer PCB and making method the same
JP2758603B2 (en) Manufacturing method of ceramic multilayer wiring board
JP2797827B2 (en) Manufacturing method of ceramic multilayer wiring board
JP2560947B2 (en) Method for manufacturing ceramic multilayer wiring board
JP2004063701A (en) Production of flexible printed wiring board
JP2002353619A (en) Multilayer wiring board and base material for multilayer interconnection, and method of manufacturing the same
JPH0545079B2 (en)
JPH06224557A (en) Manufacture of ceramic multilayer block provided with cavity
JPH06169172A (en) Method for manufacturing multilayer printed board
JPH06124848A (en) Manufacture of laminated ceramic capacitor
JP2001077505A (en) Through hole forming method
JP2001237549A (en) Multilayered wiring board and its manufacturing method
JPH03283595A (en) Manufacture of ceramic multilayer circuit board
JP3266986B2 (en) Manufacturing method of ceramic multilayer substrate
JPS62125692A (en) Via filling of green sheet
JPH09246721A (en) Manufacture of multilayer ceramic substrate

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19990302

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080402

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090402

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100402

Year of fee payment: 11

LAPS Cancellation because of no payment of annual fees