JPH04199515A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve resistance against etching and pattern controllability after the etching by wet-etching a base film to predetermined depth with a resist pattern as used a mask and then having the resist pattern subjected to far-ultraviolet-ray irradiation. CONSTITUTION:A silicon oxide film 2 is formed on a wafer 1, and photo sensitive resist is applied entirely thereon to form a resist pattern 3. Then with the resist pattern 3 used as a mask, the silicon oxide film 2 is subjected to wet etching and etched away to predetermined depth. Then after the resist pattern 3 is subjected to far-ultraviolet-ray irradiation a remaining part of the silicon oxide film 2 not covered by the resist pattern 3 is subjected to anisotropic dry etching and etched away to have the wafer 1 exposed. Thus a highly accurate pattern can be formed and an appropriate contact hole can be obtained.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method of manufacturing a semiconductor device.

[Conventional technology]

In recent years, as semiconductor integrated circuits have become highly integrated and miniaturized, circuit patterns formed on semiconductor substrates (hereinafter simply referred to as wafers) have also become miniaturized and their structures have become more complex. Particularly, in the formation of contact holes, hole pattern formation with small opening size and large depth has become one of the important techniques, and various improvements have been made.

FIG. 3 is a cross-sectional view schematically showing a method for forming a pattern of a contact hole portion in a conventional semiconductor device.

First, a chemical vapor deposition method (hereinafter referred to as CVD) is applied onto the wafer (1).
After forming a silicon oxide film (2) by a method (referred to as a method), a photosensitive resist is applied to the entire surface, and pattern transfer is performed through a photomask (not shown) on which a predetermined pattern has been formed. By developing this, a resist pattern (3) is formed (FIG. 3(a)).

Next, a plurality of wafers (1) or cassettes stored in parallel are stored in a convection oven, and a 150'C16
Bost bake for about 0 minutes. At this time, the lens I pattern (3) shrinks due to the heat, and the cross-sectional shape of the resist becomes the rounded shape (31) after development. In addition, the wafer (1
), stress is applied from the periphery to the inside, and the shape of the entire pattern is not perpendicular to the wafer (1).
It will be in a tilted state.

Furthermore, this boss baking is generally performed to increase the adhesion between the resist pattern (3) and its underlying film, or as shown in FIG. The resistance is not necessarily sufficient, and peeling (5) of the resist may occur, especially at the edge interface of the resist pattern (3) (FIG. 3(b)).

Next, using the resist pattern (3) as a mask, wet etching of the oxide film (2) is performed using a hydrofluoric acid solution to a depth where the substrate (1) is not exposed. At this time, as shown in FIG. 6, the etching solution penetrates through the resist peeling (5), increasing the side etch (4).

Next, in order to strengthen the dry etching resistance of the lens 1-(3), it is again subjected to a boost bake at 150 DEG C. for about 160 minutes in a convection oven. This allows the resist (
A part of the end corner of 3) will be further rounded. (Figure 3(d)).

Next, using this resist (3) as a mask, the silicon oxide film (2) is subjected to anisotropic tri-etching which increases the etching rate in the direction perpendicular to the lateral direction of the wafer (1) surface. As a result, the remaining part of the silicon oxide film (2) that is not covered by the lens (.(3)) is removed.
The substrate (1) will be exposed (FIG. 3(d)).

Thereafter, the resist (3) is removed by an ashing method to form a tapered contact hole.

[Problem to be solved by the invention]

The conventional method for forming a contact hole portion in a semiconductor device is as described above. By performing a boss bake before performing wet etching, the lens l-(3) is caused to shrink due to heat, as shown in FIG. 3 (bl). The shape became rounded, and as shown in Figure 4, stress was applied to the resist (3), causing distortion in the pattern shape, making it impossible to form a highly accurate pattern.Furthermore, as shown in Figure 5. As shown in FIG. 2, wet etching increases the side etch due to resist flaking (5), making it difficult to form a highly accurate pattern.

In addition, in general, the post-bake process is performed manually in large quantities at one time, so there is a secondary problem that there is a large amount of waste, which has a large effect.

This invention was made in order to solve the above-mentioned problems, and it is an object of the present invention to provide a manufacturing method that allows highly accurate pattern formation, provides suitable contact holes, and forms a highly reliable semiconductor device. With the goal.

[Means to solve the problem]

The method for manufacturing a semiconductor device according to the present invention includes a first step of forming a resist pattern on a film to be etched formed on a substrate, and wet etching the film to be etched using the resist pattern as a mask. a second step of etching away the resist pattern to a predetermined depth; a third step of irradiating the resist pattern with deep ultraviolet rays; and anisotropic dry etching of the remaining portion of the film not covered by the resist pattern. and a fourth step of removing the substrate by etching to expose the substrate.

[Effect]

In the method of manufacturing a semiconductor device according to the present invention, when forming a contact hole, the resist pattern is irradiated with deep ultraviolet rays to improve etching resistance, improve pattern controllability after etching, and enable highly accurate formation. It has an effect.

〔Example〕 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a cross-sectional view schematically showing a method for forming a pattern of a contact hole portion of a semiconductor device according to an embodiment of the present invention.

First, a silicon oxide film (2) is formed on a wafer (1) to a thickness of about 11,000 by CVD. Next, a photosensitive resist is applied over the entire surface, a predetermined pattern is transferred through a photomask, and then developed to form a resist pattern (3) in which a contact hole portion is to be formed. form (Fig. 1 (a)
)).

Next, using this resist pattern (3) as a mask, the silicon oxide film (2) is etched using a hydrofluoric acid solution to a depth of approximately 6,000 mm using the sea urchin etching method. At this time, since the resist pattern (3) is not subjected to the boss baking process, there is no change in the overall shape or cross-sectional shape of the resist pattern (3) unlike in the conventional example, and the desired pattern dimensions and pattern shape are maintained. (Figure 1(b)).

Next, curing with deep ultraviolet rays (hereinafter referred to as deep UV curing) is performed for about 100 seconds while raising the temperature from room temperature to 140°C. This creates a resist pattern (3
) to improve the density with the underlying film and improve the etching resistance. In this process, there is no slight shrinkage or rounding of the end corners of the resist pattern (3), and since the wafer (1) is processed in single wafers, processing such as automatic transport is possible, and it can be carried out manually. Since the work can be eliminated, complete abolition can be reduced (Figure 1 (C)).

Next, using the deep-LIV cured resist pattern (3) as a mask, the resist pattern (3) of the silicon oxide film (2) is etched by anisotropic dry etching.
3) is removed so that the substrate (1) is exposed (FIG. 1(d)).

Thereafter, the resist pattern (3) is removed using an alignment process to form a tapered contact hole.

By forming a pattern on the wafer (1) in this manner, a highly reliable semiconductor device can be obtained.

By the way, FIG. 2 is a sectional view showing a semiconductor device to which the manufacturing method of the present invention is applied.

In the figure, (1) is the wafer, (6) is the source/drain of the impurity layer, (7) is the gate made of doped polysilicon, (8) is the gate insulating film made of silicon oxide film, and (9) is the gate. (7) This is an insulating film that covers. α0) is a storage node made of polysilicon, 0υ is a capacitor insulating film on the storage node Go), 02 is a cell plate made of doped polysilicon, and 03 is TE0
The interlayer insulating film 04) made of 1 is a bit line connected to the drain (6) through a contact hole provided in the interlayer insulating film 03.

By applying this structure to a contact hole, a highly reliable semiconductor device can be obtained.

In the above embodiment, the contact hole portion was explained, but the present invention is not limited to this, and it goes without saying that the present invention can be applied to any process where wet etching and dry etching are used together.

〔Effect of the invention〕

As described above, according to the present invention, after wet etching the base film to a predetermined depth using the resist pattern as a mask, deep-UV curing is performed, and then anisotropic dry etching is performed to cover the base film with the resist pattern. Since the base film is removed in the portions where the pattern is not formed, highly accurate pattern formation is performed, and a highly reliable semiconductor device can be obtained.

[Brief explanation of the drawing]

1(a) to (d) are cross-sectional views showing a pattern forming method for a semiconductor device according to an embodiment of the present invention, FIG. 2 is a cross-sectional view showing a semiconductor device to which the forming method of the present invention is applied, and FIG. Figure (a
) to (e) are cross-sectional views showing a conventional pattern forming method for a semiconductor device, FIG. 4 is a cross-sectional view schematically illustrating the occurrence of distortion in the resist shape after post-baking in the conventional pattern forming method, and FIG. 6 is a cross-sectional view schematically showing peeling of the resist after boss baking in a conventional pattern forming method, and FIG. 6 is a cross-sectional view showing side etching caused by wet etching the resist shown in FIG. In the figure, (11 is a wafer, (2) is a silicon oxide film, (3) is a resist pattern, and 03 is an interlayer insulating film. In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] A first step of forming a resist pattern on a film to be etched formed on a semiconductor substrate, and a second step of performing wet etching to remove the film to be etched to a predetermined depth using the resist pattern as a mask. and a third step of irradiating the resist pattern with deep ultraviolet rays.
and a fourth step of etching away the remaining portion of the film to be etched that is not covered by the resist pattern by performing an anisotropic dry etching process to expose the substrate.
A method for manufacturing a semiconductor device, comprising the steps of: