JPH04195610A - Process controller - Google Patents

Abstract

PURPOSE:To improve the controllability by selecting and setting the best sampling period according to a total calculated arithmetic processing time and setting a clock period corresponding to this period in a real-time clock generation part. CONSTITUTION:The memory RAM of a central processing part 2 is stored with the set value of the sampling period and the set values of the arithmetic contents of blocks 1...100. When the arithmetic contents are altered, the central processing part 2 is actuated in response to a parameter setting command from a parameter setting part 3 to read in setting data, and the arithmetic contents are set according to the setting data. At the same time, the total of arithmetic processing time is calculated, the best sampling period is selected and set according to the total value, and further the real-time clock period is set. Consequently, the best sampling period corresponding to the processing time of the arithmetic is automatically set, there is no trouble, and the good controllability is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a process control device, and particularly to a process control device in which calculations are executed cyclically and the content of the calculations can be changed.

(b) As shown in FIG. 3, a conventional technical process control device includes an external input processing section 1, a central processing section 2, a parameter setting section 3,
Some devices include a real-time clock generating section 4 and an external output processing section 5. The external input processing section 1 includes a multiplexer, an A/D converter, etc., and the central processing section 2 includes a CPU,
The parameter setting section 3 includes a keyboard, memory, etc.
Including decoder etc. Further, the real-time clock generating section 4 includes an oscillator, a frequency divider, etc., and the external output processing section 5 includes a multiplexer, a D/A converter, etc. By setting the clock period, the real-time clock generator 4 determines the frequency division ratio from the oscillator in accordance with the set clock period, generates real-time clock pulses for each sampling period, and executes the central processing. Department 2 will be staffed. The CPU of the central processing unit 2 controls circuit operations and executes internal calculations, and the memory is used to store basic programs, calculation subroutines, fixed data tables, etc., ROM, work area, and calculation contents (parameters). It consists of RAM.

In this conventional process control device, as shown in FIG. 4, initial processing is started when the power is turned on or the device is reset, the real-time clock period is set based on the sampling period setting value Δt, and other initial processing ( Clear the work area and set initial data). After there is some free time, the cyclic processing starts with the first real-time clock pulse that occurs. As shown in Figure 5, the cyclic processing is executed in the order of external input processing, arithmetic processing of blocks 1 to 100, and external output processing, and then, after there is free time, it is executed again at the occurrence of the next real-time clock pulse. Cyclic processing is started, and thereafter, it is similarly started and executed every sampling period.

Further, as shown in FIG. 6, when a parameter setting operation is performed, a parameter setting command is generated, and the parameter setting process is started immediately after the cyclic process ends due to the interrupt priority process. However, when the next real-time clock pulse occurs, the parameter setting process is temporarily interrupted, cyclic processing is executed, and then the parameter setting process is restarted. From then on, this process is repeated to actually rewrite the parameter data in memory. The parameter setting process ends. Here, the parameters include, for example, the calculation contents for each calculation block, the setting value of the sampling period, and the like. The parameter setting command is issued, for example, by key operation such as "set" or "change j."

FIG. 7 is a flowchart showing the initial processing, cyclic processing, and parameter setting processing, in which solid lines indicate the flow of processing and broken lines indicate the flow of data.

In the calculation processing of each block from block 1 to block 100, the calculation contents (parameter data) on the RAM are referred to, and the corresponding subroutines on the ROM are called and sequentially executed. Also, in the parameter setting process,
Rewrite the calculation contents on RAM. During initial processing, the sampling period setting value Δt that is referenced is also one of the parameters, exists on the RAM, and is read out.

(c) Problems to be Solved by the Invention In the conventional process control devices described above, the sampling period when cyclically executing calculations is fixed depending on the device, or is determined by taking into account the processing time depending on the calculation content. It was selected manually.

By the way, controllability is generally better when the sampling period is as short as possible. However, if the sampling period is fixed as in the past, there will be a lot of dead time within the period when the calculation content is small and the processing time is not long; if it can be selected manually, each time the calculation content is changed In order to improve controllability, it takes time and effort to select and set an appropriate sampling period, and there is also the risk of accidentally selecting a sampling period that is too short and inappropriate for the processing time. There was a problem that it would not complete properly.

This invention has been made in view of the above-mentioned problems, and is a process that automatically selects the optimum sampling period and simultaneously sets the period of the real-time clock even if the calculation contents are set or changed. The purpose is to provide a control device.

(d) Means and Effects for Solving the Problems The process control device of the present invention has an external human power processing section, a real-time clock generation section, a parameter setting section, an external output processing section, and a process control device that can be operated by turning on the power or resetting the device. an initial processing means activated by an interrupt, a cyclic processing means activated by an interrupt caused by a real-time clock pulse from the real-time clock generation section, which takes in an input signal from the outside, executes a predetermined calculation, and outputs it to the outside; and a parameter. A parameter setting processing means that is activated by an interrupt caused by a setting command, wherein the parameter setting processing means includes a calculation processing time total calculation means that calculates a total value of calculation processing time, and an optimum sampling period from this total calculation processing time. The present invention is characterized by comprising an optimum sampling period selection and setting means for selecting and setting an optimum sampling period, and a clock period setting means for setting a clock period corresponding to the optimum sampling period in the real-time clock generating section.

In this process control device, when changing the settings of calculation contents, when a parameter setting command is issued from the parameter setting section,
The parameter processing means (central processing unit) is activated, reads the setting data, and sets the calculation contents based on the setting data. At the same time, calculate the total calculation processing time,
Based on this total value, the optimum sampling period (a time greater than the total value and as short as possible) is selected and set, and the real-time clock period is further set.

As a result, the calculation contents on the memory are rewritten, and at the same time, the optimum sampling period is set for the real-time clock generation section by the real-time clock period setting means.

(E) Examples The present invention will be explained in more detail with reference to Examples below.

The hardware configuration of a process control device in which the present invention is implemented is similar to that shown in FIG.

The flowchart of the process control apparatus of this embodiment is compared with that shown in FIG. 7, and only the differences are shown in FIG. 1, which differs in the parameter setting processing routine. The memory of the central processing unit 2 has a ROM containing subroutines such as Σ (addition), Δ (subtraction), × (multiplication), ÷ (division), f (square root), etc. (same as shown in Fig. 7). , the maximum processing time of each operation is stored. Also, memory R
AM includes the sampling period setting value, block 1, ・
. . . Setting values for the calculation contents of the block 100 (codes that specify the calculation contents) are stored. Incidentally, FIG. 2 shows an example of processing timing of the process control apparatus of this embodiment.

When a reparameter setting command is input from the parameter setting unit 3 during the cyclic processing, the parameter setting processing is started immediately after the cyclic processing ends due to the interrupt priority processing. At the start of the parameter setting process, first, parameter setting values are read (step 5TI). Then, the total processing time T is calculated based on the read setting data and its maximum processing time (step 5T).
2). The illustrated example shows a case where the calculation content of block 30 is changed from Δ (subtraction) to ÷ (division). The total processing time T is the total of the maximum calculation processing time for each block from block 1 to block 100, so when changing the calculation content of block 30 from Δ to ÷, the total processing time up to that point is changed by Δ Just subtract the maximum processing time of , and add the maximum processing time of 10.

Next, it is determined whether the total processing time T is larger than the previous sampling period Δt (step 5T3). If this determination is YES, first, ΔL′, which is the shortest time larger than the total processing time T, is set as the optimal sampling period. Select and set as . In other words, store it in RAM (
Step 5T4). The real-time clock cycle is also reset in the real-time clock generator 4 (step 5).
T5). Finally, the calculation content ÷ is set in the RAM block 30 (step 5T5). Here, T〉Δt
Then, the calculation content ÷ is set at the end.If the calculation content is changed first, then when cyclic processing is started with the arrival of the next real-time clock after the change, the calculation content will remain the same and the sampling period Δt will remain the same. This is because there is a possibility that the processing time will exceed ΔL and the arithmetic processing may not be able to be completed entirely because only the data has been newly changed.

Therefore, if T>Δt is not determined in step ST3,
Since there is no risk of that happening, write and set the calculation content ÷ instead of Δ in block 30 of RAM (step 5T7).
Next, based on this total processing time, an optimal sampling period Δt, which is the shortest sampling period that allows the processing to be completed, is determined, and this is replaced with the set value ΔL of the sampling period. In other words, set it in RAM (
Step 5T8). Furthermore, the real-time clock period is also reset in the real-time clock generator 4 (step 5T9). As illustrated in Fig. 2, if the next real-time clock enters before the parameter setting process is completed, the parameter setting process is interrupted and the process returns to the cyclic process. The process is restarted, and thereafter it is interrupted using the real-time clock until the parameter setting process is completed, and then restarted when the cyclic process is completed. At the end of the parameter setting process, the sampling period and real-time clock period Δt are changed to a new value Δt". From now on, the sampling period is Δt'
Therefore, real-time clock pulses are also generated at a period of Δt.

Note that in the above embodiments, the external input processing section and the external output processing section may transmit and receive data through communication. Further, although the real-time clock generating section is assumed to have a hardware configuration such as an oscillator and a frequency divider, it may be replaced with a software component.

In addition, although the calculation contents are set for each block and a subroutine corresponding to the calculation contents is called, it is also possible to set the input/output processing and calculation contents for each block in a stepwise manner, in other words, processing is performed cyclically. The sampling period may be selected based on the total time required for the portion.

(f) Effects of the Invention According to this invention, since the optimum sampling period corresponding to the processing time of the calculation at that time is automatically set,
Good controllability can be obtained without much effort. Further, since the sampling period is automatically set to the optimum value as necessary each time the calculation contents are changed, there is no risk of setting an inappropriate sampling period by mistake.

[Brief explanation of the drawing]

FIG. 1(A) and FIG. 1(B) are flowcharts for explaining parameter setting processing of a process control device according to an embodiment of the present invention, and FIG. 2 is a processing timing diagram of the process control device according to the embodiment. FIG. 3 is a block diagram showing the hardware configuration of a process control device in which the present invention is implemented, and FIG.
5 is a diagram showing the timing of initial processing of the same process control device, FIG. 5 is a diagram showing the timing of cyclic processing of the same process control device, and FIG. 6 is a diagram showing the timing of conventional parameter setting processing. , FIG. 7 is a flow diagram for explaining processing operations of a conventional process control device. 1: External input processing section, 2: Central processing section, 3: Parameter setting section, 4: Real-time clock generation section, 5: External output processing section. Patent applicant: Shimadzu Corporation Agent
Patent Attorney Shigeru Nakamura Figure 1 (A)

Claims (1)

[Claims] (1) An external input processing section, a real-time clock generation section, a parameter setting section, an external output processing section, an initial processing means activated by an interrupt caused by power-on or device reset, and a real-time clock generation section from the real-time clock generation section. A process control device that includes a cyclic processing means that is activated by an interrupt caused by a clock pulse, takes in an input signal from the outside, executes a predetermined calculation, and outputs it to the outside, and a parameter setting processing means that is activated by an interrupt caused by a parameter setting command. In the parameter setting processing means, a calculation processing time total calculation means for calculating a total value of calculation processing time, an optimal sampling period selection and setting means for selecting and setting an optimal sampling period from this total calculation processing time,
A process control device comprising: clock cycle setting means for setting a clock cycle corresponding to the optimum sampling cycle in the real-time clock generator.