JPS57204962A - Programmable logic controller - Google Patents

Programmable logic controller

Info

Publication number
JPS57204962A
JPS57204962A JP9026481A JP9026481A JPS57204962A JP S57204962 A JPS57204962 A JP S57204962A JP 9026481 A JP9026481 A JP 9026481A JP 9026481 A JP9026481 A JP 9026481A JP S57204962 A JPS57204962 A JP S57204962A
Authority
JP
Japan
Prior art keywords
cpu
instruction
instruction execution
program
outputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9026481A
Other languages
Japanese (ja)
Other versions
JPS6156820B2 (en
Inventor
Yukio Kato
Junichiro Fukuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Tateisi Electronics Co
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tateisi Electronics Co, Omron Tateisi Electronics Co filed Critical Tateisi Electronics Co
Priority to JP9026481A priority Critical patent/JPS57204962A/en
Publication of JPS57204962A publication Critical patent/JPS57204962A/en
Publication of JPS6156820B2 publication Critical patent/JPS6156820B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Executing Machine-Instructions (AREA)
  • Multi Processors (AREA)
  • Programmable Controllers (AREA)
  • Advance Control (AREA)

Abstract

PURPOSE:To address the second and following words of an operation instruction immediately when the instruction execution right is transferred from a sequence instruction executing CPU to an operation instruction executing CPU, by providing a specific program counter. CONSTITUTION:A program counter 1 is provided which is counted up alternatively by the instruction execution end signal, which is outputted from the first CPU 15 for sequency instruction execution for every instruction end, or the access signal for a program memory, which is outputted from the second CPU 5 for data operation instruction execution, and designates an address of a program memory 3 with the output of itself. When the instruction execution right is given to the CPU 15, the program counter 1 is counted up by the instruction execution end signal outputted from the CPU 15; and when the instruction excution right to the CPU 5, the access signal is transmitted prescribed times from the CPU 5 to the program, counter 1 to take words constituting a data operation instruction into the CPU 5.
JP9026481A 1981-06-12 1981-06-12 Programmable logic controller Granted JPS57204962A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9026481A JPS57204962A (en) 1981-06-12 1981-06-12 Programmable logic controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9026481A JPS57204962A (en) 1981-06-12 1981-06-12 Programmable logic controller

Publications (2)

Publication Number Publication Date
JPS57204962A true JPS57204962A (en) 1982-12-15
JPS6156820B2 JPS6156820B2 (en) 1986-12-04

Family

ID=13993638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9026481A Granted JPS57204962A (en) 1981-06-12 1981-06-12 Programmable logic controller

Country Status (1)

Country Link
JP (1) JPS57204962A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01166222A (en) * 1987-12-23 1989-06-30 Matsushita Electric Works Ltd Arithmetic circuit constitution for program controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01166222A (en) * 1987-12-23 1989-06-30 Matsushita Electric Works Ltd Arithmetic circuit constitution for program controller

Also Published As

Publication number Publication date
JPS6156820B2 (en) 1986-12-04

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