JPS5552128A - Input and output control system for information processing system - Google Patents

Input and output control system for information processing system

Info

Publication number
JPS5552128A
JPS5552128A JP12413878A JP12413878A JPS5552128A JP S5552128 A JPS5552128 A JP S5552128A JP 12413878 A JP12413878 A JP 12413878A JP 12413878 A JP12413878 A JP 12413878A JP S5552128 A JPS5552128 A JP S5552128A
Authority
JP
Japan
Prior art keywords
input
chc2
production
output operation
condition code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12413878A
Other languages
Japanese (ja)
Inventor
Hiroaki Kamibayashi
Rikio Awabayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12413878A priority Critical patent/JPS5552128A/en
Publication of JPS5552128A publication Critical patent/JPS5552128A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To make easy the investigation of cause due to unsuccessful start, by giving the time monitor information to a part of the input and output state words from the generation of input and output operation to the condition code generation.
CONSTITUTION: CPU1 provides the timer TC1, and when the start of input and output operation is instructed to the channel control unit CHC2, the monitor in which response from CHC2 is present within the predetermined time, is made. When the condition code is fed from CHC2, CPU1 sets this code to the area of the status word and the time elapsed information from the production of input and output operation to the condition code production is set. If start is unsuccessful, when the said information is analyzed, the production of failure in CHC2 and channel CH3 can be discriminated.
COPYRIGHT: (C)1980,JPO&Japio
JP12413878A 1978-10-11 1978-10-11 Input and output control system for information processing system Pending JPS5552128A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12413878A JPS5552128A (en) 1978-10-11 1978-10-11 Input and output control system for information processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12413878A JPS5552128A (en) 1978-10-11 1978-10-11 Input and output control system for information processing system

Publications (1)

Publication Number Publication Date
JPS5552128A true JPS5552128A (en) 1980-04-16

Family

ID=14877853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12413878A Pending JPS5552128A (en) 1978-10-11 1978-10-11 Input and output control system for information processing system

Country Status (1)

Country Link
JP (1) JPS5552128A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS617952A (en) * 1984-06-15 1986-01-14 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Active trace collector
JPS6428760A (en) * 1987-07-24 1989-01-31 Hitachi Ltd Channel trouble processing system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS617952A (en) * 1984-06-15 1986-01-14 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Active trace collector
JPS6428760A (en) * 1987-07-24 1989-01-31 Hitachi Ltd Channel trouble processing system

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