JPH04188849A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH04188849A JPH04188849A JP31878990A JP31878990A JPH04188849A JP H04188849 A JPH04188849 A JP H04188849A JP 31878990 A JP31878990 A JP 31878990A JP 31878990 A JP31878990 A JP 31878990A JP H04188849 A JPH04188849 A JP H04188849A
- Authority
- JP
- Japan
- Prior art keywords
- contact resistance
- oxide film
- conductive layer
- film
- resistance value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 9
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 abstract description 10
- 238000001312 dry etching Methods 0.000 abstract description 4
- 239000007795 chemical reaction product Substances 0.000 abstract description 3
- 238000005530 etching Methods 0.000 abstract description 3
- 150000002500 ions Chemical class 0.000 abstract description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- 229910052719 titanium Inorganic materials 0.000 description 5
- 239000010936 titanium Substances 0.000 description 5
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 4
- 238000005259 measurement Methods 0.000 description 4
- 229910052750 molybdenum Inorganic materials 0.000 description 4
- 239000011733 molybdenum Substances 0.000 description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000012895 dilution Substances 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 1
- 238000009279 wet oxidation reaction Methods 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は半導体装置の導電層間のコンタクト形成方法に
関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming contacts between conductive layers of a semiconductor device.
［従来の技術］
従来技術においては、半導体基板上の第１の導電層上に
設けられた紛縁膜上にコンタクトホールを形成後、層構
成が少なくとも一層以上である第２の導電層を形成する
方法が一般的であった。[Conventional technology] In the conventional technology, after forming a contact hole on a dosing film provided on a first conductive layer on a semiconductor substrate, a second conductive layer having a layer structure of at least one layer is formed. The common method was to
［発明が解決しようとする課題］
しかしながら前述の従来技術においては、コンタクトホ
ールの形成はりアクティブイオンエチングなどのドライ
エツチング法によるのが一般的である。この場合ドライ
エツチングにおけるイオン等の照射損傷やチャージ並び
にエツチングガス等による反応生成物により、コンタク
ト抵抗が増大しかつ大きなばらつきを持つ事は良く知ら
れている。[Problems to be Solved by the Invention] However, in the prior art described above, contact holes are generally formed using a dry etching method such as active ion etching. In this case, it is well known that the contact resistance increases and varies widely due to damage caused by ion radiation during dry etching, charge, and reaction products caused by etching gas and the like.
そこで本発明はこのような問題点を解決するもので、そ
の目的とするところはコンタクト抵抗値とそのばらつき
を低減させることにある。The present invention is intended to solve these problems, and its purpose is to reduce the contact resistance value and its variation.
［課題を解決するための手段］
本発明の半導体装置の製造方法は、半導体基板上の第１
の導電層上に設けられた絶縁膜にコンタクトホールを形
成する工程と、酸化膜を形成する工程と、形成した酸化
膜を除去する工程と、層構成が少なくとも一層以上であ
る第２の導電層を形成する工程とからなることを特徴と
する特［実施例］
以下本発明について実施例に基づき説明する。第１図は
本発明の実施例を工程順に示す断面図である。第１図（
ａ）において１はシリコン基板、２は第１の導電層であ
るＮ°拡散層、３は絶縁膜であり、４は絶縁膜に開口し
たコンタクトホールである。次に（ｂ）図のごとくドラ
イ酸化またはウェット酸化により、コンタクトホール内
に１０ｎｍから１１００ｎ程度の酸化膜５を形成する。[Means for Solving the Problems] A method for manufacturing a semiconductor device according to the present invention provides a first method for manufacturing a semiconductor device on a semiconductor substrate.
a step of forming a contact hole in an insulating film provided on the conductive layer, a step of forming an oxide film, a step of removing the formed oxide film, and a second conductive layer having a layer structure of at least one layer. [Example] The present invention will be described below based on Examples. FIG. 1 is a sectional view showing an embodiment of the present invention in the order of steps. Figure 1 (
In a), 1 is a silicon substrate, 2 is an N° diffusion layer which is a first conductive layer, 3 is an insulating film, and 4 is a contact hole opened in the insulating film. Next, as shown in the figure (b), an oxide film 5 with a thickness of about 10 nm to 1100 nm is formed in the contact hole by dry oxidation or wet oxidation.
次いで（Ｃ）図のごとくコンタクトホール内に形成され
た酸化膜を弗酸系の溶液で除去する。続いて（ｄ）図の
ごとく層構成が少なくとも一層以上である第２の導電層
として、６に示す１％シリコンを含有するアルミニウム
をスツバツタリング法にて堆積後、バターニングする。Next, as shown in the figure (C), the oxide film formed in the contact hole is removed using a hydrofluoric acid solution. Subsequently, as shown in the figure (d), as a second conductive layer having a layer structure of at least one layer, aluminum containing 1% silicon as shown in 6 is deposited by a sputtering method and then buttered.
第２図は従来技術と本実施例によるコンタクト抵抗の測
定結果をヒストグラムに示したものである。これらはコ
ンタクトサイズ２ミクロン角のコンタクト抵抗をケルビ
ン法にて測定した結果であり、第１の導電層はＮ型拡散
層、また第２の導電層は１％シリコンを含有するアルミ
ニウムである。またこの時のコンタクトホール内に形成
した酸化膜は８２０度Ｃのウェット希釈酸化２０分処理
により膜厚はＮ°拡散層上で３０ｎｍであった。第２図
（ａ）は従来技術によるコンタクト抵抗の測定結果、ま
た第２図（ｂ）は本実施例によるコンタクト抵抗の測定
結果である。第２図から明かのように、本発明によれば
、コンタクト抵抗の平均値とばらつきを大幅に低減する
事が可能となる。ところで本実施例においては、第１の
導電層としてシリコン基板上のＮ十拡散層を例として用
いたが、これは多結晶シリコン、またはチタン、タング
ステン、モリブデン等のポリサイドまたはシリサイド、
またはチタン、タングステン、モリブデン等の高融点金
属においてもまったく同様に適用可能である。また層構
成が少なくとも一層以上である第２の導電層として、１
％シリコンを含有するアルミニウムを例として説明した
が、これは多結晶シリコン、またはチタン、タングステ
ン、モリブデン等のポリサイドまたはシリサイド、また
はチタン、タングステン、モリブデン等の高融点金属、
または鋼やパラジウムを含むアルミニウム、またはチタ
ン、チタンナイトライド、チタンタングステン等の高融
点金属並びにその化合物等とアルミニウム並びにアルミ
ニウム合金との積層配線においてもまったく同様に適用
可能である。FIG. 2 is a histogram showing the measurement results of contact resistance according to the prior art and this embodiment. These are the results of measuring the contact resistance of a contact size of 2 microns square using the Kelvin method, and the first conductive layer is an N-type diffusion layer, and the second conductive layer is aluminum containing 1% silicon. Further, the oxide film formed in the contact hole at this time was subjected to wet dilution oxidation treatment at 820° C. for 20 minutes to have a film thickness of 30 nm on the N° diffusion layer. FIG. 2(a) shows the measurement results of contact resistance according to the conventional technique, and FIG. 2(b) shows the measurement results of contact resistance according to the present embodiment. As is clear from FIG. 2, according to the present invention, it is possible to significantly reduce the average value and variation in contact resistance. By the way, in this embodiment, an N0 diffusion layer on a silicon substrate is used as an example of the first conductive layer, but this may be made of polycrystalline silicon, polycide or silicide such as titanium, tungsten, molybdenum, etc.
Alternatively, high melting point metals such as titanium, tungsten, and molybdenum can be similarly applied. Further, as a second conductive layer having a layer structure of at least one layer, 1
Although aluminum containing % silicon has been explained as an example, this may be polycrystalline silicon, or polycide or silicide such as titanium, tungsten, or molybdenum, or high melting point metal such as titanium, tungsten, or molybdenum,
Alternatively, it can be applied in exactly the same way to a laminated wiring of steel, aluminum containing palladium, or a high melting point metal such as titanium, titanium nitride, titanium tungsten, or a compound thereof, and aluminum or an aluminum alloy.
［発明の効果］
以上述べてきたように本発明によれば、コンタクトホー
ル形成後、酸化膜を形成し、次に形成した酸化膜を除去
することにより、コンタクトホールをドライエツチング
法で形成したときに導入されたイオン等の照射損傷やチ
ャージ並びにエツチングガス等による反応生成物を除去
することが可能となり、結果としてコンタクト抵抗の低
減とばらつきの減少が可能となる。[Effects of the Invention] As described above, according to the present invention, after forming a contact hole, an oxide film is formed and then the formed oxide film is removed, so that when a contact hole is formed by a dry etching method, It becomes possible to remove irradiation damage caused by ions, etc. introduced into the contact surface, charge, and reaction products caused by etching gas, etc., and as a result, it becomes possible to reduce contact resistance and variation.
第１因は本発明の実施例を工程順に示す断面図であり、
第２図は従来技術と本実施例によるコンタクト抵抗の測
定結果を示すヒストグラムである。
１ シリコン基板
２ Ｎ＋拡散層
３ 絶縁膜
４ コンタクトホール
５ コンタクトホール内に形成した酸化膜６１％シリコ
ンを含有するアルミニウム以上
出願人 セイコーエプソン株式会社
代理人 弁理士 鈴木喜三部（他１名）第１図
２６２８３０３２３４３６３８４０４２４４４６４８５
０５２５４ ｇ６５１１１１０ｃｏｒａｉｃｔ ｒｍｗ
ａｎｃａ （ｏｈｍ １２０２２ｌ２Ｏ２２２４２６２
６３０３２３４３６３８４０４２４４４６４８６０６２
５４ｒｍｌｓｔａｎｃｓ （ｏｈｍ １２乙Ｉ￥ｌ ｒ
ｂ）The first factor is a cross-sectional view showing the embodiment of the present invention in the order of steps,
FIG. 2 is a histogram showing the measurement results of contact resistance according to the prior art and this embodiment. 1 Silicon substrate 2 N+ diffusion layer 3 Insulating film 4 Contact hole 5 Oxide film formed in the contact hole Aluminum containing 61% silicon or more Applicant Seiko Epson Corporation Agent Patent attorney Kizobe Suzuki (and 1 other person) No. 1 figure 2628303234363840424446485
05254 g6511110coraict rmw
anca (ohm 12022l2O2224262
6303234363840424446486062
54rmlstances (ohm 12 ot I￥l r
b)
Claims (1)
ンタクトホールを形成する工程と、酸化膜を形成する工
程と、形成した酸化膜を除去する工程と、層構成が少な
くとも一層以上である第２の導電層を形成する工程とか
らなることを特徴とする半導体装置の製造方法。A step of forming a contact hole in an insulating film provided on a first conductive layer on a semiconductor substrate, a step of forming an oxide film, and a step of removing the formed oxide film, the layer structure is at least one layer or more. 1. A method of manufacturing a semiconductor device, comprising the step of forming a certain second conductive layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31878990A JPH04188849A (en) | 1990-11-22 | 1990-11-22 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31878990A JPH04188849A (en) | 1990-11-22 | 1990-11-22 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04188849A true JPH04188849A (en) | 1992-07-07 |
Family
ID=18102962
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31878990A Pending JPH04188849A (en) | 1990-11-22 | 1990-11-22 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04188849A (en) |
-
1990
- 1990-11-22 JP JP31878990A patent/JPH04188849A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4937652A (en) | Semiconductor device and method of manufacturing the same | |
| JPS62295453A (en) | Device containing semiconductor material and electric conductive element and manufacture of the same | |
| JPS61142739A (en) | Manufacture of semiconductor device | |
| US4708904A (en) | Semiconductor device and a method of manufacturing the same | |
| JPS62113421A (en) | Manufacture of semiconductor device | |
| JPH04188849A (en) | Manufacture of semiconductor device | |
| JPS60193333A (en) | Manufacture of semiconductor device | |
| JPH10125688A (en) | Manufacture of semiconductor device | |
| JPH04188722A (en) | Manufacture of semiconductor device | |
| JP3178867B2 (en) | Method for manufacturing semiconductor device | |
| JPH0377661B2 (en) | ||
| JP3189399B2 (en) | Method for manufacturing semiconductor device | |
| JPH0232537A (en) | Manufacture of semiconductor device | |
| JPH03165515A (en) | Contact forming method | |
| JPS6154649A (en) | Manufacture of semiconductor device | |
| JPS6294937A (en) | Manufacture of semiconductor integrated circuit device | |
| JPS62244150A (en) | Semiconductor device with mutual interconnection layer of aluminum containing vanadium with low content | |
| KR960002067B1 (en) | Semiconductor device and fabricating method thereof | |
| JPH01200651A (en) | Manufacture of semiconductor device | |
| JPS62235775A (en) | Semiconductor device and manufacture theeof | |
| JPH06326105A (en) | Laminated interconnection structure of semiconductor device | |
| JPS63114211A (en) | Manufacture of semiconductor device | |
| JPH08316317A (en) | Semiconductor device and its production | |
| JPH05102156A (en) | Semiconductor device | |
| JPH0594960A (en) | Manufacture of semiconductor device |