JPH04184990A - Structure and method for mounting semiconductor package - Google Patents

Abstract

PURPOSE:To eliminate the need of passing conductor patterns led out from through holes on an inside frame side through the spaces between each adjacent through holes on an outside frame side by arranging standing leads on a multi-frame mold on the rear surface of a package and making selected leads shorter in length, with the remaining nonselected leads being made longer in length, and then, arranging short and long blind holes in a circuit board. CONSTITUTION:Short leads 11 and long leads 12 are arranged on the outside frame side of a semiconductor package 1 and, on a circuit board 5, short blind holes 15 reaching an upper conductor layer 6-1 are arranged on the outside frame side and long blind holes 16 reaching a lower conductor layer 6-2 are arranged on the inside frame side. Accordingly, it becomes unnecessary to pass conductor patterns led out from through holes arranged on an inside frame side through spaces between each adjacent through holes arranged on the outside frame side and, even when the arranging interval between the long blind holes 16 and short blind holes 15 is reduced to about 2mm, the insulation reliability between the conductor patterns and through holes, and between each conductor pattern does not drop. Therefore, the semiconductor package can be miniaturized and the mounting density of the package can be increased.

Description

[Detailed Description of the Invention] [Summary] Leads are arranged in a multiple frame shape on the back of the package.
Regarding mounting structures and mounting methods for semiconductor packages such as LSIs, the purpose of the present invention is to provide mounting structures and mounting methods for semiconductor packages that promote miniaturization and high-density packaging of semiconductor packages, and miniaturization of circuit boards. In the semiconductor package, selected leads are formed as short leads and other leads are formed as long leads, and the circuit board on which the semiconductor package is mounted has short blind through holes deep enough to reach the upper conductor layer surface and a short blind through hole in the lower conductor layer surface. The short leads are inserted into the short blind through holes and the long leads are inserted and soldered into the long blind through holes, respectively.

[Industrial application field]

The present invention relates to a mounting structure and method for mounting a semiconductor package such as an LSI, in which leads are arranged in a multiple frame shape on the back surface of the package.

In recent years, semiconductor components such as LSIs have so-called PG, in which leads are arranged in a double or triple frame shape on the back of the package.
A (bin grid array) type semiconductor package is
It is widely adopted because high-density packaging is easy.

[Conventional technology]

FIG. 4 is a diagram of a conventional example, in which (a) is a perspective view showing the back side of the semiconductor package, (b) is a sectional view showing the mounted state, and (C
) is a plan view of the circuit board.

As shown in FIG. 4(a), a semiconductor package! On the back of the package, leads are arranged in a double frame shape at a pitch of 2.54.

Note that the outer lead 2-1 on the outer frame side and the inner lead 2-2 on the inner frame side have the same length.

On the other hand, the circuit board 5 on which the semiconductor package 1 is mounted by soldering is a multilayer circuit board having at least two conductor layers as shown in FIG. 4(b).

The circuit board 5 includes outer leads 2- of the semiconductor package 1.
1, and inner through holes 7-2 are arranged in a frame shape and correspond to the inner leads 2-2.

Then, a conductor pattern 8-2 connected to the outer through hole 7-1 is formed on the lower conductor layer surface 6-2, and a conductor pattern 8-1 connected to the inner through hole 7-2 is formed on the upper conductor layer surface 6-2.
1.

These conductor patterns 8-1 and 8-2 are all led out to the outside of the frame, but the inner through hole 7-2
As shown in FIG. 4 (C1), the conductor pattern 8-2 connected to the conductor pattern 8-2 is led out through the middle of the adjacent outer through-holes 7-1.

In the semiconductor package l as described above, the outer lead 2-1 is inserted into the corresponding outer through hole 7-1, and the inner lead 2-2 is inserted into the corresponding inner through hole 7-2, as shown in FIG. 4(b). Soldering is carried out by dipping the back side of the circuit board 5 into a molten solder bath after inserting the circuit board 5 into the molten solder bath.

[Problem to be solved by the invention]

By the way, in the conventional mounting structure, as described above, the conductor pattern 8-1 drawn out from the inner through-holes 7-2 arranged on the inner frame side is connected to the outer through-holes 7 arranged on the outer frame side.
1, the pitch of the outer through holes 7-1 (the conventional pitch was 2.54 mm) could only be made smaller due to the reliability of the insulation between the conductor pattern and the through holes.

As a result, the lead pitch of semiconductor packages cannot be reduced, and conventional mounting structures have the problem of hindering the miniaturization of semiconductor packages, high-density packaging, and miniaturization of circuit boards. there were.

The present invention was created in view of the above points, and it is an object of the present invention to provide a mounting structure and a mounting method for a semiconductor package, which promotes miniaturization and high-density packaging of semiconductor packages, and miniaturization of circuit boards. The purpose is

[Means to solve the problem]

In order to achieve the above object, the present invention provides a semiconductor package in which the leads are arranged in a multiple frame shape on the back surface of the package.As illustrated in FIG. 11, the other lead is long lead 1
2, the circuit board 5 on which the semiconductor package l is mounted has a short through hole 15 deep enough to reach the upper conductor layer surface 6-1, and a long through hole 16 deep enough to reach the lower conductor layer surface 6-2. Assume that an array is formed.

Then, the short lead 11 is inserted into the short through hole 15, and the long lead 12 is inserted into the long through hole 16 and soldered.

Further, as illustrated in FIG. 2, the semiconductor package 1 is
Short leads 1] are arranged on the outer frame side, and long leads 12 are arranged on the inner frame side.
A circuit board 5 on which are arranged and on which a semiconductor package l is mounted.
, a short through hole 15 with a depth reaching the upper conductor layer surface 6-1 is formed on the outer frame side, and a long through hole 16 with a depth reaching the lower conductor layer surface 6-2 is formed on the inner frame side. do.

Then, the short lead 11 is inserted into the short through hole 15, and the long lead 12 is inserted into the long through hole 16 and soldered.

As shown in FIG. 3, the mounting method is to fill each of the short through holes 15 and the long through holes 16 formed in an array on the circuit board 5 with paste solder 20A by screen printing or dispenser means. do.

Thereafter, the short leads 11 of the semiconductor package 1 are inserted into the short through holes 15 and the long leads 12 are inserted into the long through holes 16, respectively, and the semiconductor package 1 is soldered to the circuit board 5 by solder reflow means. .

[Effect]

Conductor pattern 8-1 pulled out from short through hole 15
is formed on the upper conductor layer surface 6-1, and the conductor pattern 8-1 drawn out from the long through holes 16 is formed on the lower conductor layer surface 6-2, so that the conductor pattern drawn out from the through holes arranged on the inner frame side is There is no need to pass between adjacent through holes arranged on the outer frame side.

Therefore, the arrangement pitch of the long through holes 16 and the short through holes 15 can be made as small as desired (for example, 1.77 m).
m) The reliability of the insulation between conductor patterns and through holes, between conductor patterns, and between through holes will not deteriorate even if

That is, the miniaturization and high-density packaging of semiconductor packages and the miniaturization of circuit boards are being promoted.

〔Example〕

The present invention will be specifically described below with reference to the drawings. Note that the same reference numerals indicate the same objects throughout the figures.

FIG. 1 is a diagram of an embodiment of the invention of claim 1, in which (a) is a perspective view showing the back side of a semiconductor package, (bl is a plan view of a circuit board, and (C) is a chain line A in FIG. 1 (b). - It is a cross-sectional view showing the mounting state where A part is broken.

Moreover, FIG. 2 is a diagram of an embodiment of the invention of claim 2, and (a)
is a perspective view showing the back side of the semiconductor package, (b) is a sectional view showing the mounted state, FIG. 3 (al), (b) is claim 3
FIG. 3 is a diagram showing the steps of the invention.

In FIG. 1, on the back surface of a semiconductor package 1, leads are arranged in a double frame shape at a pitch of 1.77 mm.

The semiconductor package 1 has a short lead 11 of a desired length at the corner glue on the outer frame side. Further, the leads at the corners on the inner frame side are made into short leads 11 of a desired length.

Then, the short leads 11 and the long leads 12 of a desired length are arranged alternately, and the leads are planted in a double frame arrangement.

On the other hand, the circuit board 5 on which the semiconductor package 1 is soldered and mounted has at least an upper conductor layer surface 6-1. Lower conductor layer surface 6-2
．． It is a multilayer circuit board further comprising upper and lower conductor layer surfaces 6-3 below.

On the circuit board 5, short through holes 15 having a depth reaching the upper conductor layer surface 6-1 are formed in an array corresponding to each of the short leads 11 of the semiconductor package l, and corresponding to each of the long leads 12. Long through holes 16 deep enough to reach the lower conductor layer surface 6-2 are formed in an array.

Conductor pattern 8-2 pulled out from the long through hole 16
(shown as a solid line in FIG. 1(b)) is the lower conductor layer surface 6-2.
It is provided for. Note that all of these conductor patterns 8-2 are drawn out to the outside of the frame.

On the other hand, a conductor pattern 8-1 (indicated by a dotted line in FIG. 1(b)) drawn out from the short through hole 15 is provided on the upper conductor layer surface 6-1.

Among these short through holes 15, the short through holes 15 provided on the outer frame side are connected to the conductor pattern 8 toward the outside of the frame.
-1 is withdrawn.

In addition, the short through hole 15 provided on the inner frame side leads out the conductor pattern 8-1 inward of the frame and leads downward through the via 9, and the conductor pattern 8-1 provided on the upper and lower conductor layer surfaces 6-3. -3 to the outside of the frame.

In the semiconductor package 1 configured as described above, the short leads 11 are inserted and soldered into the short through holes 15 of the circuit board 5, and the long through holes 16 of the circuit board 5 are inserted and soldered.
Long leads 12 are respectively inserted and soldered to the circuit board 5 and mounted on the circuit board 5.

In FIG. 2, the semiconductor package 1 has short leads 11 arranged on the outer frame side and long leads 12 arranged on the inner frame side.

On the other hand, the circuit board 5 on which the semiconductor package 1 is mounted is a multilayer circuit board including at least an upper conductor layer surface 6-1 and a lower conductor layer surface 6-2.

The circuit board 5 has a short through hole 15 with a depth reaching the upper conductor layer surface 6-1 on the outer frame side, and a short through hole 15 with a depth reaching the lower conductor layer surface 6-1 on the inner frame side.
Long through holes 16 with a depth of up to 2 mm are formed and arranged.

The conductor patterns 8-2 drawn out from the long through holes 16 are provided on the lower conductor layer surface 6-2 and are all drawn out to the outside of the frame.

Further, the conductor patterns 8-1 drawn out from the short through holes 15 are provided on the upper conductor layer surface 6-1 and are all drawn out to the outside of the frame.

Then, the short leads 11 of the semiconductor package l are inserted and soldered into the short through holes 15 of the circuit board 5, respectively.
The semiconductor package 1 is mounted on the circuit board 5 by inserting and soldering the long leads 12 into the long through holes 16 of the circuit board 5.

Although not shown in the drawings, in a semiconductor package in which leads are arranged in a triple frame shape, the lead length of the leads arranged on the inside is longer than that of the leads arranged on the outside. and,
The depth of the through-holes on the circuit board are as follows: For those with an outer frame arrangement, the depth is on the upper conductor layer surface 6-1, and for those with the next inner frame arrangement, the depth is on the lower conductor layer surface 6-1.
-2, those with inner frame arrangement have upper and lower conductor layer surfaces 6
-3 depth.

Since the present invention is configured as described above, it is not necessary to pass the conductor pattern drawn out from the through holes arranged on the inner frame side between adjacent through holes arranged on the outer frame side.

Therefore, even if the arrangement pitch of the long through holes and the short through holes is set to, for example, 1.77 mm, there is no fear that the insulation between the conductor pattern and the through holes will deteriorate.

Therefore, the pitch of the leads of the semiconductor package can be reduced to a certain extent, and the miniaturization and high-density packaging of the semiconductor package are promoted.

Furthermore, as semiconductor packages become more densely packaged, circuit boards become smaller.

Next, a method for mounting a semiconductor package will be described with reference to FIG.

As shown in FIG. 3, the semiconductor package 1 has short leads 11 arranged on the outer frame side and long leads 12 arranged on the inner frame side.

Further, the circuit board 5 on which the semiconductor package l is mounted has a short through hole 15 on the outer frame side with a depth reaching the upper conductor layer surface 6-1, and on the inner frame side with a short through hole 15 with a depth reaching the lower conductor layer surface 6-2. The long through holes 16 are formed and arranged, the conductor pattern 8-2 drawn out from the long through hole 16 is provided on the lower conductor layer surface 6-2, and the conductor pattern 8-1 drawn out from the short through hole 15 is provided on the upper conductor layer surface. 6-1.

In order to mount the semiconductor package 1 configured as described above on the circuit board 5, the following process steps are performed.

■ Paste solder screen printing process (Figure 3 (a)
)) Holes having dimensions approximately equal to the land diameters formed on the upper end surfaces of the through holes are arranged at positions corresponding to the respective short through holes 15 and the long through holes 16, respectively.
Provide a screen mask.

This screen mask is stretched over the surface of the circuit board 5, paste solder 20A is applied onto the screen mask, and a squeegee is used to apply the paste solder 20A to each of the short through holes 15. and the long through hole 16 is filled.

■Solder reflow process (see Figure 3(b)) Next, align the semiconductor package l with the circuit board 5, and insert the short leads 11 into the short through holes 15 and the long leads 12 into the long through holes 16. At the same time, semi-hardened paste solder 20 is applied to the tip of each lead.
Push A into the blind through hole.

Then, the circuit board 5 is placed in a heating furnace or the like and heated to the solder melting temperature to melt the semi-hardened paste solder 20A and fill the gap between the lead and the inner wall of the blind through hole with solder.

Next, the circuit board 5 is taken out of the heating furnace, the solder is cured, and the leads and the blind through holes are bonded with solder 20.

In addition, in the screen printed state, paste solder 2
0A does not fill to the bottom of the blind through hole. Furthermore, even after soldering, the blind through-hole is not always fully filled with solder to the bottom.

However, if the leads are soldered above the blind through holes, a connection circuit is formed between the leads, the conductor layer on the inner wall of the through holes, and the conductor pattern, so that the reliability of the connection is sufficiently guaranteed.

Note that, instead of using the screen printing means, paste solder may be injected into each blind through hole and filled using a dispenser means.

The dispenser means has the advantage of being able to fill paste solder deep into blind through holes;
Since it does not require a screen mask, it has the advantage of being low-cost and applicable to circuit boards produced in a wide variety of small quantities.

〔Effect of the invention〕

As explained above, the present invention provides a semiconductor package in which leads are arranged in a multiple frame shape on the rear surface of the package, by shortening the lead length of selected leads and making other lead lengths longer. Short through holes and long through holes are arranged on the circuit board so that the conductor pattern drawn out from the through holes arranged on the inner frame side does not pass between the through holes arranged on the outer frame side. be.

As a result, even if the arrangement pitch of the through holes is small, the distance between the conductor pattern and the through holes can be reduced.

This has excellent practical effects in that the reliability of the insulation between conductor patterns and between through holes does not deteriorate, and it promotes the miniaturization of semiconductor packages, high-density packaging, and miniaturization of circuit boards. play.

[Brief explanation of the drawing]

FIG. 1 is a diagram of an embodiment of the invention of claim 1, in which (a) is a perspective view showing the back side of a semiconductor package, (b) is a plan view of a circuit board, and (C) is a chain line in FIG. 1(b). FIG. 2 is a cross-sectional view showing the mounted state broken at the A-A portion; FIG. 2 is a diagram of an embodiment of the invention of claim 2; 3(a) and 3(b) are views showing the steps of the invention according to claim 3, FIG. 4 is a view of a conventional example, and (a) is a perspective view showing the back side of the semiconductor package. bl
is a cross-sectional view showing the mounted state, and (C) is a plan view of the circuit board. In the figure, 1 is a semiconductor package, 5 is a circuit board, 6-1 is an upper conductor layer surface, 6-2 is a lower conductor layer surface, 6-3 is an upper and lower conductor layer surface, 7-1 is an outer through hole, and 7-2 is an inner surface. Through hole, 8-1.8-2.8-3 is conductor pattern, 9 is via, 11 is short lead, 12 is long lead, 15 is short through hole, 16 is long through hole, 20 is solder, 20A indicates paste solder, respectively. (A name blue car ode 1n to January's fruit color threat - Figure 1 (a claim 2n originating from Moeri carved Zeppaku layer map 2) Figure 1S blind through hole 16: long through tree Figure 3 (a) A] Fig. 4 (1000f) 1) (m of the restoration example) Figure 4 (Preliminary/72)

Claims (1)

[Scope of Claims] [1] In a semiconductor package in which leads are arranged in a multiple frame shape on the back surface of the package, the semiconductor package (
1), the selected lead is formed as a short lead (11) and the other lead is formed as a long lead (12), and the circuit board (5) on which the semiconductor package (1) is mounted has an upper conductor layer surface (6- A short blind through hole (15) with a depth reaching 1) and a long blind through hole (16) with a depth reaching the lower conductor layer surface (6-2) are formed in an array, and the short blind through hole (15) A semiconductor package mounting structure characterized in that the short lead (11) and the long lead (12) are inserted and soldered into the long blind through hole (16), respectively. [2] In a semiconductor package in which leads are arranged in a multiple frame shape on the back surface of the package, the semiconductor package (
1), short leads (11) are arranged on the outer frame side, long leads (12) are arranged on the inner frame side, and the semiconductor package (1)
) on which the circuit board (5) is mounted has an upper conductor layer surface (
A short blind through hole (15) with a depth reaching 6-1) is
A long blind through hole 1 (16) with a depth reaching the lower conductor layer surface (6-2) is formed on the inner frame side, and the short lead (11) is inserted into the short blind through hole (15).
A mounting structure for a semiconductor package, characterized in that the long leads (12) are inserted and soldered into the long blind through holes (16). [3] Paste solder (20
A) is a short blind through hole (
15) and the long blind through hole (16), and then insert the short leads (11) of the semiconductor package (1) into the short blind through holes (15), and the long leads (12) into the long blind through holes. (16) and soldering the semiconductor package (1) according to claim 1 or claim 2 to the circuit board (5) by solder reflow means. . [4] Paste solder (20
A) is a short blind through hole (
4. The semiconductor package mounting method according to claim 3, wherein each of the long blind through hole (16) and the long blind through hole (16) are filled.