JPH04168750A - Package for semiconductor element - Google Patents
Package for semiconductor elementInfo
- Publication number
- JPH04168750A JPH04168750A JP2296504A JP29650490A JPH04168750A JP H04168750 A JPH04168750 A JP H04168750A JP 2296504 A JP2296504 A JP 2296504A JP 29650490 A JP29650490 A JP 29650490A JP H04168750 A JPH04168750 A JP H04168750A
- Authority
- JP
- Japan
- Prior art keywords
- metal frame
- metal
- integrated circuit
- insulating base
- semiconductor integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 49
- 229910052751 metal Inorganic materials 0.000 claims abstract description 82
- 239000002184 metal Substances 0.000 claims abstract description 82
- 239000000758 substrate Substances 0.000 claims abstract description 23
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims abstract description 18
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 20
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 14
- 229910052759 nickel Inorganic materials 0.000 claims description 10
- 229910045601 alloy Inorganic materials 0.000 claims description 7
- 239000000956 alloy Substances 0.000 claims description 7
- 229910052742 iron Inorganic materials 0.000 claims description 7
- 230000008646 thermal stress Effects 0.000 abstract description 7
- 238000004299 exfoliation Methods 0.000 abstract 1
- 238000005219 brazing Methods 0.000 description 16
- 239000010941 cobalt Substances 0.000 description 7
- 229910017052 cobalt Inorganic materials 0.000 description 7
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 238000003860 storage Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 6
- 229910000833 kovar Inorganic materials 0.000 description 5
- 239000000843 powder Substances 0.000 description 5
- 229910052721 tungsten Inorganic materials 0.000 description 5
- 239000010937 tungsten Substances 0.000 description 5
- 229910000679 solder Inorganic materials 0.000 description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 239000011733 molybdenum Substances 0.000 description 3
- 238000003466 welding Methods 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000012467 final product Substances 0.000 description 2
- 230000007257 malfunction Effects 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 230000035882 stress Effects 0.000 description 2
- 230000003685 thermal hair damage Effects 0.000 description 2
- ODINCKMPIJJUCX-UHFFFAOYSA-N Calcium oxide Chemical compound [Ca]=O ODINCKMPIJJUCX-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000010953 base metal Substances 0.000 description 1
- 235000012255 calcium oxide Nutrition 0.000 description 1
- 239000000292 calcium oxide Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 239000012777 electrically insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- XEEYBQQBJWHFJM-FTXFMUIASA-N iron-51 Chemical compound [51Fe] XEEYBQQBJWHFJM-FTXFMUIASA-N 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Die Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は半導体集積回路素子を収容するための半導体素
子収納用パッケージの改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an improvement in a semiconductor element housing package for accommodating a semiconductor integrated circuit element.
（従来技術及びその課題）
従来、半導体素子、特にＬＳＩ等の半導体集積回路素子
を収容するための半導体素子収納用パッケージは、一般
に、アルミナセラミックス等の電気絶縁材料から成り、
その上面中央部に半導体集積回路素子を収容するための
空所を有し、且つ上面にコバール金属（鉄：５４．０重
量％、ニッケル：２９゜０重量％、コバルト：１７．０
重量％から成る合金）から成る金属枠体がロウ付けされ
た絶縁基体と、同じくコバール等の金属材料より成る蓋
体とから構成されており、絶縁基体の空所内に半導体集
積回路素子を取着収容するとともに絶縁基体の金属枠体
に金属製蓋体を溶接、或いはロウ付けし、絶縁基体と金
属製蓋体とから成る容器内部に半導体集積回路素子を気
密に封止することによって最終製品としての半導体装置
となる。(Prior Art and its Problems) Conventionally, semiconductor element storage packages for accommodating semiconductor elements, particularly semiconductor integrated circuit elements such as LSI, are generally made of electrically insulating materials such as alumina ceramics.
It has a cavity in the center of its upper surface for accommodating a semiconductor integrated circuit element, and the upper surface is coated with Kovar metal (iron: 54.0% by weight, nickel: 29°0% by weight, cobalt: 17.0% by weight).
It consists of an insulating base to which a metal frame made of a metal alloy (alloy consisting of % by weight) is brazed, and a lid made of a metal material such as Kovar, and a semiconductor integrated circuit element is mounted in the cavity of the insulating base. As a final product, the semiconductor integrated circuit element is housed, and a metal lid is welded or brazed to the metal frame of the insulating base, and the semiconductor integrated circuit element is hermetically sealed inside the container consisting of the insulating base and the metal lid. semiconductor device.
尚、前記半導体素子収納用パッケージにおいては絶縁基
体の上面にタングステン、モリブデン等の高融点金属粉
末から成るメタライズ金属層が予め被着されており、該
メタライズ金属層に金属枠体が銀ロウ等のロウ材を介し
ロウ付けされる。In addition, in the semiconductor element storage package, a metallized metal layer made of high melting point metal powder such as tungsten or molybdenum is deposited on the upper surface of the insulating base in advance, and a metal frame is coated with silver solder or the like on the metallized metal layer. Brazed with solder metal.
しかしながら、近時、半導体集積回路素子の高密度化、
高集積化が急激に進んでおり、半導体集積回路素子の作
動時に発生する熱量が極めて大きなものとなってきてい
る。そのためこの半導体集積回路素子を上述した従来の
半導体素子収納用パッケージに収容した場合、パッケー
ジの絶縁基体を構成するアルミナセラミックスの熱伝導
率が約２０Ｗ／ｍ−にと低いため、該絶縁基体を介して
半導体集積回路素子が作動時に発生する熱を大気中に良
好に放出させることができず、その結果、半導体集積回
路素子が該素子自身の発生する熱によって高温となり、
半導体集積回路素子に熱破壊を起こさせたり、特性に熱
変化を与え、誤動作を生じさせたりするという欠点を招
来した。However, recently, the density of semiconductor integrated circuit elements has increased,
BACKGROUND ART With the rapid increase in integration, the amount of heat generated during operation of semiconductor integrated circuit elements has become extremely large. Therefore, when this semiconductor integrated circuit element is housed in the above-mentioned conventional semiconductor element storage package, the thermal conductivity of the alumina ceramics that constitutes the insulating base of the package is as low as about 20 W/m-, The heat generated by semiconductor integrated circuit elements during operation cannot be effectively released into the atmosphere, and as a result, the semiconductor integrated circuit elements become high in temperature due to the heat generated by the elements themselves.
This has resulted in drawbacks such as thermal damage to semiconductor integrated circuit elements, thermal changes in characteristics, and malfunctions.
そこで上記欠点を解消するために絶縁基体を熱伝導率が
８０Ｗ／ｍ−に以上の極めて熱を伝え易い窒化アルミニ
ウム質焼結体で形成することが考えられる。Therefore, in order to eliminate the above-mentioned drawbacks, it is conceivable to form the insulating substrate from an aluminum nitride sintered body having a thermal conductivity of 80 W/m- or more and which is extremely easy to conduct heat.
しかしながら、絶縁基体を窒化アルミニウム質焼結体で
形成した場合、該窒化アルミニウム質焼結体はその熱膨
張係数が４．２〜４．７ Ｘｌ０−”／ ’Ｃてあり、
金属枠体の熱膨張係数（コバール金属：５．６ＸＩＯ−
６／℃）と相違するため、絶縁基体に金属枠体をロウ付
けするとロウ付は部に両者の熱膨張係数の相違に起因す
る熱応力が発生内在し、その結果、金属枠体に小さな外
力が印加されても該外力は前記内在応力と相俊って大き
くなり、金属枠体を絶縁基体より剥がれさせてしまうと
いう欠点を誘発した。However, when the insulating substrate is formed of an aluminum nitride sintered body, the aluminum nitride sintered body has a thermal expansion coefficient of 4.2 to 4.7
Thermal expansion coefficient of metal frame (Kovar metal: 5.6XIO-
6/℃), so when a metal frame is brazed to an insulating base, thermal stress is generated in the brazed part due to the difference in coefficient of thermal expansion between the two, and as a result, a small external force is applied to the metal frame. Even if the external force is applied, the external force becomes large in combination with the above-mentioned intrinsic stress, resulting in the disadvantage that the metal frame peels off from the insulating base.
（発明の目的）
本発明は上記諸欠点に鑑み案出されたもので、その目的
は金属枠体の剥がれを有効に防止し、且つパッケージの
熱伝導を良好として内部に収容する半導体集積回路素子
が熱破壊したり、特性に熱変化が生じるような高温とな
るのを皆無となし、半導体集積回路素子を常に正常、安
定に作動させることかできる半導体素子収納用パッケー
ジを提供することにある。(Object of the Invention) The present invention was devised in view of the above-mentioned drawbacks, and its purpose is to effectively prevent the peeling of the metal frame, and to provide a semiconductor integrated circuit element housed inside the package with good heat conduction. To provide a package for accommodating a semiconductor element, which can always operate the semiconductor integrated circuit element normally and stably by eliminating the occurrence of high temperatures that cause thermal breakdown or thermal changes in characteristics.
（課題を解決するための手段）
本発明は上面に金属枠体がロウ付けされた絶縁基体と金
属製蓋体とから成り、絶縁基体の金属枠体に金属製蓋体
を取着することによって内部に半導体集積回路素子を収
容するようになした半導体素子収納用パッケージにおい
て、前記絶縁基体を窒化アルミニウム質焼結体で形成し
、金属枠体を熱膨張係数が４．０乃至５．ＯＸｌ０−’
／ ’Ｃ（２０〜４００℃）の金属で形成したことを特
徴とするものである。(Means for Solving the Problems) The present invention is composed of an insulating base and a metal lid, the upper surface of which is brazed with a metal frame, and the metal lid is attached to the metal frame of the insulating base. In a package for housing a semiconductor device that accommodates a semiconductor integrated circuit device inside, the insulating base is formed of an aluminum nitride sintered body, and the metal frame has a coefficient of thermal expansion of 4.0 to 5.0. OXl0-'
/'C (20 to 400°C) metal.
（実施例）
次に本発明を添付図面に示す実施例に基づき詳細に説明
する。(Example) Next, the present invention will be described in detail based on an example shown in the accompanying drawings.
第１図は本発明の半導体素子収納用パッケージの一実施
例を示す断面図であり、１は絶縁基体、２は金属製の蓋
体である。この絶縁基体１と蓋体２とて半導体集積回路
素子４を収容するための容器３が構成される。FIG. 1 is a sectional view showing an embodiment of the semiconductor element storage package of the present invention, in which 1 is an insulating base and 2 is a metal lid. The insulating base 1 and the lid 2 constitute a container 3 for accommodating a semiconductor integrated circuit element 4.
前記絶縁基体１はその上面中央部に半導体集積回路素子
４を収容するための空所を形成する段状の凹部が設けて
あり、該凹部底面には半導体集積回路素子４が接着材を
介し取着される。The insulating substrate 1 has a step-shaped recess formed in the center of its upper surface to form a cavity for accommodating the semiconductor integrated circuit element 4, and the semiconductor integrated circuit element 4 is attached to the bottom of the recess through an adhesive. It will be worn.
前記絶縁基体ｌは窒化アルミニウム質焼結体から成り、
該窒化アルミニウム質焼結体はその熱伝導率が８０Ｗ／
ｍ −Ｋ以上と高く、熱を伝導し易いため絶縁基体１の
凹部底面に半導体集積回路素子４を取着し、作動させた
場合、絶縁基体ｌは半導体集積回路素子４が発生する熱
を直接伝導吸収するとともに該吸収した熱を大気中に良
好に放出することが可能となり、これによって半導体集
積回路素子４は常に低温として熱破壊したり、特性に熱
変化を生じ、誤動作したりすることはなくなる。The insulating substrate l is made of an aluminum nitride sintered body,
The aluminum nitride sintered body has a thermal conductivity of 80 W/
Since the semiconductor integrated circuit element 4 is attached to the bottom of the recess of the insulating base 1 and is operated, the insulating base 1 directly absorbs the heat generated by the semiconductor integrated circuit element 4. In addition to conducting and absorbing the heat, it is possible to effectively release the absorbed heat into the atmosphere, and as a result, the semiconductor integrated circuit element 4 is kept at a constant low temperature, so that thermal damage, thermal changes in characteristics, and malfunctions are prevented. It disappears.
尚、前記窒化アルミニウム質焼結体から成る絶縁基体１
は例えば、主原料である窒化アルミニウム粉末に焼結助
剤としての酸化イツトリウム、カルシア等の粉末及び適
当な有機溶剤、溶媒を添加混合して泥漿物を作るととも
に該泥漿物をドクターブレード法を採用することによっ
てグリーンシ−ト（生シート）と成し、しかる後、前記
グリーンシートに適当な打ち抜き加工を施すとともにこ
れを複数枚積層し、約１８００℃の高温で焼成すること
によって製作される。Note that the insulating base 1 made of the aluminum nitride sintered body
For example, a slurry is made by adding and mixing powders such as yttrium oxide and calcia as sintering aids and a suitable organic solvent to aluminum nitride powder, which is the main raw material, and then using the doctor blade method to prepare the slurry. This produces a green sheet (green sheet), which is then subjected to an appropriate punching process, laminated with a plurality of sheets, and fired at a high temperature of about 1800°C.
また前記絶縁基体１にはその上面にメタライズ金属層５
が被着形成されており、該メタライズ金属層５には金属
枠体６が銀ロウ等のロウ材を介しロウ付けされている。Further, the insulating substrate 1 has a metallized metal layer 5 on its upper surface.
is deposited thereon, and a metal frame 6 is brazed to the metallized metal layer 5 via a brazing material such as silver solder.
前記絶縁基体１上面のメタライズ金属層５はタングステ
ン、モリブデン等の高融点金属粉末から成り、該タング
ステン粉末等に適当な有機溶剤、溶媒を添加混合して得
た金属ペーストを絶縁基体ｌの上面に従来周知のスクリ
ーン印刷法を採用することによって所定パターンに印刷
塗布し、しかる後、これを高温で焼付けることによって
絶縁基体ｌの上面に被着形成される。The metallized metal layer 5 on the upper surface of the insulating substrate 1 is made of powder of a high melting point metal such as tungsten or molybdenum, and a metal paste obtained by adding and mixing a suitable organic solvent or solvent to the tungsten powder or the like is applied to the upper surface of the insulating substrate 1. It is printed and applied in a predetermined pattern by employing a conventionally well-known screen printing method, and then baked at a high temperature to form a coating on the upper surface of the insulating substrate l.
また前記メタライズ金属層５にロウ付けされる金属枠体
６は金属製蓋体２を絶縁基体１に取着する際の下地金属
部材として作用し、金属枠体６に金属製蓋体２をシーム
ウェルド法等の溶接、あるいはロウ材を介しロウ付けす
ることによって金属製蓋体２は絶縁基体ｌｌ上に取着さ
れる。Further, the metal frame 6 that is brazed to the metallized metal layer 5 acts as a base metal member when attaching the metal lid 2 to the insulating base 1, and the metal lid 2 is seamed to the metal frame 6. The metal cover 2 is attached onto the insulating base 11 by welding such as a welding method or by brazing with a brazing material.
前記金属枠体６はその熱膨張係数が４．０乃至５゜ＯＸ
ｌ０−’／ ’Ｃ（２０〜４００℃）の金属、例えば、
鉄５１．０乃至６４．０重量％、ニッケル２９．０乃至
３４，０重量％及びコバルト７．０乃至１５．０重量％
の合金より成っている。The metal frame 6 has a thermal expansion coefficient of 4.0 to 5°OX.
10-'/'C (20-400°C) metals, e.g.
51.0 to 64.0% by weight of iron, 29.0 to 34.0% by weight of nickel, and 7.0 to 15.0% by weight of cobalt.
It is made of an alloy of
前記金属枠体６はその熱膨張係数が４．０乃至５゜ＯＸ
ｌ０−’／ ’Ｃ（２０〜４００℃）であり、絶縁基体
１を構成する窒化アルミニウム質焼結体の熱膨張係数（
４，２乃至４．７ Ｘｌ０−’／ ’Ｃ）と近似してい
ることから絶縁基体ｌに被着させたメタライズ金属層５
に金属枠体６をロウ付けする際、絶縁基体ｌと金属枠体
６との間には両者の熱膨張係数の相違に起因する大きな
熱応力が発生することはなく、両者のロウ付は部に大き
な熱応力が内在することもない。The metal frame 6 has a thermal expansion coefficient of 4.0 to 5°OX.
l0-'/'C (20 to 400°C), and the thermal expansion coefficient (
4.2 to 4.7 Xl0-'/'C).
When brazing the metal frame 6 to the insulating base l and the metal frame 6, no large thermal stress is generated between the insulating base l and the metal frame 6 due to the difference in coefficient of thermal expansion between the two, and the brazing of the two can be done without a problem. There is no inherent large thermal stress.
従って、ロウ付は後、金属枠体６に外力が印加されたと
しても該外力がロウ付は部に内在する応力と相俊って大
きくなり、絶縁基体１より金属枠体６を剥がれさせるこ
とはない。Therefore, even if an external force is applied to the metal frame 6 after brazing, the external force increases in combination with the stress inherent in the brazing part, causing the metal frame 6 to peel off from the insulating base 1. There isn't.
尚、前記金属枠体６は例えば、鉄５１．０乃至６４．０
重量９６、ニッケル２９．０乃至３４．０重量％及びコ
バルト７．０乃至１５．０重量％を加熱溶融し、合金化
させてインゴットを作るとともに該インゴットを従来周
知の圧延加工法及び打ち抜き加工法によって所定の形状
に形成される。Note that the metal frame 6 is made of, for example, iron 51.0 to 64.0.
96% by weight of nickel, 29.0 to 34.0% by weight of nickel, and 7.0 to 15.0% by weight of cobalt are heated and melted and alloyed to make an ingot, and the ingot is processed by conventionally known rolling and punching methods. is formed into a predetermined shape.
また前記絶縁基体１には凹部段状上面から容器３の外部
に導出するメタライズ配線層７が被着形成されており、
該メタライズ配線層７の凹部段状上面部には半導体集積
回路素子４の電極がボンディングワイヤ８を介して電気
的に接続され、また容器の外部に導出された部位には外
部回路と接続される外部リード端子９が銀ロウ等のロウ
材を介し取着される。Further, a metallized wiring layer 7 is formed on the insulating substrate 1 and extends from the stepped upper surface of the recess to the outside of the container 3.
The electrodes of the semiconductor integrated circuit element 4 are electrically connected to the stepped upper surface of the recessed portion of the metallized wiring layer 7 via bonding wires 8, and the portion led out to the outside of the container is connected to an external circuit. External lead terminals 9 are attached via a soldering material such as silver solder.
前記絶縁基体１のメタライズ配線層７はタングステン、
モリブデン等の高融点金属粉末から成り、従来周知のス
クリーン印刷法を採用することによって絶縁基体１の凹
部段状上面から容器３の外部に導出するよう被着形成さ
れる。The metallized wiring layer 7 of the insulating substrate 1 is made of tungsten,
It is made of a high melting point metal powder such as molybdenum, and is formed by applying a conventionally well-known screen printing method so as to extend from the step-like upper surface of the recessed part of the insulating substrate 1 to the outside of the container 3.
また前記絶縁基体ｌに被着させたメタライズ配線層７に
ロウ付けされる外部リード端子９は内部に収容する半導
体集積回路素子４を外部回路に接続する作用を為し、外
部リード端子９を外部回路に接続することによって内部
に収容される半導体集積回路素子４はメタライズ配線層
７及び外部リード端子９を介して外部回路に電気的に接
続されることとなる。Further, the external lead terminals 9 brazed to the metallized wiring layer 7 deposited on the insulating substrate l function to connect the semiconductor integrated circuit element 4 housed inside to an external circuit, and connect the external lead terminals 9 to the external circuit. By connecting to the circuit, the semiconductor integrated circuit element 4 housed inside is electrically connected to the external circuit via the metallized wiring layer 7 and the external lead terminals 9.
前記外部リード端子９は例えば、前述の金属枠体６と同
じ材料、具体的には鉄５１．０乃至６４．０重量％、ニ
ッケル２９．０乃至３４．０重量％及びコバルト７゜０
乃至１５．０重量％の合金により形成されている。The external lead terminal 9 is made of, for example, the same material as the metal frame 6, specifically 51.0 to 64.0% by weight of iron, 29.0 to 34.0% by weight of nickel, and 7.0% of cobalt.
15.0% by weight of the alloy.
尚、前記外部リード端子９を鉄５１．０乃至６４．０重
量％、ニッケル２９．０乃至３４．０重量％及びコバル
ト７．０乃至１５．０重量％の合金で形成しておくと該
外部リード端子９の熱膨張係数を絶縁基体ｌの熱膨張係
数に近似させることができ、絶縁基体１に被着させたメ
タライズ配線層７に外部リード端子９をロウ付けする際
、絶縁基体Ｉと外部リード端子９とのロウ付は部に両者
の熱膨張係数の相違に起ＩＯ−
因して発生する大きな熱応力が内在するのを皆無となし
、外部リード端子９のロウ付は強度を極めて強いものと
なすことができる。従って、外部リード端子９は鉄５１
．０乃至６４．０重量％、ニッケル２９．０乃至３４．
０重量％及びコバルト７．０乃至１５．０重量％の合金
で形成しておくことが好ましい。Note that if the external lead terminal 9 is made of an alloy containing 51.0 to 64.0% by weight of iron, 29.0 to 34.0% by weight of nickel, and 7.0 to 15.0% by weight of cobalt, the external The coefficient of thermal expansion of the lead terminal 9 can be approximated to the coefficient of thermal expansion of the insulating base l, and when the external lead terminal 9 is brazed to the metallized wiring layer 7 deposited on the insulating base 1, the insulating base I and the external Brazing with the lead terminal 9 completely eliminates the large thermal stress that occurs due to the difference in coefficient of thermal expansion between the two, and brazing the external lead terminal 9 provides extremely strong strength. can be made into something. Therefore, the external lead terminal 9 is made of iron 51
．． 0 to 64.0% by weight, nickel 29.0 to 34.
It is preferable to use an alloy containing 0% by weight and 7.0 to 15.0% by weight of cobalt.
かくして前記絶縁基体ｌの凹部底面に半導体集積回路素
子４を接着材を介し取着するとともに半導体集積回路素
子４の各電極をメタライズ配線層７にボンディングワイ
ヤ８を介して電気的に接続し、しかる後、絶縁基体ｌの
上面にロウ付けした金属枠体６に金属製蓋体２をシーム
ウェルド法等の溶接、あるいはロウ材を用いてロウ付け
し、容器３の内部を気密に封止することによって最終製
品としての半導体装置となる。In this manner, the semiconductor integrated circuit element 4 is attached to the bottom surface of the recess of the insulating substrate l via the adhesive, and each electrode of the semiconductor integrated circuit element 4 is electrically connected to the metallized wiring layer 7 via the bonding wire 8, and then After that, the metal lid 2 is welded using a seam welding method or the like or brazed using a brazing material to the metal frame 6 brazed to the top surface of the insulating base l, and the inside of the container 3 is hermetically sealed. This process results in a semiconductor device as a final product.
（実験例）
次に本発明の作用効果を以下に示す実験例に基づき説明
する。(Experimental Example) Next, the effects of the present invention will be explained based on the experimental example shown below.
まず、鉄、ニッケル及びコバルトを第１表に示す値に秤
量し、これを合金化させて幅０．４ｍｍ、長さ２０．０
ｍｍ、幅０．４ｍｍ、厚さ０．１５ｍｍの金属枠体用の
試料を得る。First, iron, nickel, and cobalt were weighed to the values shown in Table 1, and alloyed to give a width of 0.4 mm and a length of 20.0 mm.
A sample for a metal frame with a width of 0.4 mm and a thickness of 0.15 mm is obtained.
尚、試料番号２１は本発明品と比較するための比較試料
であり、従来一般に金属枠体として使用されているコバ
ール金属である。Incidentally, sample number 21 is a comparative sample for comparison with the product of the present invention, and is made of Kovar metal, which has conventionally been generally used as a metal frame.
次に窒化アルミニウム質焼結体から成る絶縁基体の表面
に幅２．０ｍｍ、長さ３．０ｍｍ、厚さ２０〜３０μｍ
のタングステンから成るメタライズ金属層を多数個、被
着形成するとともに該メタライズ金属層上に前記金属枠
体用の試料を各々２０個ずつ、その一端を銀ロウ材（Ｍ
ｇ８：銀７２．０重量％、銅２８．０重量％）を介しロ
ウ付けする。Next, on the surface of an insulating substrate made of aluminum nitride sintered body, a width of 2.0 mm, a length of 3.0 mm, and a thickness of 20 to 30 μm is coated.
A large number of metallized metal layers made of tungsten were deposited, and 20 samples each for the metal frame were placed on the metallized metal layers, one end of which was coated with silver brazing material (M
g8: brazing through silver (72.0% by weight, copper 28.0% by weight).
そして次に前記ロウ付けした試料の他端（ロウ付けした
側の端部とは反対の端部）をロウ付は面に対し垂直方向
に所定の力で引っ張り、試料が窒化アルミニウム質焼結
体の絶縁基体より剥がれた個数を調べるとともにこれを
金属枠体のロウ付は強度の評価とした。Next, the other end of the brazed sample (the end opposite to the brazed end) is pulled with a predetermined force in a direction perpendicular to the brazing surface, so that the sample becomes an aluminum nitride sintered body. The number of pieces peeled off from the insulating base was examined, and this was used to evaluate the strength of the brazed metal frame.
尚、前記試料のロウ付は面積は幅０．４ｍｍ、長さ２、
５ｍｍの１．０ｍｍ２とし、またタングステンメタライ
ズ金属層の外表面にはニッケルをメツキにより１゜５乃
至２．０μｍの厚みに層着させておいた。In addition, the area of the soldered sample is 0.4 mm in width, 2 mm in length,
The outer surface of the tungsten metallized metal layer was coated with nickel to a thickness of 1.5 to 2.0 μm by plating.
上記の結果を第１表に示す。The above results are shown in Table 1.
（以下、余白）
〜１２−
第１表
に
＊印を付した試料番号のものは本発明の範囲外のもので
ある。(Hereinafter, blank space) ~12- Sample numbers marked with * in Table 1 are outside the scope of the present invention.
上記実験結果からも判るように、従来のコバール合金か
ら成る金属枠体（試料番号２１）は３Ｋｇの力で引っ張
ると金属枠体の全てが剥かれてしまい、窒化アルミニウ
ム質焼結体から成る絶縁基体と金属枠体とのロウ付は強
度が極めて低いものであるのに対し、本発明の熱膨張係
数が４．０乃至５．ｏ×１０−”／ ”Ｃの金属から成
る金属枠体を使用したものは４Ｋｇの力で引っ張っても
金属枠体が剥がれることは殆どなく、窒化アルミニウム
質焼結体から成る絶縁基体と金属枠体とのロウ付は強度
が極めて高いものであることが判る。As can be seen from the above experimental results, when the conventional metal frame made of Kovar alloy (sample number 21) was pulled with a force of 3 kg, the entire metal frame was peeled off, and the insulation made of aluminum nitride sintered body was removed. While brazing the base and metal frame has extremely low strength, the present invention has a thermal expansion coefficient of 4.0 to 5. The metal frame made of 0x10-"/"C metal hardly peels off even when pulled with a force of 4 kg, and the insulating base made of aluminum nitride sintered body and the metal frame It can be seen that the strength of the brazing with the body is extremely high.
特に金属枠体の熱膨張係数を４．４６乃至４．８９Ｘ１
０−”／ ”Ｃの範囲としたものは５Ｋｇの力で引っ張
っても金属枠体の剥かれはなく、金属枠体を窒化アルミ
ニウム質焼結体から成る絶縁基体に強固にロウ付けする
には金属枠体の熱膨張係数を４．４６乃至４、８９Ｘ
１０−’／ ℃の範囲とすることが好ましい。In particular, the thermal expansion coefficient of the metal frame is 4.46 to 4.89X1.
For those set in the range of 0-"/"C, the metal frame does not peel off even when pulled with a force of 5 kg, and it is necessary to firmly braze the metal frame to the insulating base made of aluminum nitride sintered body. The thermal expansion coefficient of the metal frame is 4.46 to 4.89X
The range is preferably 10-'/°C.
（発明の効果）
以上の通り、本発明の半導体素子収納用パッケージによ
れば、窒化アルミニウム質焼結体がら成る絶縁基体にロ
ウ付けする金属枠体の熱膨張係数を４．０乃至５．ＯＸ
ｌ０−’／ ’Ｃ（２０〜４００℃）としたことから絶
縁基体と金属枠体の熱膨張係数を近似させることができ
、その結果、絶縁基体の上面に金属枠体をロウ付けする
際、絶縁基体と金属枠体との間には両者の熱膨張係数の
相違に起因する熱応力は殆ど発生せず、絶縁基体上面に
金属枠体を極めて強固にロウ付けすることを可能として
高信頼性の半導体素子収納用パッケージを提供すること
がてきる。(Effects of the Invention) As described above, according to the semiconductor element storage package of the present invention, the thermal expansion coefficient of the metal frame to be brazed to the insulating base made of the aluminum nitride sintered body is 4.0 to 5.0. OX
10-'/'C (20 to 400°C), the thermal expansion coefficients of the insulating base and the metal frame can be approximated, and as a result, when brazing the metal frame on the top surface of the insulating base, Almost no thermal stress occurs between the insulating base and the metal frame due to the difference in coefficient of thermal expansion between the two, making it possible to extremely firmly braze the metal frame onto the top of the insulating base, resulting in high reliability. It is possible to provide a package for storing semiconductor elements.
また本発明の半導体素子収納用パッケージによれば半導
体素子が収容される絶縁基体を熱伝導率が８０．０Ｗ
７ｍ −Ｋ以上の窒化アルミニウム質焼結体で形成した
ことから内部に収容する半導体集積回路素子の発生する
熱は絶縁基体を介し７て大気中に良好に放出され、その
結果、半導体集積回路素子を高温とすることは一切なく
、半導体集積回路素子を長期間にわたり正常、且つ安定
に作動させることもできる。Further, according to the semiconductor device storage package of the present invention, the insulating substrate in which the semiconductor device is housed has a thermal conductivity of 80.0W.
Since it is made of an aluminum nitride sintered body with a temperature of 7m-K or more, the heat generated by the semiconductor integrated circuit element housed inside is well released into the atmosphere through the insulating substrate 7, and as a result, the semiconductor integrated circuit element It is possible to operate the semiconductor integrated circuit device normally and stably for a long period of time without raising the temperature to a high temperature at all.
＝１７−
第１図は本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。=17- FIG. 1 is a cross-sectional view showing one embodiment of the semiconductor element storage package of the present invention.
Claims (2)
製蓋体とから成り、絶縁基体の金属枠体に金属製蓋体を
取着することによって内部に半導体集積回路素子を収容
するようになした半導体素子収納用パッケージにおいて
、前記絶縁基体を窒化アルミニウム質焼結体で形成し、
金属枠体を熱膨張係数が４．０乃至５．０×１０＾−＾
６／℃（２０〜４００℃）の金属で形成したことを特徴
とする半導体素子収納用パッケージ。(1) Consists of an insulating base with a metal frame brazed to the top surface and a metal lid, and a semiconductor integrated circuit element is housed inside by attaching the metal lid to the metal frame of the insulating base. In the package for storing semiconductor elements, the insulating substrate is formed of an aluminum nitride sintered body,
The thermal expansion coefficient of the metal frame is 4.0 to 5.0 x 10^-^
6/°C (20 to 400°C) metal.
ニッケル２９．０乃至３４．０重量％及びコバルト７．
０乃至１５．０重量％の合金より成ることを特徴とする
特許請求の範囲第１項記載の半導体素子収納用パッケー
ジ。(2) the metal frame has iron in an amount of 51.0 to 64.0% by weight;
29.0 to 34.0% by weight of nickel and cobalt7.
The package for housing a semiconductor device according to claim 1, characterized in that the package is made of an alloy of 0 to 15.0% by weight.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2296504A JP2849869B2 (en) | 1990-10-31 | 1990-10-31 | Package for storing semiconductor elements |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2296504A JP2849869B2 (en) | 1990-10-31 | 1990-10-31 | Package for storing semiconductor elements |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04168750A true JPH04168750A (en) | 1992-06-16 |
| JP2849869B2 JP2849869B2 (en) | 1999-01-27 |
Family
ID=17834405
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2296504A Expired - Lifetime JP2849869B2 (en) | 1990-10-31 | 1990-10-31 | Package for storing semiconductor elements |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2849869B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113539974A (en) * | 2021-09-15 | 2021-10-22 | 凯瑞电子(诸城)有限公司 | Chip packaging shell and brazing process thereof |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0256955A (en) * | 1987-07-03 | 1990-02-26 | Sumitomo Electric Ind Ltd | Connecting structure between components of semiconductor device |
-
1990
- 1990-10-31 JP JP2296504A patent/JP2849869B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0256955A (en) * | 1987-07-03 | 1990-02-26 | Sumitomo Electric Ind Ltd | Connecting structure between components of semiconductor device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113539974A (en) * | 2021-09-15 | 2021-10-22 | 凯瑞电子(诸城)有限公司 | Chip packaging shell and brazing process thereof |
| CN113539974B (en) * | 2021-09-15 | 2021-11-23 | 凯瑞电子(诸城)有限公司 | Chip packaging shell and brazing process thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2849869B2 (en) | 1999-01-27 |
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