JPH04167533A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable a gate electrode short in gate length and large in sectional area to be formed by a method wherein a photoresist film is etched away to form side-etched parts using the first metallic film formed obliquely on a substrate surface as a mask and then the second metallic film is formed in almost vertical direction. CONSTITUTION:An SiNx film (insulating film) 9 is formed on a hetero-epitaxial substrate; a photoresist film 10 is formed on the film 9; and an opening is made by photolithography. Next, an Al film (the first metallic film) 12 is deposited in the oblique direction on the substrate so as to side-etch the photoresist film 10 using the Al film 12 as a mask. Next, the SiNx film 9 is etched away using the residual photoresist film 10 and the Al film 12 as masks followed by further etching with the SiNx film 9 as a mask to form a recess part 13. Next, a gate metal (the second metallic film) 6 is evaporated on the whole surface and then the photoresist film 10 is removed to form a gate electrode 14. Through these procedures, the gate length can be reduced without increasing the gate metal resistance.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device, in which electrodes and wiring with a fine line width can be formed without increasing resistance, and in which a field effect transistor can be manufactured. The present invention relates to a method for manufacturing a semiconductor device that can improve drain breakdown voltage when applied to a semiconductor device.

(b) Prior Art A lift-off method is a method for selectively forming electrodes and wiring of a semiconductor device. This involves coating a photoresist film on a substrate, selectively exposing the photoresist film to light, developing it to open holes in the resist, and depositing an electrode material on top of the resist film to form electrodes on the photoresist film and the photoresist film. By removing the material, electrodes are formed on the substrate using only the exposed portions of the photoresist film.

Generally, selective exposure of a photoresist film is performed using a mask. Ultraviolet or deep UV
The minimum achievable line width of an electrode formed using a photoresist film as a mask with openings exposed to light (light) is 0.5 μm.
That's about it. In order to obtain a line width smaller than this, there is a method in which a photoresist film is directly drawn with an electron beam or an ion beam without using Xm exposure or a mask. However, in the case of X-ray exposure, manufacturing a mask for X-ray exposure is difficult and requires many steps, resulting in high manufacturing costs. Furthermore, when direct writing is performed using an electron beam or a focused ion beam, if the photoresist film becomes thick, it becomes impossible to form a desired fine pattern due to proximity effects, backscattered electrons from the substrate, etc.

Therefore, it is desirable to avoid using X-ray exposure or direct writing methods as much as possible.

Further, as described in Japanese Patent Application Laid-Open No. 52-45280, HE M T (High-Electrom M
high electron mobility transistor) and GaAs MESF
E T (GaAs metal-5 semiconductor
ctor Field-Effect Transis
tor) to improve the microwave characteristics of high-rise devices such as
In particular, it is necessary to shorten the gate length to reduce the noise figure.

In addition, simply shortening the gate length will reduce the cross-sectional area of the gate electrode and increase the gate metal resistance (Rg), causing the problem that the effect of shortening the gate length will not be reflected in the microwave characteristics (noise figure). be.

Furthermore, in order to improve the microwave characteristics, it is necessary to increase the drain breakdown voltage.

(c) Problems to be Solved by the Invention The present invention can form a gate electrode with a short gate length and a large cross section without using X-ray exposure or direct writing. The present invention aims to provide a method for manufacturing a semiconductor device that can increase the withstand voltage.

(D) Means for Solving the Problems The present invention includes a step of forming an insulating film on a semiconductor substrate, a step of forming a photoresist film on the insulating film, and a step of patterning the photoresist film to form an opening. forming a first metal film obliquely with respect to the substrate surface; etching the photoresist film using the first metal film as a mask; and side etching under the first metal film. a step of etching the substrate using the remaining insulating film as a mask to form a recessed portion; a step of forming a second metal film from a direction substantially perpendicular to the surface of the substrate; A method of manufacturing a semiconductor device is characterized in that it includes a step of removing a photoresist film.

(e) The gate length is determined by the opening width of the photoresist film formed on the functional insulating film and the deposition direction of the first metal film, and the first metal film remains on the insulating film. The width of the portion of the gate electrode above the insulating film is the width of the opening.

Furthermore, when the insulating film exposed by the side etching part formed under the first metal film is etched and the semiconductor substrate is etched using the remaining insulating film as a mask, the recessed part is located closer to the drain side. .

(F) Example A case in which the method of the present invention is applied to the creation of a HEMT will be explained based on FIGS. 1(a) to (g).

First, a non-doped GaAs layer (2) is grown to a thickness of 500 nm on a semi-insulating GaAs substrate (2) with a thickness of 500 nm using molecular beam epitaxy (MBE) technology or paid metal epitaxy (OMVPE) technology. Undoped A lo, , on the layer.

G a a, ysA S layer (3) is grown to a thickness of 20 nm, and on top of the layer (3) n - A lo, **G
ao, yaAs layer (carrier concentration 2, OX
10"/cm') (4) is grown to a thickness of 500 cm, and an n" GaAs layer (carrier concentration 2.5 x 10 cm/cffl) (6) is grown on the layer (4) to a thickness of 500 cm. Let it grow.

Thereafter, an ohmic metal such as Au-Ge/Ni is vapor-deposited on the heteroepitaxial substrate thus formed, and by lift-off, the metal is left in the source pole formation part and the drain pole formation part, and alloying is carried out. Then, a source electrode (7) and a drain electrode (8) are formed.

Next, a SiNx film (insulating film) (9) is formed on the entire surface by ECRCVD (FIG. 1(a)).

A photoresist film (PMMA) (10) is formed on the entire surface, and an opening (11) with a width of 0.5 μm is formed by photolithography using deep ultraviolet rays (FIG. 2(b)).

AI from the diagonal direction of the board (for example, 70 degrees to the board surface)! , the film (first metal film) (12) was deposited by 500 people (FIG. 3(C)). At this time, the angle is half (0,
The At film (12) is deposited to a thickness of 25 μm).

Using the Al film (12) as a mask, 08 RIE (reactive ion etching) is performed to side-etch the photoresist film (10) (FIG. 4(d)). RIE of CF4+Os (Ox 4%) was performed using the remaining photoresist film (10) and Al film (12) as masks, and SiN
Etch the x film (9).

Note that at this time, the photoresist film (10
) The underlying SiNx film (9) may be etched. As a result, the gate electrode formed later will be closer to the drain electrode side. Using the SiNx film (9) as a mask, etching is performed using an etching solution consisting of phosphoric acid dehydrogen peroxide solution and water to form a recessed portion (13) (see (e) in the same figure).
)).

A gate metal (second metal film) (6) consisting of Ti (50 people)/Al (5000 people), etc. is deposited on the entire surface (FIG. 6(f)), and a photoresist film (10) is coated with an organic solvent (for example, acetone). ) by removing the gate electrode (
14) is formed ((g) in the same figure).

Although the gate electrode (14) produced in this way has a gate length of 0.25 μm, it has a length of 0.5 μm.
The cross-sectional area of the gate electrode (14) is large due to the wide eaves (15) and the remaining At film (12). Also, the recess part (
13) can be located closer to the drain side depending on the amount of side etching of the photoresist film (10), so the depletion layer on the drain side expands more and the drain breakdown voltage can be increased. Also, the SiNx film (9) under the photoresist film (10) on the drain side
), the recess portion (13) can be located closer to the drain side depending on this etching and the amount of side etching of the photoresist film (10).

Further, FIGS. 2 and 3 show other examples, and FIG. 2 shows a pseudo-morph produced by applying the method of the present invention.
A completed sectional view of a hic (soomorphic) HEMT, and FIG. 3 is a completed sectional view of a ME SFET. Here, since the method of forming the gate electrode is the same as that in the embodiment shown in FIG.
Only the substrate structure of ESFET will be introduced.

In Figure 2, (21) is a semi-insulating G with a film thickness of 500
aAs substrate, (22) is non-doped G with a film thickness of 8000
The aAs layer (23) is a non-doped In layer with a thickness of 150 nm.
o, ++G a o, ggA s layer, (24) is a non-doped A le, G a @, @ with a film thickness of 20 people.
A S layer, (25) has a film thickness of 350 people, "A le
, ! G a @, mA S layer (carrier concentration 2,
OX 10 ”/am”), (26) has a film thickness of 500
Human n-GaAs layer (carrier concentration 2.5X1
0''/+1').

In Fig. 3, (31) is a semi-insulating GaAs substrate with a film thickness of 500 μm, (32) is a non-doped GaAs film with a film thickness of 500 μm, and (33) is an nGa film with a film thickness of 2200 μm.
As layer (carrier concentration 3.0X10"/cm'), (
34) is an n''GaAs layer (carrier concentration 2, 5 x 10''/Cm') with a film thickness of 2000 nm.

Note that the method of the present invention can also be used for forming various electrodes, wiring, etc., instead of forming gate electrodes.

(G) Effects of the Invention As is clear from the above description, the present invention allows the gate length to be shortened without increasing the gate metal resistance.

In addition, when used in field effect transistors, the drain breakdown voltage can be increased, so HEMT, MESF
Characteristics such as ET can be significantly improved.

[Brief explanation of the drawing]

FIGS. 1(a) to (g) are process explanatory diagrams for explaining the method of the present invention, FIG. 2 is a schematic sectional view of a soomorphic HEMT, and FIG. 3 is a schematic sectional view of a MESFET. . (9)...Insulating film, (10)...Photoresist film, (11)...Kaika, (12)...First metal film,
(6)...Second metal film, (13)...Recessed part,
(4)...Gate electrode.

Claims (1)

[Claims] (1) A step of forming an insulating film on a semiconductor substrate, a step of forming a photoresist film on the insulating film, a step of patterning the photoresist film to form an opening, and a step of forming an opening on the substrate surface. forming a first metal film from an oblique direction; etching the photoresist film using the first metal film as a mask to form a side etched portion under the first metal film; etching the insulating film using a resist film as a mask;
etching the substrate using the remaining insulating film as a mask to form a recessed portion; forming a second metal film from a direction substantially perpendicular to the surface of the substrate; and removing the photoresist film. A method for manufacturing a semiconductor device, comprising: