JPH04167043A - Portable electronic equipment - Google Patents

Abstract

PURPOSE:To shorten the data processing time and to suppress the power consumption by providing plural processors and connecting means which switch and connect the processors selectively to a system bus according to the kind of data outputted to the system bus. CONSTITUTION:The portable electronic equipment consists of the processors 2 and 3 which process requests from respective devices 5 - 9 connected to the system bus 10 and the connecting means 1 and 4 which switch and connect the processors 2 and 3 selectively to the system bus 10 according to the kind of data outputted to the system bus 10. When one processor which is set and connected at the time of power-on operation acknowledges the use of the bus to the other processor according to the kind of the data outputted to the system bus, the connecting means 1 and 4 connect only the corresponding processor to the system bus 10 and disconnect the other processor from the system bus 10, and data processing by the processor which complies with the data kind is started. Consequently, the data processing speed and the power loss rate can be optimized according to the kind of the data.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a portable electronic device in which a plurality of processors can be connected to a system bus, and more particularly, to a portable electronic device in which each processor can be switched and connected to the system bus. It is something.

[Prior Art] Conventionally, in a system with a multi-CPU processing system in this type of portable electronic device, processing is shared between one main processor and the other processor as a controller, that is, as a subordinate processor to the main processor. In many cases, the configuration is as follows.

[Problems to be Solved by the Invention] However, in the above devices and the like, when a high-speed processor with a high frequency system clock is used as a main processor candidate, power consumption increases. On the other hand, when a low power consumption type processor is used as a main processor candidate, a trade-off problem arises in that power consumption is suppressed but processing speed is significantly reduced.

In particular, portable electronic devices are configured to use batteries as a power source, so if multiple high-speed processors are installed to process data due to the need to reduce battery power consumption, this will significantly shorten the battery life of the device. can only be executed for a short period of time.

In addition, in a system configuration that includes multiple low-power consumption processors, even if battery life can be extended, the original purpose of fast processing in portable electronic devices will be sacrificed, and the demand for fast processing, which is the original purpose, will be compromised. will not be able to satisfy.

The present invention was made to solve the above problems, and reduces processing time and power consumption by individually switching and controlling multiple processors with different power loss characteristics or data processing speeds to the system bus. The object of the present invention is to obtain a portable electronic device that can simultaneously satisfy losses.

[Means for Solving the Problems] A portable electronic device according to the present invention includes a plurality of processors that process requests from each device connected to a system bus, and outputs each processor to the system bus. and a connecting means that selectively switches and connects based on the type of data received.

[Operation] In this invention, when a processor that is set and connected when the power is turned on recognizes that the bus is being used by another processor based on the data type output to the system bus, each connection means connects only the corresponding processor to the system bus. connect to,
By disconnecting the remaining processors from the system bus, it is possible to start data processing by a processor that can immediately respond to the data type, and it is also possible to optimize the data processing speed and power loss rate depending on the data type. shall be.

[Embodiment] FIGS. 1(a) and 1(b) are block diagrams illustrating the configuration of a portable electronic device showing an embodiment of the present invention, and corresponds to, for example, a case where two processors are connected via a bus. .

In these figures, numerals 1 and 4 are tristate buffers serving as connection means of the present invention, and the tristate buffer 1 connects/disconnects a high-speed processing type processor 2 to/from a path line 10. Also, tri-state buffer 4
connects/disconnects the processor 3, which has a different processing speed (for example, slower processing speed) than the processor 2, from the path line 10. Note that the difference in processing speed in this embodiment also coincides with the difference in power loss of the power supply circuit, which will be described later. That is, the high-speed processing type processor 2 consumes more power than the processor 3.

5 is a memory, and processors 2 and 3 execute data or programs stored in this memory 5. A keyboard 6 is used to input desired data, commands, etc. via a pass line 10. A printer 7 prints the print information stored in the memory 5. A display 8 displays information input from the keyboard 6. A serial interface 9 outputs data stored in the memory 5 or receives data from an external device.

Reference numeral 11 denotes a power supply controller that generates various logic potentials and drive potentials necessary for driving each device from a power supply supplied from a battery 12 and outputs them to each device.

13 and 14 are control lines, the control line 13 outputs the bus relinquishment control signal output from the processor 3 to the processor 2 and the tristate buffer 1, and the control line 14 outputs the bus relinquishment control signal outputted from the processor 3 to the tristate buffer 1. Output to state buffer 4. A status line 15 notifies the processor 3 of the operating status of the processor 2.

Note that processor 2 and processor 3 use the bus selectively; for example, when processor 2 is connected to pass line 1o, processor 3 is connected to pass line 1o.
The tristate buffers 1 and 4 are configured to operate so as to be in a state separated from 0.

For example, when the processor 3, which is set and connected when the power is turned on, recognizes the use of the bus to another processor 2 from the data type output to the system bus (path line 10), the connection means (tri-state buffers 1, 4) ) connects only the corresponding processor 2 to the path line 10 and disconnects the remaining processors from the path line 1o, allowing a processor that can immediately respond to the data type to start data processing.

Further, by making the processing speeds of the processors 2 and 3 different from each other, it is possible to optimize the data processing speed depending on the data type and to optimize the power loss rate.

The operation will be explained below.

When power is supplied from the power supply controller 11, the processor 3 turns on the control line 13 to set the processor 2 to the operated state.

Thereafter, the control line 14 is set to OFF to enter the operating state of the processor 3.

Data then enters the processor 3 through the pass line 10 by keystrokes from the keyboard 6 . The processor 3 determines whether high-speed data processing is necessary, and if determined to be necessary, turns on the control line 14 to relinquish the right to use the pass line 1o, and turns off the control line 13 to control the operation of the processor 2. enter the state. Processor 2 then indicates the end of the operation by indicating the status line 1.
5 to the processor 3. In response to this, the processor 3 turns on the control line 13 and turns off the control line 14 to return to the initial state.

Next, the bus ownership switching process according to the present invention will be explained with reference to FIG.

FIG. 2 is a flowchart showing an example of the bus ownership switching processing procedure according to the present invention. Note that (1) to (12) indicate each step.

When processor 3 acquires bus rights to pass line 10 (
1), initialize each device (2).

Next, it waits for data to be received via the data bus 10 (3), and when the data is received, it analyzes the data type (4) and determines whether to switch processors (5), and if No, it takes over the bus. 6) and start data processing (7).

Next, it is determined whether the data processing is finished (81), and if NO, the process returns to step (3), and if YES, the process is finished.

On the other hand, if the determination in step (5) is YES, the processor 3 discards the bus right (9) and causes the processor 2 to acquire the bus right.

Next, it waits for the data processing by processor 2 to finish (lO), and when it finishes, it returns the completion status to processor 3 (11), and switches bus ownership to processor 3 (11).
12), return to step (3).

[Effects of the Invention] As explained above, the present invention includes a plurality of processors that process requests from each device connected to a system bus, and a system that processes each processor according to the type of data output to the system bus. Since each processor is selected according to the data processing speed required for bus ownership of the system bus and executes data processing, data processing time can be shortened. Furthermore, it is possible to limit the calculation time of a processor that performs high-speed processing, and power consumption caused by high-speed processing can be significantly suppressed.

Therefore, there is no sudden power consumption as in the prior art, and there are excellent effects such as being able to perform complex arithmetic processing for a long time in portable electronic devices that use batteries as a power source.

[Brief explanation of the drawing]

FIGS. 1(a) and 1(b) are block diagrams illustrating the configuration of a portable electronic device according to an embodiment of the present invention, and FIG. 2 is a flowchart illustrating an example of the bus right switching processing procedure according to the present invention. . In the figure, 1 and 4 are tri-state buffers, 2 and 3 are processors, 5 is memory, 6 is keyboard, 7 is printer,
8 is the display, 9 is the serial interface, 1o
11 is a pass line, 11 is a power supply controller, 12 is a battery, 13 and 14 are control lines, and 15 is a status line. Second

Claims (1)

[Claims] a plurality of processors that process requests from each device connected to a system bus; and a connection means that selectively connects each processor to the system bus based on the type of data output to the system bus. A portable electronic device characterized by comprising: