JPH04165661A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH04165661A JPH04165661A JP29284790A JP29284790A JPH04165661A JP H04165661 A JPH04165661 A JP H04165661A JP 29284790 A JP29284790 A JP 29284790A JP 29284790 A JP29284790 A JP 29284790A JP H04165661 A JPH04165661 A JP H04165661A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- bonding
- resin
- resin film
- bonding section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 25
- 239000011347 resin Substances 0.000 claims abstract description 31
- 229920005989 resin Polymers 0.000 claims abstract description 31
- 239000000853 adhesive Substances 0.000 claims abstract description 14
- 230000001070 adhesive effect Effects 0.000 claims abstract description 14
- 239000008188 pellet Substances 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 6
- 239000012790 adhesive layer Substances 0.000 abstract description 13
- 238000007789 sealing Methods 0.000 description 10
- 239000010410 layer Substances 0.000 description 9
- 230000007547 defect Effects 0.000 description 5
- 230000035882 stress Effects 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000008642 heat stress Effects 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は樹脂封止型半導体装置に関し、特に半導体ペレ
ット搭載用のダイパッド部を有しない樹脂封止型半導体
装置の構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a resin-sealed semiconductor device, and particularly to the structure of a resin-sealed semiconductor device that does not have a die pad portion for mounting a semiconductor pellet.
従来、この種の樹脂封止型半導体装置は第３図の上面図
、および第４図の断面図に示す様に構成されていた。即
ち、第３図、第４図において、１は半導体ペレット、２
は両面に絶縁性接着層７ａ、７ｂを有する樹脂フィルム
、３は外部電極取立し用リード、４はリードのボンディ
ング部、５は半導体ペレット１のポンディングパッド８
とリードのボンディング部４を電気的に接続する金属細
線、６は封止樹脂層である。従来この種の構造は、特に
半導体ペレット１のサイズが大型化した場合に多く用い
られている。つ該り、ダイパッド部を設けると封止樹脂
層６からダイパッド部を除いた残りの余白部分が少なく
なってしまい、リード３を封止樹脂層６内部に配置でき
なくなってしまう場合の対策として多く用いられている
。この場合、両面に絶縁性接着層７ａ、７ｂを有する樹
脂フィルム２を介して、あらかじめリード３と半導体ペ
レット１を熱圧着した後、金属細線５をＵＮＴＣボンデ
ィング（超音波熱圧着ボンディング）することにより、
半導体ペレット１のポンディングパッド８とリード３の
ボンディング部４を電気的に接続し、その後、樹脂封止
層６で封止することによって製造されている。Conventionally, this type of resin-sealed semiconductor device has been constructed as shown in the top view of FIG. 3 and the sectional view of FIG. 4. That is, in FIGS. 3 and 4, 1 is a semiconductor pellet, and 2 is a semiconductor pellet.
3 is a resin film having insulating adhesive layers 7a and 7b on both sides, 3 is a lead for mounting an external electrode, 4 is a bonding part of the lead, and 5 is a bonding pad 8 of the semiconductor pellet 1.
A thin metal wire 6 electrically connects the bonding portion 4 of the lead to a sealing resin layer. Conventionally, this type of structure is often used, especially when the size of the semiconductor pellet 1 increases. If a die pad section is provided, the remaining margin from the sealing resin layer 6 excluding the die pad section will be reduced, making it impossible to arrange the leads 3 inside the sealing resin layer 6. It is used. In this case, the lead 3 and the semiconductor pellet 1 are bonded by thermocompression in advance through the resin film 2 having insulating adhesive layers 7a and 7b on both sides, and then the thin metal wire 5 is bonded by UNTC bonding (ultrasonic thermocompression bonding). ,
It is manufactured by electrically connecting the bonding pad 8 of the semiconductor pellet 1 and the bonding part 4 of the lead 3, and then sealing with the resin sealing layer 6.
この従来の樹脂封止型半導体装置であると、金属細線５
をＵＮＴＣボンディングする際、リードのボンディング
部４と絶縁性接着剤７の接着強度が十分でなく、樹脂フ
ィルム２からリードのボンディング部４が剥離し、ボン
ディング時の超音波と荷重が十分に伝わらず、ボンディ
ング不良が発生し易いという欠点を有していた。っ才り
、通常、絶縁性接着層７はエポキシ系やアクリル系樹脂
を用いることが多く、ボンディング時の２００℃程度の
加熱で接着力、強度共に劣化し、さらには超音波によっ
て絶縁性接着層７ａとリードのボンディング部４の接着
力が著しく低下してしまうことが多かった。また、製品
になった後、種々の熱的ストレスが生じた際にも半導体
ペレット１とリード３と封止樹脂層６のそれぞれの間の
熱膨張係数の違いによって、リードのボンディング部４
と樹脂フィルム２が剥離し、封止樹脂層のクラック発生
の原因になり易いという問題点があった。In this conventional resin-sealed semiconductor device, the thin metal wire 5
When performing UNTC bonding, the adhesive strength between the bonding part 4 of the lead and the insulating adhesive 7 was not sufficient, and the bonding part 4 of the lead peeled off from the resin film 2, and the ultrasonic waves and load during bonding were not transmitted sufficiently. However, it has the disadvantage that bonding defects are likely to occur. However, the insulating adhesive layer 7 is usually made of epoxy or acrylic resin, and the adhesive force and strength deteriorate when heated to about 200°C during bonding, and even the insulating adhesive layer 7 is damaged by ultrasonic waves. In many cases, the adhesive force between the bonding portion 4 of the lead and the lead 7a was significantly reduced. Furthermore, even when various thermal stresses occur after the product is manufactured, the difference in thermal expansion coefficient between the semiconductor pellet 1, the lead 3, and the sealing resin layer 6 causes the bonding part 4 of the lead to
There is a problem in that the resin film 2 is likely to peel off and cause cracks to occur in the sealing resin layer.
本発明の目的は２リードのボンディング部と樹脂フィル
ムの接着強度が向上し、２００℃程度のＵＮＴＣボンデ
ィングを実施しても何等ボンディング不具合が生ずるこ
となく、
また、製品後の半田ソルダリング工程の熱ストレスに対
してもボンディング部の接着力がつよく、かつボンディ
ング部で応力吸収が可能で樹脂クラックを防止すること
ができる樹脂封止型半導体装置を提供することにある。The purpose of the present invention is to improve the adhesive strength between the 2-lead bonding part and the resin film, and to prevent any bonding defects from occurring even when UNTC bonding is performed at about 200°C. It is an object of the present invention to provide a resin-sealed semiconductor device that has a bonding portion that has strong adhesive strength even against stress, can absorb stress at the bonding portion, and can prevent resin cracks.
本発明の樹脂封止型半導体装置は、絶縁性接着層を両面
に有する樹脂フィルムを介して半導体ペレットの回路形
成面上にリードが固着され、かつリードのボンディング
部の裏面に複数個の凹凸を有している。これにより、リ
ードのボンディング部と樹脂フィルムの接着力が向上す
ることが可能となる。In the resin-sealed semiconductor device of the present invention, the leads are fixed to the circuit forming surface of the semiconductor pellet via a resin film having an insulating adhesive layer on both sides, and a plurality of irregularities are formed on the back surface of the bonding part of the leads. have. This makes it possible to improve the adhesive strength between the bonding portion of the lead and the resin film.
次に、本発明について図面を参照して説明する。第１図
は本発明の一実施例の断面図である。Next, the present invention will be explained with reference to the drawings. FIG. 1 is a sectional view of an embodiment of the present invention.
即ち、第１図において、１は半導体ペレット、２は両面
に絶縁性接着層７ａ、７ｂを有する樹脂フィルム、３は
外部電極取出し用リード、４はリードのボンディング部
、９はリードのボンディング部４の裏面に設けられた複
数個の凹凸、５は半導体ペレット１のポンディングパッ
ド（図示せず）とリードのボンディング部４を電気的に
接続する金属細線、６は封止樹脂層である。具体的には
９の凹凸はリードのボンディング部４の裏面をハーフエ
ツチングすることにより、大きさ５０〜２００μφ、深
さ５０〜１００μ程度のへこみが複数個設けられている
。この様な構造であれば、ＵＮＴＣボンディングの際、
リードのボンディング部９と絶縁性接着層７ａの接着面
積が増加し、樹脂フィルム２との接着強度が強化され、
ボンディング不良が解消されるという利点を有している
。That is, in FIG. 1, 1 is a semiconductor pellet, 2 is a resin film having insulating adhesive layers 7a and 7b on both sides, 3 is a lead for taking out external electrodes, 4 is a bonding part of the lead, and 9 is a bonding part 4 of the lead. 5 is a thin metal wire that electrically connects the bonding pad (not shown) of the semiconductor pellet 1 to the bonding portion 4 of the lead, and 6 is a sealing resin layer. Specifically, the unevenness 9 is formed by half-etching the back surface of the bonding portion 4 of the lead to form a plurality of depressions each having a size of 50 to 200 .mu.φ and a depth of 50 to 100 .mu.m. With this kind of structure, during UNTC bonding,
The bonding area between the bonding part 9 of the lead and the insulating adhesive layer 7a is increased, and the bonding strength with the resin film 2 is strengthened.
This has the advantage of eliminating bonding defects.
また、製品になった後の種々の熱ストレスに対しても、
接着強度が向上しているため、リードのボンディング部
４が樹脂フィルム２から剥離することがなく、また、リ
ードのボンディング部４の裏面にハーフエッチ等による
複数個のへこみがあるため、この部分で応力吸収が起き
、封止樹脂層６にクラック等の不具合が発生することを
防止せできる。In addition, we can also respond to various types of heat stress after the product is manufactured.
Because the adhesive strength is improved, the bonding part 4 of the lead does not peel off from the resin film 2, and since there are multiple dents on the back side of the bonding part 4 of the lead due to half etching, etc., this part Stress absorption occurs and defects such as cracks in the sealing resin layer 6 can be prevented from occurring.
第２図は本発明の実施例２の断面図である。図において
、半導体ペレット１の回路形成面上に両面に絶縁性接着
層７ａ、７ｂを有する樹脂フィルム２を介してリードの
ボンディング部４が固着されているが、リードのボンデ
ィング部４の裏面に複数個の凹凸を設け、かつ樹脂フィ
ルム２に１００〜２００μ程度の貫通孔を設けている。FIG. 2 is a sectional view of Example 2 of the present invention. In the figure, the bonding part 4 of the lead is fixed on the circuit forming surface of the semiconductor pellet 1 via the resin film 2 having insulating adhesive layers 7a and 7b on both sides, but there are multiple In addition, the resin film 2 is provided with through holes of about 100 to 200 μm.
この実施例であると、リードのボンディング部４と絶縁
性接着層７ａの接着強度が向上すると共に、絶縁性接着
層７ａと樹脂フィルム２との接着強度も向上し、これに
よって、より高温域で、かつより強い超音波のもとに高
速なボンディングが可能となるという利点を有し、てい
る。In this embodiment, the adhesive strength between the bonding part 4 of the lead and the insulating adhesive layer 7a is improved, and the adhesive strength between the insulating adhesive layer 7a and the resin film 2 is also improved. , and has the advantage that high-speed bonding is possible under stronger ultrasonic waves.
以上説明した様に、本発明は半導体ペレットの回路形成
面上に両面に絶縁性接着層を有する樹脂フィルムを介し
てリードのボンディング部を固着して成る構造において
、リードのボンディング部の裏面に複数個の凹凸を設け
ているため、リードのボンディング部と樹脂フィルムの
接着強度が向上し、２００℃程度のＬＩＮＴＣボンディ
ングを実施しても、何らボンディング不具合が生じない
という効果を有する。また、製品になった後の２４０℃
程度の半田ソルダリング工程の熱ストレスに対しても、
リードのボンディング部の接着力が強く、またリードの
ボンディング部で応力吸収が可能となり、樹脂クラック
を防止することができるという効果を有する。As explained above, the present invention provides a structure in which a bonding part of a lead is fixed to a circuit forming surface of a semiconductor pellet via a resin film having an insulating adhesive layer on both sides, and a plurality of Since the unevenness is provided, the adhesive strength between the bonding portion of the lead and the resin film is improved, and even when LINTC bonding is performed at about 200° C., no bonding defects occur. In addition, after becoming a product, 240℃
Even against the heat stress of the soldering process,
The adhesive strength of the bonding portion of the lead is strong, and stress absorption is possible at the bonding portion of the lead, which has the effect of preventing resin cracks.
来の樹脂封止型半導体装置の一例のそれぞれ上面図と断
面図である。
１・・・半導体ペレット、２・・・樹脂フィルム、３・
・・リード、４・・・リードのボンディング部、５・・
・金属細線、６・・・封止樹脂層、７ａ、７ｂ・・・絶
縁性接着層、８・・・ペレットのポンディングパッド、
９・・・凹凸、１０・・・貫通孔。1A and 1B are a top view and a cross-sectional view, respectively, of an example of a conventional resin-sealed semiconductor device. 1... Semiconductor pellet, 2... Resin film, 3...
...Lead, 4...Lead bonding part, 5...
- Thin metal wire, 6... Sealing resin layer, 7a, 7b... Insulating adhesive layer, 8... Pellet pounding pad,
9...Irregularities, 10...Through holes.
Claims (1)
を有する樹脂フィルムを介してリードが固着され、前記
リードとペレットの接続パッドが金属細線ボンディング
によって電気的接続をされて成る樹脂封止型半導体装置
において、前記リードの少なくともボンデング部分の裏
面に複数個の凹凸を設けたことを特徴とする樹脂封止型
半導体装置。A resin-sealed semiconductor in which a lead is fixed to the circuit-forming surface of a semiconductor pellet via a resin film having an insulating adhesive on both sides, and the lead and the connection pad of the pellet are electrically connected by thin metal wire bonding. A resin-sealed semiconductor device, characterized in that a plurality of projections and depressions are provided on the back surface of at least the bonding portion of the lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29284790A JPH04165661A (en) | 1990-10-30 | 1990-10-30 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29284790A JPH04165661A (en) | 1990-10-30 | 1990-10-30 | Resin-sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04165661A true JPH04165661A (en) | 1992-06-11 |
Family
ID=17787137
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29284790A Pending JPH04165661A (en) | 1990-10-30 | 1990-10-30 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04165661A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0613525A (en) * | 1992-06-24 | 1994-01-21 | Toshiba Corp | Semiconductor device |
| US6208017B1 (en) * | 1994-10-07 | 2001-03-27 | Nec Corporation | Semiconductor device with lead-on-chip structure |
-
1990
- 1990-10-30 JP JP29284790A patent/JPH04165661A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0613525A (en) * | 1992-06-24 | 1994-01-21 | Toshiba Corp | Semiconductor device |
| US6208017B1 (en) * | 1994-10-07 | 2001-03-27 | Nec Corporation | Semiconductor device with lead-on-chip structure |
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