JPH0415624B2 - - Google Patents

Info

Publication number
JPH0415624B2
JPH0415624B2 JP8275285A JP8275285A JPH0415624B2 JP H0415624 B2 JPH0415624 B2 JP H0415624B2 JP 8275285 A JP8275285 A JP 8275285A JP 8275285 A JP8275285 A JP 8275285A JP H0415624 B2 JPH0415624 B2 JP H0415624B2
Authority
JP
Japan
Prior art keywords
nitride film
aluminum
plasma nitride
film
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP8275285A
Other languages
Japanese (ja)
Other versions
JPS61240659A (en
Inventor
Shinichi Tonari
Yasuhiko Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP8275285A priority Critical patent/JPS61240659A/en
Publication of JPS61240659A publication Critical patent/JPS61240659A/en
Publication of JPH0415624B2 publication Critical patent/JPH0415624B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法に関し、特に、
半導体集積回路装置のアルミニウム多層配線の層
間膜あるいは、パシベーシヨン膜として形成する
プラズマ窒化膜の形成方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular,
The present invention relates to a method for forming a plasma nitride film that is formed as an interlayer film or passivation film for aluminum multilayer wiring in a semiconductor integrated circuit device.

〔従来の技術〕[Conventional technology]

従来から、アルミニウム多層配線の層間膜ある
いはパシベーシヨン膜としては主に常圧CVD酸
化膜が利用されているが、半導体素子の高密度化
集積回路装置の高信頼化を達成するために常圧
CVD膜よりも配線段部の被覆性が優れていて、
構造が緻密で、機械的強度が大きい、水分等を浸
透させにくい等の長所があるプラズマ窒化膜を採
用するための検討がなされている。
Conventionally, atmospheric pressure CVD oxide films have been mainly used as interlayer films or passivation films for aluminum multilayer interconnections, but atmospheric pressure CVD oxide films have been used mainly as interlayer films or passivation films for aluminum multilayer interconnections.
It has better coverage of wiring steps than CVD film,
Considerations are being made to adopt plasma nitride films, which have advantages such as a dense structure, high mechanical strength, and resistance to moisture penetration.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述したプラズマ窒化膜は水分等を浸透させに
くい性質があるため半導体集積回路装置へ外部か
ら浸入する水分によつて引き起こされる種々の不
良、たとえばアルミニウム配線の溶解による配線
オーブン不良等に対しては有効な膜であると言え
る。しかるに、アルミニウム膜中にはもともと微
量の水分等の不純物が混入されており、比較的そ
の含有量の少ないとされているスバツタ法によつ
て形成されたアルミニウム膜でも完全には除去さ
れていない。従つてプラズマ窒化膜を層間隔ある
いはパシベーシヨン膜としてアルミ配線の表面に
被覆したなら、その後の工程の熱処理たとえばア
ルミニウムアロイ等の450℃30分程度の熱処理に
於いて、アルミニウム中からアウトガスした水分
等がプラズマ窒化膜とアルミの間に閉じ込められ
プラズマ窒化膜がドーム状に盛り上がりさらには
破裂するという不良が発生する欠点がある。この
不良の模式図を第2図に示す。このためプラズマ
窒化膜の形成前に熱処理を行い水分等をアウトガ
スさせるという方法も検討がなされたが、上記の
不良に対しては効果があるもののこのときの熱処
理によつて発生するアルミニウムのヒロツクによ
り、新たな不良として絶縁耐圧不良を引き起こす
ことがわかつた。
The plasma nitride film mentioned above has the property of not allowing moisture to penetrate, so it is effective against various defects caused by moisture entering semiconductor integrated circuit devices from the outside, such as wiring oven defects due to melting of aluminum wiring. It can be said that the film is However, the aluminum film originally contains a small amount of impurities such as water, and even in the aluminum film formed by the sputtering method, which is said to have a relatively small amount of impurities, these impurities are not completely removed. Therefore, if a plasma nitride film is coated on the surface of an aluminum wiring as a layer spacing or passivation film, the moisture etc. outgassed from the aluminum will be released during the heat treatment in the subsequent process, for example, heat treatment at 450°C for about 30 minutes on aluminum alloys. There is a drawback that the plasma nitride film is trapped between the plasma nitride film and the aluminum, causing the plasma nitride film to swell into a dome shape and even burst. A schematic diagram of this defect is shown in FIG. For this reason, a method of performing heat treatment to outgas moisture etc. before forming the plasma nitride film was also considered, but although it is effective against the above defects, it is difficult to prevent the aluminum from forming due to the heat treatment. It was found that this caused a new defect, dielectric breakdown voltage failure.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体装置の製造方法は、半導体基板
の表面にアルミニウムを主体とした薄膜からなる
配線を形成する工程と、該配線を含む半導体基板
表面に薄い500〜3000Å程度のプラズマ窒化膜を
付着し300〜500℃程度の温度で30分から1時間程
度の熱処理を施す工程と、熱処理を施した薄いプ
ラズマ窒化膜上に厚い5000〜10000Å程度のプラ
ズマ窒化膜を付着させる工程とを含んで構成され
る。
The method for manufacturing a semiconductor device of the present invention includes the steps of forming a wiring made of a thin film mainly made of aluminum on the surface of a semiconductor substrate, and depositing a thin plasma nitride film of about 500 to 3000 Å on the surface of the semiconductor substrate including the wiring. It consists of a process of applying heat treatment at a temperature of about 300 to 500°C for about 30 minutes to an hour, and a process of depositing a thick plasma nitride film of about 5000 to 10000 Å on the heat-treated thin plasma nitride film. .

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明す
る。第1図a〜cは本発明の一実施例を説明する
ために工程順に示した縦断面図である。
Next, the present invention will be explained with reference to the drawings. 1A to 1C are vertical cross-sectional views shown in order of steps to explain an embodiment of the present invention.

まず、第1図aに示すように、通常の方法でア
ルミ配線1を形成する。
First, as shown in FIG. 1a, aluminum wiring 1 is formed by a conventional method.

次いで第1図bに示すようにSiH4とNH3を含
み0.1〜2torr約300℃の雰囲気中でプラズマ励起
により500Åから3000Å程度の薄いプラズマ窒化
膜2をつける。次に、N2を主体とした300℃から
500℃程度の雰囲気中で30分から1時間程度熱処
理を行う。このとき上記したプラズマ窒化膜2は
アルミニウム中の水分等が発散できる程度に薄い
ため、アルミニウム中からアウトガスした水分な
どがプラズマ窒化膜とアルミニウムの間に閉じ込
められることがなく、前述したプラズマ窒化膜の
盛り上がりによる不良の発生を止めることができ
る。またアルミニウム配線はプラズマ窒化膜2で
覆われているためにこの熱処理に於いてもヒロツ
クの発生はない。
Next, as shown in FIG. 1B, a thin plasma nitride film 2 of about 500 Å to 3000 Å is deposited by plasma excitation in an atmosphere containing SiH 4 and NH 3 at a temperature of 0.1 to 2 torr at about 300°C. Next, from 300℃ mainly using N2
Heat treatment is performed in an atmosphere of about 500°C for about 30 minutes to 1 hour. At this time, the plasma nitride film 2 described above is thin enough to allow moisture etc. in the aluminum to escape, so moisture etc. outgassed from the aluminum will not be trapped between the plasma nitride film and the aluminum. It is possible to prevent defects from occurring due to swelling. Furthermore, since the aluminum wiring is covered with the plasma nitride film 2, no hillocks occur during this heat treatment.

次に、第1図cに示すように、厚い5000Åから
10000Å程度のプラズマ窒化膜3を上記と同様の
雰囲気で成長させ層間絶縁膜あるいはパシベーシ
ヨン膜として形成する。
Next, as shown in Figure 1c, from a thick layer of 5000 Å,
A plasma nitride film 3 of about 10,000 Å is grown in the same atmosphere as above to form an interlayer insulating film or passivation film.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は、アルミ配線の
形成後、薄いプラズマ窒化膜をつけた後、熱処理
を行うことによつてアルミニウム中の水分等を発
散することにより、層間絶縁膜あるいはパシベー
シヨン膜として厚いプラズマ窒化膜をつけた後に
アルミニウムアロイ等の熱処理を行つてもプラズ
マ窒化膜の盛り上がりによる不良の発生を抑える
ことが可能となり、また、層間絶縁膜の絶縁耐圧
の低下の原因となるヒロツクの発生も抑えること
ができる効果がある。
As explained above, the present invention can be used as an interlayer insulating film or a passivation film by attaching a thin plasma nitride film after forming an aluminum wiring, and then heat-treating it to release moisture in the aluminum. Even if a thick plasma nitride film is applied and then heat treated with aluminum alloy, etc., it is possible to suppress the occurrence of defects due to swelling of the plasma nitride film, and also prevent the occurrence of hock, which causes a decrease in the withstand voltage of the interlayer insulating film. It has the effect of suppressing

【図面の簡単な説明】[Brief explanation of drawings]

第1図a〜cは本発明の一実施例を説明するた
めに工程順に示した断面図、第2図は従来方法に
より形成し不良の発生した半導体装置のアルミニ
ウム多層配線の断面図である。 1……アルミニウム配線、2……薄いプラズマ
窒化膜、3……厚いプラズマ窒化膜、4……シリ
コン基板、5……プラズマ窒化膜、6……アルミ
ニウム配線、7……プラズマ窒化膜破裂箇所。
1A to 1C are cross-sectional views shown in the order of steps for explaining an embodiment of the present invention, and FIG. 2 is a cross-sectional view of an aluminum multilayer wiring of a semiconductor device formed by a conventional method and in which a defect has occurred. 1... Aluminum wiring, 2... Thin plasma nitride film, 3... Thick plasma nitride film, 4... Silicon substrate, 5... Plasma nitride film, 6... Aluminum wiring, 7... Plasma nitride film rupture location.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体基板の表面にアルミニウムを主体とし
た薄膜からなる配線を形成する工程と、該配線を
含む半導体基板表面に薄い500〜3000Å程度のプ
ラズマ窒化膜を付着し300〜500℃程度の温度で30
分から1時間程度の熱処理を施す工程と、熱処理
を施した薄いプラズマ窒化膜上に厚い5000〜
10000Å程度のプラズマ窒化膜を付着させる工程
とを含むことを特徴とする半導体装置の製造方
法。
1. A process of forming wiring made of a thin film mainly made of aluminum on the surface of a semiconductor substrate, and depositing a thin plasma nitride film of about 500 to 3000 Å on the surface of the semiconductor substrate including the wiring, and heating it at a temperature of about 300 to 500°C for 30 minutes.
A process of applying heat treatment for about 1 hour from 1 minute to 1 hour, and a thick 5000 ~
A method for manufacturing a semiconductor device, comprising the step of depositing a plasma nitride film of about 10,000 Å.
JP8275285A 1985-04-18 1985-04-18 Manufacture of semiconductor device Granted JPS61240659A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8275285A JPS61240659A (en) 1985-04-18 1985-04-18 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8275285A JPS61240659A (en) 1985-04-18 1985-04-18 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS61240659A JPS61240659A (en) 1986-10-25
JPH0415624B2 true JPH0415624B2 (en) 1992-03-18

Family

ID=13783164

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8275285A Granted JPS61240659A (en) 1985-04-18 1985-04-18 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS61240659A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63289838A (en) * 1987-05-20 1988-11-28 Nec Corp Semiconductor device

Also Published As

Publication number Publication date
JPS61240659A (en) 1986-10-25

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