JPH10294311A - Fabrication of semiconductor device - Google Patents
Fabrication of semiconductor deviceInfo
- Publication number
- JPH10294311A JPH10294311A JP10150097A JP10150097A JPH10294311A JP H10294311 A JPH10294311 A JP H10294311A JP 10150097 A JP10150097 A JP 10150097A JP 10150097 A JP10150097 A JP 10150097A JP H10294311 A JPH10294311 A JP H10294311A
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- JP
- Japan
- Prior art keywords
- silicon oxide
- oxide film
- heat treatment
- semiconductor device
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Formation Of Insulating Films (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置の製造
方法に関し、特に多層配線間に用いられているクラック
耐性を向上させた自己平坦化層間絶縁膜の製造方法に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a self-planarizing interlayer insulating film having improved crack resistance used between multilayer wirings.
【０００２】[0002]
【従来の技術】半導体装置の多層配線間の自己平坦化層
間絶縁膜は、下層配線形成後、シリコン酸化膜をプラズ
マＣＶＤ法によりウェーハ表面に形成する。このシリコ
ン酸化膜の形成前に酸素などの反応性ガスによるプラズ
マで予備処理を行う。次に、このシリコン酸化膜の表面
にシランと過酸化水素水との反応により生成されたシラ
ノール[Ｓi(ＯＨ)4]系のポリマーを堆積させる。このポ
リマーによりシリコン酸化膜下の下層配線間のギャップ
を埋め、平坦化をするものである。このポリマーの堆積
前にＮ2Ｏガス中でのプラズマ処理を加えてもよい。2. Description of the Related Art As a self-planarizing interlayer insulating film between multilayer wirings of a semiconductor device, a silicon oxide film is formed on a wafer surface by a plasma CVD method after forming a lower wiring. Prior to the formation of the silicon oxide film, a preliminary process is performed using plasma using a reactive gas such as oxygen. Next, a silanol [Si (OH) 4 ] -based polymer generated by a reaction between silane and hydrogen peroxide is deposited on the surface of the silicon oxide film. This polymer fills the gap between the lower wirings under the silicon oxide film and makes it flat. Before the deposition of the polymer, a plasma treatment in N 2 O gas may be added.
【０００３】このポリマー層は多くの水分を含んでいる
ため、できるだけ多くの水分を除去することが必要であ
り、ポリマー堆積後低圧力に曝して、この層から水分を
排出させる。しかし、このポリマー層から完全に水分を
除去するためには400℃程度の熱処理が必要であること
が知られているが、多量の水分を含んだポリマー層を大
気に曝すと大気中の水分等と反応し膜剥がれ、ポリマー
層への水分再吸着等が発生する。そのため、これらの問
題を解決するために、ポリマー層上にシリコン酸化膜の
キャップ層をプラズマＣＶＤ法により堆積する。これら
のシリコン酸化膜により下層配線間のギャップ充填を行
い、自己平坦化絶縁膜を形成する。(国際出願番号：Ｐ
ＣＴ／ＧＢ９３／０１３６８)[0003] Since this polymer layer contains a lot of water, it is necessary to remove as much water as possible, and after the polymer is deposited, it is exposed to a low pressure to discharge water from this layer. However, it is known that a heat treatment at about 400 ° C. is necessary to completely remove moisture from the polymer layer. However, when a polymer layer containing a large amount of moisture is exposed to the atmosphere, moisture in the atmosphere, etc. And the film is peeled off, and re-adsorption of moisture to the polymer layer occurs. Therefore, in order to solve these problems, a cap layer of a silicon oxide film is deposited on the polymer layer by a plasma CVD method. The gap between the lower wirings is filled with these silicon oxide films to form a self-planarizing insulating film. (International application number: P
CT / GB93 / 01368)
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、上記の
自己平坦化層間絶縁膜は深いギャップ段差(例えば図１
(a)の配線高さ11のように、1.0μm以上の段差)を埋め込
もうとしたとき、自己平坦化絶縁膜形成後の熱処理など
により絶縁膜中にクラック、ボイド等の膜破壊が発生
し、それが原因となって配線間の短絡、配線の断線等の
信頼性上の問題が発生する。However, the above-mentioned self-planarizing interlayer insulating film has a deep gap step (for example, FIG. 1).
When a step height of 1.0 μm or more is buried, as in (a) wiring height 11, heat treatment after the formation of a self-planarizing insulating film causes film breakage such as cracks and voids in the insulating film. However, this causes reliability problems such as short-circuiting between wires and disconnection of wires.
【０００５】本発明は、上記従来技術の問題点を解決す
るもので、自己平坦化層間絶縁膜のポリマー層(第２シ
リコン酸化膜)の膜形成後における熱処理などのストレ
スに起因するクラック、ボイド等の膜破壊の発生のない
半導体装置の製造方法を提供することを目的とする。The present invention solves the above-mentioned problems of the prior art, and includes cracks and voids caused by stress such as heat treatment after forming a polymer layer (second silicon oxide film) of a self-planarizing interlayer insulating film. It is an object of the present invention to provide a method of manufacturing a semiconductor device which does not cause film destruction such as described above.
【０００６】[0006]
【課題を解決するための手段】この目的を達成するため
に、本発明は、自己平坦化層間絶縁膜の一部であるシラ
ンと過酸化水素水を原料ガスとしたポリマー層の形成後
からキャップ層(第３シリコン酸化膜)形成前に、加熱処
理、減圧処理、プラズマ処理を施すものである。In order to achieve this object, the present invention provides a method for forming a cap layer after forming a polymer layer using silane and hydrogen peroxide as a source gas, which are part of a self-planarizing interlayer insulating film. Before the formation of the layer (third silicon oxide film), heat treatment, pressure reduction treatment, and plasma treatment are performed.
【０００７】上記処理により、ポリマー層からの水分除
去を促進させ、絶縁膜でのクラック、ボイド等の膜破壊
を防止することができる。[0007] By the above treatment, removal of water from the polymer layer can be promoted, and film destruction such as cracks and voids in the insulating film can be prevented.
【０００８】[0008]
【発明の実施の形態】以下、本発明の実施の形態につい
て、図面を参照しながら詳細に説明する。 (実施の形態１)図１は、本発明の実施の形態１における
自己平坦化層間絶縁膜の製造方法を示す工程断面図であ
る。まず、図１(a)に示すように、シランとＮ2Ｏ、窒素
を原料ガスとしてプラズマＣＶＤ法により反応圧力50〜
300Ｐa、成長温度250〜450℃の温度範囲で、下層配線15
形成後のシリコン基板10の全面に50〜300nm程度の膜厚
の第１シリコン酸化膜12を形成する。第１シリコン酸化
膜12形成後、このシリコン酸化膜の膜質改質のために、
Ｎ2Ｏ、窒素等の反応性ガスによるプラズマ処理を行っ
てもよい。また、第１シリコン酸化膜12形成前に酸素、
窒素等の反応性ガスによるプラズマによりシリコン基板
10上の汚れを除去、もしくはシリコン基板10上の積層膜
中の含有水分量を減らすために、予備処理を行ってもよ
い。Embodiments of the present invention will be described below in detail with reference to the drawings. (Embodiment 1) FIG. 1 is a process sectional view showing a method of manufacturing a self-planarizing interlayer insulating film according to Embodiment 1 of the present invention. First, as shown in FIG. 1 (a), silane, N 2 O, and nitrogen are used as source gases, and a reaction pressure of 50 to 50 is applied by a plasma CVD method.
300 Pa, growth temperature 250-450 ° C, lower wiring 15
A first silicon oxide film 12 having a thickness of about 50 to 300 nm is formed on the entire surface of the formed silicon substrate 10. After the formation of the first silicon oxide film 12, to modify the film quality of the silicon oxide film,
Plasma treatment with a reactive gas such as N 2 O or nitrogen may be performed. Further, before forming the first silicon oxide film 12, oxygen,
Silicon substrate by plasma with reactive gas such as nitrogen
Preliminary treatment may be performed to remove dirt on the substrate 10 or to reduce the amount of moisture contained in the laminated film on the silicon substrate 10.
【０００９】次に、図１(b)に示すように、第１シリコ
ン酸化膜12上に、シランと過酸化水素水を原料ガスとし
て、反応圧力100〜300Ｐa、成長温度−10〜30℃程度の
温度範囲で、0.4〜1.5μm程度の膜厚の平坦性に優れた
第２シリコン酸化膜13を形成する。第２シリコン酸化膜
13はシランと過酸化水素水との反応により生成された固
化していない液状ポリマーであるシラノールをシリコン
基板10上に堆積させ膜形成を行っているため、第２シリ
コン酸化膜13中には水分または、水酸基(−ＯＨ)を多量
に含んでいる。この第２シリコン酸化膜13中の水分が除
去されずに、膜中に残留することにより、膜形成後の熱
処理によりクラック、ボイド等が発生する。第２シリコ
ン酸化膜13中の水分量を減らすために膜形成後、例えば
0.1Ｐa以下の低圧力下にウェーハを30秒以上放置し、そ
の後、ウェーハを10〜90秒間、300℃の加熱処理を付加
する。Next, as shown in FIG. 1B, a reaction pressure of 100 to 300 Pa and a growth temperature of about -10 to 30 ° C. are formed on the first silicon oxide film 12 using silane and hydrogen peroxide as source gases. In the above temperature range, the second silicon oxide film 13 having a thickness of about 0.4 to 1.5 μm and excellent in flatness is formed. Second silicon oxide film
In the second silicon oxide film 13, water is deposited in the second silicon oxide film 13 because silanol, which is a non-solidified liquid polymer generated by the reaction between silane and hydrogen peroxide solution, is deposited on the silicon substrate 10. Alternatively, it contains a large amount of a hydroxyl group (-OH). Since the moisture in the second silicon oxide film 13 is not removed but remains in the film, cracks, voids, and the like are generated by the heat treatment after the film is formed. After forming the film to reduce the amount of moisture in the second silicon oxide film 13, for example,
The wafer is left under a low pressure of 0.1 Pa or less for 30 seconds or more, and then the wafer is subjected to a heat treatment at 300 ° C. for 10 to 90 seconds.
【００１０】次に、図１(c)に示すように、シランとＮ2
Ｏ、窒素を原料ガスとしてプラズマＣＶＤ法により反応
圧力100〜300Ｐa、成長温度250〜450℃の温度範囲で第
２シリコン酸化膜13上に100〜400nm程度の膜厚の第３シ
リコン酸化膜14を形成する。第３シリコン酸化膜14形成
後は、第２シリコン酸化膜13中のシラノールの架橋反応
により生成した水分、水酸基を除去するために、380〜4
50℃の温度範囲で20〜60分間熱処理を加えてもよい。Next, as shown in FIG. 1C, silane and N 2
A third silicon oxide film 14 having a thickness of about 100 to 400 nm is formed on the second silicon oxide film 13 at a reaction pressure of 100 to 300 Pa and a growth temperature of 250 to 450 ° C. by plasma CVD using O and nitrogen as source gases. Form. After the third silicon oxide film 14 is formed, 380 to 380-4 are removed in order to remove water and hydroxyl groups generated by the crosslinking reaction of silanol in the second silicon oxide film 13.
Heat treatment may be applied at a temperature range of 50 ° C. for 20 to 60 minutes.
【００１１】(実施の形態２)図２は、本発明の実施の形
態２における自己平坦化層間絶縁膜の製造方法を示す工
程断面図である。まず、図２(a)に示すように、シラン
とＮ2Ｏ、窒素を原料ガスとしてプラズマＣＶＤ法によ
り反応圧力50〜300Ｐa、成長温度250〜450℃の温度範囲
で、下層配線25形成後のシリコン基板20の全面に50〜30
0nm程度の膜厚の第１シリコン酸化膜22を形成する。第
１シリコン酸化膜22形成後、このシリコン酸化膜の膜質
改質のために、Ｎ2Ｏ、窒素等の反応性ガスによるプラ
ズマ処理を行ってもよい。また、第１シリコン酸化膜22
形成前に酸素、窒素等の反応性ガスによるプラズマによ
りシリコン基板20上の汚れを除去、もしくはシリコン基
板20上の積層膜中の含有水分量を減らすために、予備処
理を行ってもよい。(Embodiment 2) FIG. 2 is a process sectional view showing a method for manufacturing a self-planarizing interlayer insulating film according to Embodiment 2 of the present invention. First, as shown in FIG. 2A, after the lower wiring 25 is formed at a reaction pressure of 50 to 300 Pa and a growth temperature of 250 to 450 ° C. by plasma CVD using silane, N 2 O, and nitrogen as source gases. 50-30 on the entire surface of the silicon substrate 20
A first silicon oxide film 22 having a thickness of about 0 nm is formed. After the first silicon oxide film 22 is formed, a plasma process using a reactive gas such as N 2 O or nitrogen may be performed to modify the film quality of the silicon oxide film. Also, the first silicon oxide film 22
Prior to formation, pretreatment may be performed to remove dirt on the silicon substrate 20 by plasma using a reactive gas such as oxygen or nitrogen, or to reduce the amount of moisture contained in the stacked film on the silicon substrate 20.
【００１２】次に、図２(b)に示すように、第１シリコ
ン酸化膜22上に、シランと過酸化水素水を原料ガスとし
て、反応圧力100〜300Ｐa、成長温度−10〜30℃の温度
範囲で、0.4〜1.5μm程度の膜厚の平坦性に優れた第２
シリコン酸化膜23を形成する。第２シリコン酸化膜23は
シランと過酸化水素水との反応により生成された固化し
ていない液状ポリマーであるシラノールをシリコン基板
20上に堆積させ膜形成を行っているため、第２シリコン
酸化膜23中には水分または、水酸基(−ＯＨ)を多量に含
んでいる。この第２シリコン酸化膜23中の水分が除去さ
れずに、膜中に残留することにより、膜形成後の熱処理
によりクラック、ボイド等が発生する。第２シリコン酸
化膜23中の水分量を減らすため膜形成後、例えば0.1Ｐa
以下の低圧力下にシリコン基板20を30秒以上放置し、含
有水分量を減らす。Next, as shown in FIG. 2 (b), on the first silicon oxide film 22, silane and hydrogen peroxide are used as source gases at a reaction pressure of 100 to 300 Pa and a growth temperature of -10 to 30 ° C. Second excellent in flatness with a film thickness of about 0.4 to 1.5 μm in the temperature range
A silicon oxide film 23 is formed. The second silicon oxide film 23 is made of a non-solidified liquid polymer silanol generated by the reaction between silane and hydrogen peroxide solution,
The second silicon oxide film 23 contains a large amount of moisture or a hydroxyl group (—OH) because the second silicon oxide film 23 is deposited on the film 20 to form a film. Since the moisture in the second silicon oxide film 23 is not removed but remains in the film, cracks, voids, and the like are generated by the heat treatment after the film is formed. After forming the film to reduce the amount of water in the second silicon oxide film 23, for example, 0.1 Pa
The silicon substrate 20 is left for 30 seconds or more under the following low pressure to reduce the water content.
【００１３】次に、図２(c)に示すように、酸素、窒
素、アルゴン等の反応性ガスによるプラズマ26により加
熱し、第２シリコン酸化膜23中の含有水分量を減らす。
このとき、シリコン基板20の温度が250〜350℃の温度範
囲になるようにプラズマ26のパワーを制御し、シリコン
基板20を10〜60秒間プラズマ26中に曝す。Next, as shown in FIG. 2 (c), the second silicon oxide film 23 is heated by plasma 26 using a reactive gas such as oxygen, nitrogen, argon or the like to reduce the water content.
At this time, the power of the plasma 26 is controlled so that the temperature of the silicon substrate 20 is in the temperature range of 250 to 350 ° C., and the silicon substrate 20 is exposed to the plasma 26 for 10 to 60 seconds.
【００１４】次に、図２(d)に示すように、シランとＮ2
Ｏ、窒素を原料ガスとしてプラズマＣＶＤ法により反応
圧力100〜300Ｐa、成長温度250〜450℃にて、第２シリ
コン酸化膜23上に100〜400nm程度の膜厚の第３シリコン
酸化膜24を形成する。第３シリコン酸化膜24形成後は、
第２シリコン酸化膜23中のシラノールの架橋反応により
生成した水分、水酸基を除去するために、380〜450℃の
温度で20〜60分間熱処理を加えてもよい。Next, as shown in FIG. 2D, silane and N 2
A third silicon oxide film 24 having a thickness of about 100 to 400 nm is formed on the second silicon oxide film 23 at a reaction pressure of 100 to 300 Pa and a growth temperature of 250 to 450 ° C. by plasma CVD using O and nitrogen as source gases. I do. After the formation of the third silicon oxide film 24,
A heat treatment may be performed at a temperature of 380 to 450 ° C. for 20 to 60 minutes in order to remove moisture and hydroxyl groups generated by a silanol cross-linking reaction in the second silicon oxide film 23.
【００１５】(実施の形態３)実施の形態１，２におい
て、第２シリコン酸化膜形成後の加熱処理、減圧処理、
プラズマ処理により膜中の水分または、水酸基を除去す
る処理を行うとき、この処理の制御を時間ではなく、水
の分圧により制御する。そのため、処理真空槽に質量分
析器(残留ガスモニター)を取り付け、処理中の水の分圧
測定を行い、ある真空度、例えば１mＰa以下になると処
理を止め、第３シリコン酸化膜の形成を行う。前後の処
理方法に関しては、実施の形態１、２の場合と同じであ
る。(Embodiment 3) In Embodiments 1 and 2, a heat treatment, a pressure reduction treatment, and the like after the formation of the second silicon oxide film are performed.
When performing a process of removing water or a hydroxyl group in a film by a plasma process, the control of this process is controlled not by time but by the partial pressure of water. For this reason, a mass spectrometer (residual gas monitor) is attached to the processing vacuum tank, and the partial pressure of water during the processing is measured. . The pre- and post-processing methods are the same as in the first and second embodiments.
【００１６】上記各実施の形態では、配線の層間絶縁膜
として、シランと過酸化水素水を原料ガスとして用いた
自己平坦化層間絶縁膜に適用した例を説明をしたが、Ｓ
ＴＩ(Shallow Trench Isolation)、トレンチへの埋め込
み層へ適用することも可能である。In each of the above embodiments, an example has been described in which the present invention is applied to a self-planarizing interlayer insulating film using silane and hydrogen peroxide as a source gas as an interlayer insulating film for wiring.
It is also possible to apply TI (Shallow Trench Isolation) to a buried layer in a trench.
【００１７】[0017]
【発明の効果】以上説明したように、本発明によれば、
シランと過酸化水素水を原料ガスとした自己平坦化層間
絶縁膜形成後の熱処理により発生していたクラック、ボ
イド等の膜破壊を抑制し、信頼性の高い層間絶縁膜を形
成することができる。As described above, according to the present invention,
A highly reliable interlayer insulating film can be formed by suppressing film breakage such as cracks and voids generated by heat treatment after forming a self-planarizing interlayer insulating film using silane and hydrogen peroxide as a source gas. .
【図１】本発明の実施の形態１における自己平坦化層間
絶縁膜の製造方法を示す工程断面図である。FIG. 1 is a process cross-sectional view illustrating a method for manufacturing a self-planarizing interlayer insulating film according to a first embodiment of the present invention.
【図２】本発明の実施の形態２における自己平坦化層間
絶縁膜の製造方法を示す工程断面図である。FIG. 2 is a process cross-sectional view illustrating a method for manufacturing a self-planarizing interlayer insulating film according to a second embodiment of the present invention.
10,20…シリコン基板、 11…配線の高さ、 12,22…第
１シリコン酸化膜、 13,23…第２シリコン酸化膜、 1
4,24…第３シリコン酸化膜、 15,25…下層配線、26…
プラズマ。10,20: silicon substrate, 11: wiring height, 12,22: first silicon oxide film, 13,23 ... second silicon oxide film, 1
4,24 ... third silicon oxide film, 15,25 ... lower wiring, 26 ...
plasma.
Claims (8)
３のシリコン酸化膜を順次積層して自己平坦化された層
間絶縁膜を形成する工程において、シランと過酸化水素
水を原料ガスに用いて成長させた第２シリコン酸化膜
を、第３シリコン酸化膜成長前に250〜350℃の温度範囲
で加熱処理することを特徴とする半導体装置の製造方
法。In a step of forming a self-planarized interlayer insulating film by sequentially laminating first, second and third silicon oxide films on a silicon substrate, silane and hydrogen peroxide are used as source gases. A method for manufacturing a semiconductor device, comprising subjecting a second silicon oxide film grown by using a heat treatment to a temperature range of 250 to 350 ° C. before growing a third silicon oxide film.
基板を0.1Ｐa以下の低圧真空下に放置することを特徴と
する請求項１記載の半導体装置の製造方法。2. The method according to claim 1, wherein the silicon substrate is left under a low-pressure vacuum of 0.1 Pa or less immediately after the growth of the second silicon oxide film.
コン酸化膜成長前の加熱処理が、0.1〜300Ｐaの真空中
で250〜350℃の温度範囲条件下に放置することを特徴と
する請求項１または請求項２記載の半導体装置の製造方
法。3. The heat treatment after the growth of the second silicon oxide film and before the growth of the third silicon oxide film is left in a vacuum of 0.1 to 300 Pa in a temperature range of 250 to 350 ° C. 3. The method for manufacturing a semiconductor device according to claim 1 or 2.
コン酸化膜成長前の加熱処理が、シリコン基板の温度が
250〜350℃の温度範囲になるようにパワーを制御された
反応性ガスによるプラズマにより加熱することを特徴と
する請求項１または請求項２に記載の半導体装置の製造
方法。4. A heat treatment after growing the second silicon oxide film and before growing the third silicon oxide film, the temperature of the silicon substrate is reduced.
3. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is heated by a plasma of a reactive gas whose power is controlled to be in a temperature range of 250 to 350 [deg.] C.
素、アルゴンの単体もしくは混合ガスであることを特徴
とする請求項４記載の半導体装置の製造方法。5. The method for manufacturing a semiconductor device according to claim 4, wherein the reactive gas for plasma generation is a single gas or a mixed gas of oxygen, nitrogen, and argon.
コン酸化膜成長前に請求項２及び請求項４に記載の加熱
処理の両方を同時に、もしくは連続して行うことを特徴
とする請求項１または請求項２に記載の半導体装置の製
造方法。6. The heat treatment according to claim 2 or 4, wherein the heat treatment is performed simultaneously or continuously after the growth of the second silicon oxide film and before the growth of the third silicon oxide film. The method for manufacturing a semiconductor device according to claim 1.
の真空槽内の水、水素、酸素の分圧測定を行うことを特
徴とする請求項１ないし請求項６のいずれかに記載の半
導体装置の製造方法。7. The method according to claim 1, wherein the partial pressures of water, hydrogen, and oxygen in the vacuum chamber during the heat treatment after the formation of the second silicon oxide film are measured. A method for manufacturing a semiconductor device.
の水、水素、酸素の分圧値により、加熱処理時間を制御
することを特徴とする請求項１ないし請求項７のいずれ
かに記載の半導体装置の製造方法。8. The heat treatment time according to claim 1, wherein the heat treatment time is controlled by a partial pressure value of water, hydrogen, and oxygen in the heat treatment tank after forming the second silicon oxide film. The manufacturing method of the semiconductor device described in the above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10150097A JPH10294311A (en) | 1997-04-18 | 1997-04-18 | Fabrication of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10150097A JPH10294311A (en) | 1997-04-18 | 1997-04-18 | Fabrication of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10294311A true JPH10294311A (en) | 1998-11-04 |
Family
ID=14302358
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10150097A Pending JPH10294311A (en) | 1997-04-18 | 1997-04-18 | Fabrication of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10294311A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002151510A (en) * | 2000-07-31 | 2002-05-24 | Applied Materials Inc | Wafer pretreatment to decrease rate of silicon dioxide deposition on silicon nitride compared to silicon substrate |
-
1997
- 1997-04-18 JP JP10150097A patent/JPH10294311A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002151510A (en) * | 2000-07-31 | 2002-05-24 | Applied Materials Inc | Wafer pretreatment to decrease rate of silicon dioxide deposition on silicon nitride compared to silicon substrate |
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