JPH04144109A - Wiring device - Google Patents

Wiring device

Info

Publication number
JPH04144109A
JPH04144109A JP26747590A JP26747590A JPH04144109A JP H04144109 A JPH04144109 A JP H04144109A JP 26747590 A JP26747590 A JP 26747590A JP 26747590 A JP26747590 A JP 26747590A JP H04144109 A JPH04144109 A JP H04144109A
Authority
JP
Japan
Prior art keywords
bus
board
wiring device
signal lines
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26747590A
Other languages
Japanese (ja)
Inventor
Masatoshi Nakao
雅俊 中尾
Hiroyuki Ibe
博之 井辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP26747590A priority Critical patent/JPH04144109A/en
Publication of JPH04144109A publication Critical patent/JPH04144109A/en
Pending legal-status Critical Current

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  • Small-Scale Networks (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

PURPOSE:To reduce crosstalk with a smaller number of parts and reduce the mounting density by providing dumping resistors and ferrite fuses respectively in series for a plurality of signal lines, and providing a plurality of buses, which collect the transmission signals in some divisions of a plurality of signal lines separately for each kind and have certain capacities. CONSTITUTION:In such constitution that the board where ICO (CPU) is wired and the board where IC1-ICn (memories) are wired are connected, the transmission signal between ICO and IC1-ICn is divided into information data, control data, and address data. In the signal line for each transmission signal, a dumping resistor R and a ferrite fuse L are interposed in series near each i/o terminal on the wiring board, whereby RL series circuits A10 and A11-A1n are constituted. Moreover, for one division of each signal line, those are collected on the back board BB separately for each kind of transmission signals thereby forming an information bus B1, a control bus B2, and an address bus B3, and the capacity that the bus itself is used in place of a capacitor, thus the number of parts of a filter circuit is reduced for reduction of crosstalk, and the mounting density is reduced.

Description

【発明の詳細な説明】 [発明の目的コ (産業上の利用分野) この発明は、通信機器等において複数の種類の信号を伝
送する際に、信号間のクロストークを低減する機能を備
えた配線装置に関する。
[Detailed Description of the Invention] [Purpose of the Invention (Industrial Application Field) The present invention provides a method for reducing crosstalk between signals when transmitting multiple types of signals in communication equipment, etc. Related to wiring devices.

(従来の技術) 周知のように、通信機器等にあっては、警報を集中的に
管理することが行われている。特に、近年の通信装置に
おける伝送速度の増大やコンピュータにおける演算速度
の増大、装置構成の複雑化、他のシステムとの適合性か
ら、その警報情報は種類、量ともに増大している。この
ような背景の中、装置内では多くのボードからの警報情
報が多数近接して伝送されることになる。それぞれの信
号の速度か低い場合には問題は少ないが、信号か高速の
場合は各信号間のクロストークが大きな問題となる。
(Prior Art) As is well known, alarms are centrally managed in communication equipment and the like. In particular, due to recent increases in transmission speeds in communication devices, increases in calculation speeds in computers, complexity of device configurations, and compatibility with other systems, the types and amounts of alarm information are increasing. Under such circumstances, a large number of alarm information from many boards are transmitted in close proximity within the device. If the speed of each signal is low, there is little problem, but if the speed of the signal is high, crosstalk between each signal becomes a big problem.

従来では、クロストークを低減するために第2図のよう
な配線装置が用いられている。この装置は、ICOとn
個のI C”、i〜ICnとをそれぞれ(R帰線を接続
する場合に、それぞれの端子のそばに、信号線に直列に
ダンピング抵抗RとフェライトビーズLを接続すると共
にコンデンサCで接地したフィルタ回路AO及びA1〜
Anを介在するようにしたものである。すなわち、この
配線装置では、フィルタ回路AO及びA1〜Anにより
信号から高周波ノイズを除去することによって、信号線
間で生じるり0ストークを低減している。
Conventionally, a wiring device as shown in FIG. 2 has been used to reduce crosstalk. This device is compatible with ICO and n
IC", i to ICn, respectively (When connecting the return line R, connect a damping resistor R and a ferrite bead L in series with the signal line near each terminal, and ground it with a capacitor C. Filter circuits AO and A1~
An is interposed therebetween. That is, in this wiring device, high frequency noise is removed from the signal by the filter circuits AO and A1 to An, thereby reducing zero-stoke occurring between the signal lines.

しかしながら、上記のような従来の配線装置では、伝送
信号の入出力端子数と等しいだけのダンピング抵抗R、
コンデンサC及びフェライトビーズLが必要なため、信
号線の本数が多い場合には部品点数が増加し、実装密度
が増大するという問題を有している。
However, in the conventional wiring device as described above, the damping resistance R is equal to the number of input/output terminals of the transmission signal,
Since a capacitor C and a ferrite bead L are required, when the number of signal lines is large, the number of parts increases and the mounting density increases.

(発明が解決しようとする課題) 以上述べたように従来の配線装置では、クロストークの
低減のために、伝送信号の入出力端子数と等しい数のダ
ンピング抵抗とコンデンサ、フェライトビーズか必要て
あり、信号線の本数の増大に伴って部品点数が増加し、
実装密度が増大してしまう。
(Problem to be Solved by the Invention) As described above, in conventional wiring devices, in order to reduce crosstalk, damping resistors, capacitors, and ferrite beads are required in the same number as the number of input/output terminals of the transmission signal. , the number of parts increases as the number of signal lines increases,
The packaging density will increase.

この発明は上記の課題を解決するためになされたもので
、より少ない部品点数でクロストークの低減が可能で、
実装密度の軽減を図ることのできる配線装置を提供する
ことを目的とする。
This invention was made to solve the above problems, and it is possible to reduce crosstalk with a smaller number of parts.
An object of the present invention is to provide a wiring device that can reduce packaging density.

[発明の構成] (課題を解決するための手段) 上記目的を達成するためにこの発明に係る配線装置は、
複数の信号線を近接配置して複数の種類の信号を並列に
伝送する配線装置において、前記複数の信号線にそれぞ
れ直列に介在される接続されるダンピング抵抗及びフェ
ライトビーズと、前記複数の信号線の一区間を伝送信号
の種類毎にまとめて一定の容量を有するように形成され
る複数のバスとを具備して構成される。
[Structure of the invention] (Means for solving the problem) In order to achieve the above object, the wiring device according to the present invention has the following features:
A wiring device that transmits a plurality of types of signals in parallel by arranging a plurality of signal lines in close proximity to each other, comprising: a damping resistor and a ferrite bead connected in series to each of the plurality of signal lines, and a plurality of the signal lines. A plurality of buses are formed to have a certain capacity by grouping one section of the bus for each type of transmission signal.

(作用) 上記構成の配線装置では、バス自身が容量を持つことを
利用して、複数の信号線にそれぞれ直列介在したダンピ
ング抵抗及びフェライトビーズと共に高周波ノイズを除
去するフィルタ回路を構成することにより、従来容入出
力端子に必要であったコンデンサを省略する。
(Function) In the wiring device having the above configuration, by utilizing the fact that the bus itself has a capacitance, a filter circuit is configured to remove high frequency noise together with damping resistors and ferrite beads which are interposed in series in each of the plurality of signal lines. Eliminates the need for capacitors that were previously required for input and output terminals.

(実施例) 以下、第1図を多照してこの発明の一実施例を説明する
。但し、第1図において、第2図と同一部分には同一符
号を付して示し、ここては異なる部分を中心に説明する
(Embodiment) An embodiment of the present invention will be described below with reference to FIG. However, in FIG. 1, the same parts as in FIG. 2 are designated by the same reference numerals, and the explanation will focus on the different parts here.

第1図は通信装置内のIC0(ここではCPUとする)
を配線した基板とICI〜ICn (ここではメモリと
する)配線した基板とを接続する配線装置の構成を示す
もので、ICOとICI〜ICnとの伝送信号としては
、情報データ、制御データ、アドレスデータに分けられ
る。各伝送信号の信号線には、ICO及びICI〜IC
nの配線基板上で各入出力端子の近傍にそれぞれダンピ
ング抵抗R及びフェライトビーズLを直列に介在して、
RL@列回路AIO及びA11〜A1nが構成される。
Figure 1 shows IC0 (here, CPU) in the communication device.
This shows the configuration of a wiring device that connects a board on which ICO is wired and a board on which ICI to ICn (herein referred to as memory) is wired.Transmission signals between ICO and ICI to ICn include information data, control data, and addresses. Divided into data. The signal lines for each transmission signal include ICO and ICI to IC.
A damping resistor R and a ferrite bead L are interposed in series near each input/output terminal on the n wiring board,
RL@column circuits AIO and A11 to A1n are configured.

また、各信号線の一区間は、バックボード基板BB上で
伝送信号の種類毎にまとめてハスラインとされる。すな
わち、バックボード基板BBには情報データバスB1、
制御バスB2、アドレスバスB3か形成される。
Further, one section of each signal line is grouped into a lotus line for each type of transmission signal on the backboard substrate BB. That is, the backboard board BB has an information data bus B1,
A control bus B2 and an address bus B3 are formed.

上記構成において、以下クロストーク低減作用について
説明する。
In the above configuration, the crosstalk reduction effect will be explained below.

一般に通信機器にあっては、バックボードに複数のボー
ドを挿入して1つのサブラックとする構成のものが広く
使用されている。ここでは、第1図のように、複数のI
C基板をバックボード基板BB上のバス81〜B3に接
続する。
2. Description of the Related Art Generally, in communication equipment, a configuration in which a plurality of boards are inserted into a backboard to form one subrack is widely used. Here, as shown in Figure 1, multiple I
Connect the C board to buses 81 to B3 on the backboard board BB.

ここで、バス81〜B3はバスの長さと幅、基板の厚さ
と誘電率によって決まる有限の容量を持っている。この
ため、バス81〜B3の容量があるために、RL直列回
路AIO及びAIl〜Alnとバス81〜B3と相撲っ
てフィルタ回路が構成され、従来のフィルタ回路で必要
であったコンデンサを省略しても、従来と同じ効果をあ
げることができる。
Here, the buses 81 to B3 have a finite capacity determined by the length and width of the bus, and the thickness and dielectric constant of the substrate. Therefore, due to the capacity of buses 81 to B3, a filter circuit is constructed by combining the RL series circuits AIO and AIl to Aln with buses 81 to B3, and the capacitors required in conventional filter circuits are omitted. However, the same effect as before can be achieved.

したがって、上記構成の配線装置は、信号をバックボー
ド上のバスを用いて伝送することにより、このバス自身
の持つ容量をコンデンサの変わりに使用することができ
、クロストーク低減のためのフィルタ回路の部品点数を
削減し、実装密度の軽減を実現することができる。
Therefore, by transmitting signals using the bus on the backboard, the wiring device with the above configuration can use the capacitance of this bus itself instead of a capacitor, and the filter circuit for reducing crosstalk can be used. It is possible to reduce the number of parts and reduce the packaging density.

[発明の効果] 以上のようにこの発明によれば、より少ない部品点数で
クロストークの低減が可能で、実装密度の軽減を図るこ
とのできる配線装置を提供することができる。
[Effects of the Invention] As described above, according to the present invention, it is possible to provide a wiring device that can reduce crosstalk with a smaller number of parts and can reduce packaging density.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明に係る配線装置の〜実施例を示す回路
図、第2図は従来のクロストーク低減機能を有する配線
装置の構成を示す回路図である。 A O= A n・・・フィルタ回路、R・・・ダンピ
ング抵抗、L・・−フィライトビーズ、C・・・コンデ
ンサ、A 1.0〜Aln・・・RL直列回路、BB・
・・バックボード、B1・・情報データバス、B2・・
・制mバス、B3・・アドレスバス。
FIG. 1 is a circuit diagram showing an embodiment of a wiring device according to the present invention, and FIG. 2 is a circuit diagram showing the configuration of a conventional wiring device having a crosstalk reduction function. A O=A n...filter circuit, R...damping resistor, L...-phyllite bead, C...capacitor, A1.0~Aln...RL series circuit, BB...
・・Backboard, B1・・Information data bus, B2・・・
・Control m bus, B3...address bus.

Claims (3)

【特許請求の範囲】[Claims] (1)複数の信号線を近接配置して複数の種類の信号を
並列に伝送する配線装置において、前記複数の信号線に
それぞれ直列に介在されるダンピング抵抗及びフェライ
トビーズと、前記複数の信号線の一区間を伝送信号の種
類毎にまとめて一定の容量を有するように形成される複
数のバスとを具備する配線装置。
(1) In a wiring device that transmits multiple types of signals in parallel by arranging multiple signal lines in close proximity, a damping resistor and a ferrite bead are interposed in series with each of the multiple signal lines, and the multiple signal lines A wiring device comprising a plurality of buses formed so as to have a certain capacity by grouping one section of the bus for each type of transmission signal.
(2)前記複数の種類の信号は情報データ、制御データ
、アドレスデータであり、前記複数のバスは情報データ
バス、制御バス、アドレスバスであることを特徴とする
請求項1記載の配線装置。
(2) The wiring device according to claim 1, wherein the plurality of types of signals are information data, control data, and address data, and the plurality of buses are an information data bus, a control bus, and an address bus.
(3)前記複数のバスは1枚の基板上に形成することを
特徴とする請求項1記載の配線装置。
(3) The wiring device according to claim 1, wherein the plurality of buses are formed on one substrate.
JP26747590A 1990-10-04 1990-10-04 Wiring device Pending JPH04144109A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26747590A JPH04144109A (en) 1990-10-04 1990-10-04 Wiring device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26747590A JPH04144109A (en) 1990-10-04 1990-10-04 Wiring device

Publications (1)

Publication Number Publication Date
JPH04144109A true JPH04144109A (en) 1992-05-18

Family

ID=17445361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26747590A Pending JPH04144109A (en) 1990-10-04 1990-10-04 Wiring device

Country Status (1)

Country Link
JP (1) JPH04144109A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7720393B2 (en) 2005-01-20 2010-05-18 Fujitsu Limited Optical module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7720393B2 (en) 2005-01-20 2010-05-18 Fujitsu Limited Optical module

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