JPH04136769U - data carrier - Google Patents

Abstract

(57) [Summary] [Purpose] To enable arbitrary specifications to be set after the data carrier is manufactured. [Structure] A status register 20 that holds specification setting data is provided in the data carrier, and a predetermined specification is written to this status register 20 as a specification setting command via an ID controller and a read/write head after manufacturing the data carrier. , is configured to be a data carrier according to its specifications.

Description

[Detailed explanation of the idea]

0001

[Industrial application field]

This invention is a tool for machine tools, parts in factories, product management or logistics systems. It relates to data carriers used in product identification systems.

0002

[Conventional technology]

Management of tools in conventional machine tools and identification of parts and products on assembly lines in factories In order to mechanize products, etc., it is necessary to identify and manage various items such as tools, parts, and products. system is required. Therefore, such as JP-A-63-221951 and JP-A-1-163991, A data carrier (ID unit) with memory is installed on the object to be identified, and an external Write the necessary information to the data carrier by data transmission from the An identification system has been proposed in which the information is read out. Such identification The data carrier used in the system is attached to a pallet, etc., and the pallet is transported. The write/read control unit placed on the side of the transmission path provides the necessary information to the data carrier. Configured to write or read data. Figure 5 shows one of the conventional data carriers. This is a block diagram showing an example, in which data is transferred to a resonant circuit consisting of a coil L and a capacitor C. The demodulation means 2 and the data demodulation means 3 are connected, and the memory is further connected via the memory control section 4. 5 is connected.

0003

[Problem that the idea aims to solve]

However, in such conventional data carriers, the memory that holds the data is Products with different specifications such as capacity and memory usage are used. Various such In order to realize a product with the specifications of Provide several terminals, connect jumper wires, printed circuit board patterns, etc., and connect the terminals. At the time of manufacturing, the logic level of the terminal was determined and the specifications were set. Therefore made Not only is the manufacturing process complicated, but it cannot be completed until the specifications are determined. The drawback was that it took time to ship the product.

0004 The present invention was developed in view of the problems of conventional data carriers. Therefore, it is technically necessary to be able to set the specifications of the data carrier after it has been assembled. Take it as a challenge.

[0005]

[Means to solve the problem]

This invention consists of a memory that holds data, and a memory that restores commands and data given from the outside. It has a data transmission means for transmitting the data read out from the memory, and A data carrier attached to an object that holds set specification data. A non-volatile memory with a configuration area and when a configuration command is given. Specification changing means for changing the specification setting area of the non-volatile memory. It is a sign.

[0006]

[Effect]

According to the present invention having such characteristics, the data carrier that holds the data Provide a specification setting area for setting the specifications of the data carrier in the data carrier. After the rear panel is manufactured, the setting data that defines its specifications is stored in memory as an external command. It is written in the specification setting area. Then, during actual operation, it is based on the specifications. It is configured to perform the desired operation. In this way, the memory control section can be connected to the printed circuit board. There is no need to set specifications using physical switches such as patterns; You can set the

[0007]

【Example】

FIG. 1 is a block diagram showing the overall configuration of a data carrier according to an embodiment of the present invention. FIG. 2 is a block diagram showing the detailed configuration of the memory control section. Shown in these figures The data carrier is transferred to the resonant circuit 1 consisting of the coil L1 and the capacitor C. An analog circuit consisting of data demodulation means 2 and data modulation means 3 is connected. data The demodulating means 3 demodulates the signal transmitted by ASK or FSK modulation, for example, and This is given to the harpoon control section 4. The memory control unit 4 sets specifications as described later. In addition to changing the specification data of internal registers according to the command, read command It also writes data to or reads data from the memory 5 based on a command or write command. It is. The data and response read from the memory 5 are then processed by data modulation means. given to 3. The data modulation means 3 controls the ASK signal and reverberation. A signal is transmitted to the read/write head side via the resonance circuit 1. This de A read/write head 6 for writing or reading data facing the data carrier is provided, and the read/write head 6 is controlled by an ID controller 7. Ru.

[0008] Next, the detailed configuration of the memory control unit 4 will be explained with reference to the block diagram of FIG. do. In this figure, the memory control unit 4 is a serial digitizer obtained from the data demodulating means 2. An S/P converter 11 that converts a parallel signal into a parallel signal, and a parallel signal converter that is the output of the S/P converter 11. It has a command decoder 12 for decoding commands. to S/P converter 11 is connected to the serial input control section 13. The serial input control section 13 By providing a clock signal to the S/P converter 11 during The obtained serial signal is converted into parallel data. command decoder 12 is a command that temporarily holds the command given from the read/write head 6. address register 12a, address register 12b that temporarily holds addresses, and Data register 12c for temporary storage and byte for holding the number of bytes of read data A number counter 12d is provided. The command decoder 12 has command execution information. A status control unit 14 and a memory control circuit 15 are connected to control the address. An address generation circuit 17 is connected via a bus 16. Status control section 14 is a frame given based on the clock signal given from the data demodulating means 2. It controls each block to execute the contents of the command data.

[0009] The memory control circuit 15 operates based on the write and read signals from the status control section 14. It controls writing/reading of data in the memory 5. Also command decoder The outputs of the twelve data registers 12c are given to the memory 5 via the data bus 18. It is. The data bus 18 has a device that temporarily holds data read out from the memory 5. A data buffer 19 is connected. Address generation circuit 17 is a command decoder Based on the address value from the address register 12b of 12, the status control unit 1 4, which sequentially generates addresses based on the step signal given by step 4. The address signal is applied to memory 5 and status register 20. status register As shown in Fig. 3, the star 20 sends and receives commands, echoes back and In addition to error codes, a specification setting register area is provided to hold specification setting data. It will be done. This register may be located in the same address space as memory 5, or may be a non-volatile register. It may also be constructed using unique memory. Also, the parallel of data buffer 19 The output is connected to a P/S converter 21. In addition, the status control unit 14 It is a sequential circuit that advances control of each part when a condition is established, and when outputting data. gives an output start signal to the serial output control section 22. Serial output control section 22 gives the P/S converter 21 a clock signal corresponding to the timing of transmission, and , start and stop bits are added. P/S converter 21 is data parity by converting the data held in the data buffer into a serial signal when reading bit, start bit, and stop bit to be applied to the data demodulation means 3 described above. It is something that can be achieved.

0010 Next, the operation of this embodiment will be explained. First, set the specifications specific to the data carrier. When setting the ID controller 7 and read/write from the host computer 8, A specification setting command is sent to the data carrier via the head 6. When setting specifications When the operation starts as shown in FIG. 4, the command decoder 12 of the data carrier determines whether it is a specification setting command, and if it is a specification setting command, the specification Change the contents of the setting register (steps 31, 32). This is shown for example in Figure 3. This is done by changing the specification setting register area of the status register 20. . Then, in step 33, read the response of setting completion from the data carrier. The data is transmitted to the light head side and processing ends. Here, the command decoder 12 In steps 31 to 33, the memory specification setting data area is set based on the specification setting command. It constitutes a specification change means for changing.

[0011] By doing this, from now on, when transmitting data between the data carrier and the read/write head, The contents of the status register 20 are always read and the specifications of the data carrier are recognized by the computer. For example, 8K bytes is implemented as memory 5. also writes the same data to multiple areas and determines whether they match when reading. Therefore, when shipping as a 2K byte specification with improved data reliability, Write the 2K byte specification in the configuration command. By doing this, you will be able to use the top compilation from now on. Only 2K bytes of memory 5 can be accessed by computer 8.

0012

[Effect of the idea]

As explained in detail above, in this invention, manufacturing of data carrier hardware is After completing the process, write specification setting information corresponding to the data carrier specifications to that memory. It is crowded. Therefore, any specifications can be set by writing this specification setting information after manufacturing. This has the effect of being able to determine the

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the overall configuration of a data carrier according to an embodiment of the present invention.

FIG. 2 is a block diagram showing the configuration of a memory control section of a data carrier according to an embodiment of the present invention.

FIG. 3 is a diagram showing the contents of a status register of a data carrier in this embodiment.

FIG. 4 is a flowchart showing an operation when setting specifications for a data carrier according to the present embodiment.

FIG. 5 is a block diagram showing an example of a conventional data carrier.

[Explanation of symbols]

1 Resonant circuit 2 Data demodulation means 3 Data modulation means 4 Memory control section 5 Memory 12 Command decoder 20 Status register

Claims (1)

[Scope of utility model registration request] 1. A data carrier attached to an object to be identified, comprising a memory for holding data, a data transmission means for demodulating commands and data given from the outside, and transmitting data read from the memory, , a nonvolatile memory having a specification setting area for holding specification data to be set, and specification changing means for changing the specification setting area of the nonvolatile memory when a specification setting command is given. Characteristic data carrier.