JPH04116857A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH04116857A JPH04116857A JP2236169A JP23616990A JPH04116857A JP H04116857 A JPH04116857 A JP H04116857A JP 2236169 A JP2236169 A JP 2236169A JP 23616990 A JP23616990 A JP 23616990A JP H04116857 A JPH04116857 A JP H04116857A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- metal stage
- recessed parts
- water content
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 34
- 239000011347 resin Substances 0.000 claims abstract description 34
- 229920005989 resin Polymers 0.000 claims abstract description 34
- 239000002184 metal Substances 0.000 claims abstract description 32
- 229910052751 metal Inorganic materials 0.000 claims abstract description 32
- 230000000694 effects Effects 0.000 abstract description 5
- 238000005476 soldering Methods 0.000 abstract description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 5
- 239000011159 matrix material Substances 0.000 abstract description 2
- 230000005855 radiation Effects 0.000 abstract 1
- 239000012528 membrane Substances 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000008016 vaporization Effects 0.000 description 2
- 238000009834 vaporization Methods 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- 229910020220 Pb—Sn Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910020994 Sn-Zn Inorganic materials 0.000 description 1
- 229910009069 Sn—Zn Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、金属ステージ上の半導体チップを樹脂により
モールドを行う半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device in which a semiconductor chip on a metal stage is molded with resin.
近年、半導体装置の製造において、特に樹脂モールド型
の半導体装置の製造時の欠陥を軽減し、歩留りの向上が
望まれている。そのため、製造時におけるモールド樹脂
のクラック等を防ぐ必要がある。In recent years, in the manufacture of semiconductor devices, it has been desired to reduce defects and improve yields, especially when manufacturing resin-molded semiconductor devices. Therefore, it is necessary to prevent cracks in the mold resin during manufacturing.
一般に、種々（例えば、ＱＦＰ、ＳＯＰ、ＰＬＣＣ）の
樹脂モールド型の半導体装置は、リードフレーム等の金
属ステージ上に半導体チップが接着剤等で固定され、該
半導体チップ上のポンディングパッドとインナリード間
でワイヤによりボンディングされたもので、これらを樹
脂によりモールドを行うものである。Generally, in various resin molded semiconductor devices (for example, QFP, SOP, PLCC), a semiconductor chip is fixed on a metal stage such as a lead frame with an adhesive, and bonding pads and inner leads on the semiconductor chip are fixed on a metal stage such as a lead frame. These are bonded with wires between them, and these are molded with resin.
このような半導体装置を空気中に放置すると、モールド
した樹脂が吸湿するという性質を有する。When such a semiconductor device is left in the air, the molded resin tends to absorb moisture.
そこで、該半導体装置をプリント板に実装する方法とし
てリフローはんだや赤外線リフロー等があり、リフロー
はんだ時には半導体パッケージ全体がはんだ融溶温度（
約１８０°Ｃ）以上に熱せられる。Therefore, methods for mounting the semiconductor device on a printed circuit board include reflow soldering and infrared reflow, and during reflow soldering, the entire semiconductor package reaches the solder melting temperature (
It can be heated to over 180°C.
この場合、半導体チップを搭載するステージ下に存在す
るモールド樹脂中の水分が気化し、数千倍に気体膨張し
、応力を生じる。この応力でモールド樹脂と金属ステー
ジとが剥れて間隙を生じると共に、金属ステージのエツ
ジ部分よりクラック（ひび割れ）が発生する。In this case, moisture in the molding resin that exists under the stage on which the semiconductor chip is mounted evaporates and the gas expands several thousand times, creating stress. This stress causes the mold resin and the metal stage to separate, creating a gap, and also causing cracks to occur at the edges of the metal stage.
そこで、クラック対策として、金属ステージとモールド
樹脂との接着性を改善することが考えられ、第２図に示
すようなものが知られている。第２図において、半導体
装置ｌは、前述のように半導体チップ２が金属ステージ
３上に接着剤４等で固定されインナリード５とワイヤ６
でボンディングされ、樹脂７によりモールドされている
。この場合、金属ステージ３の下部には全面にくぼみ８
が形成されている。このくぼみ８内に樹脂が廻り込むこ
とにより金属ステージ３と樹脂７との接触面積か大きく
なってアンカー効果により接着性を強化させるものであ
る。Therefore, as a countermeasure against cracks, it has been considered to improve the adhesion between the metal stage and the mold resin, and a method as shown in FIG. 2 is known. In FIG. 2, the semiconductor device 1 includes a semiconductor chip 2 fixed on a metal stage 3 with an adhesive 4 or the like, and inner leads 5 and wires 6 as described above.
bonded and molded with resin 7. In this case, the lower part of the metal stage 3 has a recess 8 on the entire surface.
is formed. As the resin flows into the depression 8, the contact area between the metal stage 3 and the resin 7 becomes larger, and the adhesiveness is strengthened due to the anchor effect.
しかし、上記のように接触性を強化させても前述の水分
気化による応力が、金属ステージ３と樹脂間に作用する
こととなり、クラック発生を完全に除去することができ
ないという問題がある。However, even if the contact property is strengthened as described above, the stress caused by moisture vaporization as described above acts between the metal stage 3 and the resin, and there is a problem that the generation of cracks cannot be completely eliminated.
そこで本発明は上記課題に鑑みなされたもので、リフロ
ー時に金属ステージと樹脂間に作用する気体応力を低減
させる半導体装置を提供することを目的とする。SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device that reduces gas stress acting between a metal stage and a resin during reflow.
上記課題は、金属ステージ上に半導体チップが搭載され
て樹脂封止される半導体装置において、前記金属ステー
ジの前記半導体チップ搭載の反対面に、所定数の凹部を
形成し、所定圧力又は所定温度で破断し、該凹部の総て
を覆うことにより該凹部内に空間領域を形成させる膜部
を設けることにより解決される。The above problem is solved by forming a predetermined number of recesses on the surface of the metal stage opposite to the surface on which the semiconductor chip is mounted, and applying a predetermined pressure or temperature to a semiconductor device in which a semiconductor chip is mounted on a metal stage and sealed with resin. The problem is solved by providing a membrane that breaks and covers all of the recesses, thereby forming a spatial region within the recesses.
上述のように、金属ステージに空間領域を膜部により形
成している。従って、リフロー時の温度上昇でモールド
樹脂中の水分が気体膨張した場合、圧力又は温度で膜部
が破断して、膨張した気体水分が該空間領域に廻り込む
。これにより、金属ステージと樹脂間に作用する応力が
低下し、クラックストレスを緩和させることが可能とな
る。As described above, the space region is formed on the metal stage by the membrane portion. Therefore, when moisture in the mold resin expands into gas due to a temperature rise during reflow, the membrane portion ruptures due to pressure or temperature, and the expanded gas moisture flows into the space area. This reduces the stress acting between the metal stage and the resin, making it possible to alleviate crack stress.
第１図に本発明の一実施例の構成図を示す。なお、第２
図と同一構成部分には同一符号を付す。FIG. 1 shows a configuration diagram of an embodiment of the present invention. In addition, the second
Components that are the same as those in the figures are given the same reference numerals.
第１図における半導体装置ｌは、第２図と略同様に、半
導体チップ２が金属ステージ３Ａに銀ペースト等の接着
剤１４により接着されて搭載される。In the semiconductor device 1 shown in FIG. 1, the semiconductor chip 2 is mounted on a metal stage 3A by being bonded with an adhesive 14 such as silver paste, in substantially the same manner as in FIG.
金属ステージ３Ａは、例えばＦ ｅ −Ｎ ｉ合金又は
Ｃｕ合金で板厚０．１５ｍで形成される。また、金属ス
テージ３Ａの半導体チップ２搭載の反対面にマトリクス
状又はランダムに複数個の凹部１０が形成される。この
凹部１０は、例えば深さ０．１ｍ直径０．２ｍの窪みで
ある。そして、膜部１１により該凹部１０の総てを覆い
、膜部１１と凹部１０間にそれぞれ空間領域１０Ａを形
成する。この膜部１１は、例えば５〜１０μｍのＰｂ−
３ｎ合金を金属ステージ３の当該反対面に圧接により設
けられる。Ｐｂ−Ｓｎ合金としては、Ｐｂ：５ｎ＝２０
：８０ｗｔ％等が使用される。すなわち、膜部１１は、
樹脂封止したときに、該樹脂が凹部１０に入り込むのを
防止する役割をなしている。The metal stage 3A is made of Fe-Ni alloy or Cu alloy, for example, and has a plate thickness of 0.15 m. Further, a plurality of recesses 10 are formed in a matrix or randomly on the surface of the metal stage 3A opposite to the surface on which the semiconductor chip 2 is mounted. This recess 10 is, for example, a depression with a depth of 0.1 m and a diameter of 0.2 m. Then, all of the recesses 10 are covered by the film part 11, and space regions 10A are formed between the film part 11 and the recesses 10, respectively. This film portion 11 has a thickness of 5 to 10 μm, for example, Pb-
3n alloy is provided on the opposite surface of the metal stage 3 by pressure welding. As a Pb-Sn alloy, Pb:5n=20
:80wt% etc. are used. That is, the membrane portion 11 is
This serves to prevent the resin from entering the recess 10 when the resin is sealed.
また、膜部１１は所定圧力で破断する。Further, the membrane portion 11 is broken at a predetermined pressure.
そして、半導体チップ２上のポンディングパッドとイン
ナリード５間でワイヤ６によりボンディングがなされ、
例えばエポキシ等の樹脂によりモールドされる。Then, bonding is performed between the bonding pad on the semiconductor chip 2 and the inner lead 5 using the wire 6,
For example, it is molded with a resin such as epoxy.
このような半導体装置１を空気中に放置すると、前述の
ように、樹脂７か吸湿し、金属ステージ３Ａと樹脂７と
の間に水分が存在する。この状態でフローソルダリング
や赤外線リフロー等を行うと、該水分が気化し、金属ス
テージ３Ａと樹脂７との間に応力が発生する。When such a semiconductor device 1 is left in the air, the resin 7 absorbs moisture, and moisture is present between the metal stage 3A and the resin 7, as described above. If flow soldering, infrared reflow, etc. are performed in this state, the water vaporizes and stress is generated between the metal stage 3A and the resin 7.
この樹脂７に含まれる水分の膨張による圧力により、膜
部１１が破断し、膨張する水分か凹部１０の空間領域１
０Ａに廻り込む。これにより、水分の気化圧力が低下し
て金属ステージ３Ａと樹脂７との間に作用する応力が緩
和されてクラックの発生が軽減されるものである。Due to the pressure caused by the expansion of the moisture contained in the resin 7, the membrane portion 11 is ruptured, and the expanding moisture is removed from the space area 1 of the recess 10.
It goes around to 0A. As a result, the vaporization pressure of moisture is reduced, the stress acting between the metal stage 3A and the resin 7 is relaxed, and the occurrence of cracks is reduced.
なお、上記実施例では、圧力で破断する膜部１１につい
て説明したが、膜部１１を、例えば固相線が１８０〜２
２０℃にあるはんだ材料（Ｓｎ−Ｚｎ（９１：９ｗｔ％
））等で形成し、フローソルダリングや赤外線リフロー
時の熱で溶融して破断させても同様の効果を有するもの
である。In the above embodiment, the membrane portion 11 that ruptures due to pressure has been described.
Solder material (Sn-Zn (91:9wt%) at 20℃
)), etc., and melted and broken by heat during flow soldering or infrared reflow, the same effect can be obtained.
以上のように本発明によれば、金属ステージに空間領域
を形成させることにより、樹脂の気体膨張時に該空間領
域に廻り込んで応力を低減させ、クラック発生を防止す
ることができ、これにより半導体装置製造における歩留
りを向上させることかできる。As described above, according to the present invention, by forming a space region in the metal stage, when gas expands in the resin, it goes around the space region and reduces stress, thereby preventing the occurrence of cracks in the semiconductor. It is possible to improve the yield in device manufacturing.
第１図は本発明の一実施例の構成断面図、第２図は従来
のクラック対策が施された半導体装置の構成断面図であ
る。
図において、
１は半導体装置、
２は半導体チップ、
３．３Ａは金属ステージ、
４は接着剤、
５はインナリード、
６はワイヤ、
７は樹脂、
１０は凹部、
１０Ａは空間領域、
１１は膜部
を示す。
１暫纏瞭鹸置
第１図
特許出願人 富 士 通 株式会社
第２図FIG. 1 is a cross-sectional view of the structure of an embodiment of the present invention, and FIG. 2 is a cross-sectional view of the structure of a semiconductor device in which conventional crack prevention measures are taken. In the figure, 1 is a semiconductor device, 2 is a semiconductor chip, 3.3A is a metal stage, 4 is an adhesive, 5 is an inner lead, 6 is a wire, 7 is a resin, 10 is a recess, 10A is a spatial region, 11 is a film Show part. 1 Provisional summary Figure 1 Patent applicant Fujitsu Ltd. Figure 2
Claims (1)
が搭載されて樹脂封止される半導体装置において、 前記金属ステージ（３＿Ａ）の前記半導体チップ（２）
搭載の反対面に、所定数の凹部（１０）を形成し、 所定圧力又は所定温度で破断し、該凹部 （１０）の総てを覆うことにより該凹部（１０）内に空
間領域（１０＿Ａ）を形成させる膜部（１１）を設ける
ことを特徴とする半導体装置。[Claims] Semiconductor chip (2) on metal stage (3, 3_A)
In the semiconductor device mounted with resin and sealed with resin, the semiconductor chip (2) of the metal stage (3_A)
A predetermined number of recesses (10) are formed on the opposite side of the mounting, and a space area (10_A) is created in the recess (10) by rupturing at a predetermined pressure or a predetermined temperature and covering all of the recesses (10). A semiconductor device characterized in that a film portion (11) is provided to form a film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2236169A JPH04116857A (en) | 1990-09-06 | 1990-09-06 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2236169A JPH04116857A (en) | 1990-09-06 | 1990-09-06 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04116857A true JPH04116857A (en) | 1992-04-17 |
Family
ID=16996797
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2236169A Pending JPH04116857A (en) | 1990-09-06 | 1990-09-06 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04116857A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6040093A (en) * | 1996-06-25 | 2000-03-21 | Seiko Epson Corporation | Method and transferring conductor patterns to a film carrier, and masks and film carriers to be used therefor |
-
1990
- 1990-09-06 JP JP2236169A patent/JPH04116857A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6040093A (en) * | 1996-06-25 | 2000-03-21 | Seiko Epson Corporation | Method and transferring conductor patterns to a film carrier, and masks and film carriers to be used therefor |
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