JPH07161909A - Resin-sealed type semiconductor device - Google Patents
Resin-sealed type semiconductor deviceInfo
- Publication number
- JPH07161909A JPH07161909A JP30363193A JP30363193A JPH07161909A JP H07161909 A JPH07161909 A JP H07161909A JP 30363193 A JP30363193 A JP 30363193A JP 30363193 A JP30363193 A JP 30363193A JP H07161909 A JPH07161909 A JP H07161909A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- resin
- island
- semiconductor device
- metal plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】この発明は樹脂封止型半導体装置
に関し、特に封止樹脂や半導体素子のクラックに対する
耐性を向上させた樹脂封止型半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device, and more particularly to a resin-encapsulated semiconductor device having improved resistance to cracks in an encapsulating resin or a semiconductor element.
【0002】[0002]
【従来の技術】近年電子機器の小型化、高性能化に伴い
実装回路全体としての小型薄型化が進んでいる。これに
伴い半導体パッケージも従来のリード挿入型から表面実
装型が広く使用されるようになってきている。表面実装
型部品のプリント配線板への搭載方法は、一般的にはプ
リント配線板の部品搭載ランドにクリーム半田を印刷等
で供給しておき、部品のリードを位置合わせして搭載
し、プリント配線板の上下より遠赤外線、熱風等で加熱
し、半田を溶融して取り付けるいわゆるリフロー半田付
けが採用されている。2. Description of the Related Art In recent years, with the miniaturization and high performance of electronic equipment, the miniaturization and thinning of the entire mounting circuit has been advanced. Along with this, the surface mount type semiconductor package has been widely used instead of the conventional lead insertion type. Generally, the method of mounting the surface mount type component on the printed wiring board is to supply cream solder to the component mounting land of the printed wiring board by printing etc., align the lead of the component and mount it. So-called reflow soldering is employed in which solder is melted and attached by heating with far infrared rays or hot air from above and below the plate.
【0003】リフロー半田付けは、従来リード挿入型部
品の半田付けに採用されていたフローソルダリングに比
較して、搭載部品が直接加熱されるため、部品自体の温
度が上昇し、そのため部品に種々の不具合が生じてい
る。例えば樹脂封止型半導体装置の場合は、封止樹脂が
吸湿していると吸湿された水分が気化し、封止樹脂にク
ラックが発生する事がある。また構成部品の熱膨張係数
の差に起因するストレスが発生してパッケージに反り等
を発生させることがある。この間の事情を図5〜図7を
参照して説明する。In reflow soldering, compared with flow soldering which has been conventionally used for soldering lead insertion type parts, the mounted parts are heated directly, so that the temperature of the parts themselves rises, and therefore various kinds of parts are used. There is a problem with. For example, in the case of a resin-encapsulated semiconductor device, if the encapsulating resin absorbs moisture, the absorbed moisture may vaporize, and cracks may occur in the encapsulating resin. In addition, stress may occur due to the difference in the coefficient of thermal expansion of the component parts, which may cause the package to warp. The situation during this time will be described with reference to FIGS.
【0004】図5は一般的な樹脂封止型半導体装置の構
造を模式的に表した断面図である。21はリードであ
り、アイランド22の上には導電性接着剤23を介して
半導体素子24が搭載されている。リード21と半導体
素子24の電極部(図示せず)との間はボンディングワ
イヤ等の導線25で接続されており、全体が封止樹脂2
6でモールド(封止)されている。FIG. 5 is a sectional view schematically showing the structure of a general resin-sealed semiconductor device. Reference numeral 21 is a lead, and a semiconductor element 24 is mounted on the island 22 via a conductive adhesive 23. A lead wire 25 such as a bonding wire is connected between the lead 21 and an electrode portion (not shown) of the semiconductor element 24, and the entire sealing resin 2 is formed.
It is molded (sealed) by 6.
【0005】図6は封止樹脂にクラックが入るメカニズ
ムを説明した断面図である。封止樹脂26内に外気より
侵入した水蒸気は、封止樹脂26とアイランド22の界
面に存在する微少な隙間で毛管凝縮され液化する。この
液化した水がリフロー時の高温下で爆発的に膨張する。
このため封止樹脂26とアイランド22との界面に大き
な水蒸気圧が加わり界面が剥離し間隔27を発生させ
る。封止樹脂26の吸湿量が多ければ界面剥離から樹脂
のクラック28へと至る。FIG. 6 is a cross-sectional view illustrating the mechanism of cracks in the sealing resin. The water vapor that has entered the sealing resin 26 from the outside air is condensed and liquefied by capillaries in the minute gaps existing at the interface between the sealing resin 26 and the island 22. This liquefied water explosively expands at high temperature during reflow.
Therefore, a large water vapor pressure is applied to the interface between the sealing resin 26 and the island 22, and the interface is peeled off to generate the gap 27. If the amount of moisture absorption of the sealing resin 26 is large, the interface peeling leads to the crack 28 of the resin.
【0006】一方半導体パッケージの薄型化の要求に対
し、半導体素子もしくはリードフレームを覆う樹脂の厚
さは必然的に薄くなってきている。そのため半導体素子
もしくはアイランド、モールド樹脂の間の熱膨張係数の
差に起因するストレスに耐えきれず、半導体素子もしく
はモールド樹脂にクラックが生ずる場合もある。図7は
熱膨張係数の差でパッケージに反りが生じ半導体素子に
クラック29が発生する様子を図示している。On the other hand, with the demand for thinner semiconductor packages, the thickness of the resin covering the semiconductor element or the lead frame is inevitably thinner. Therefore, the stress due to the difference in thermal expansion coefficient between the semiconductor element or the island and the mold resin cannot be endured, and the semiconductor element or the mold resin may be cracked. FIG. 7 illustrates a state in which the package is warped due to the difference in the coefficient of thermal expansion and cracks 29 are generated in the semiconductor element.
【0007】このためストレス発生を極少化する目的
で、半導体素子の上部の樹脂の厚さと、半導体素子が搭
載されたアイランド下部の樹脂の厚さを等しくしてバラ
ンスをとる等の工夫がされている。Therefore, for the purpose of minimizing the stress generation, the thickness of the resin on the upper part of the semiconductor element and the thickness of the resin on the lower part of the island on which the semiconductor element is mounted are made equal and balanced. There is.
【0008】[0008]
【発明が解決しようとする課題】上記のように樹脂封止
型半導体装置にはリフロー半田付けの際、半導体素子も
しくは封止樹脂にクラックが生ずるという不具合があっ
た。本発明はこのような事情に鑑みてなされたもので、
リフロー半田付けのような熱ストレスが加わった場合に
も封止樹脂や半導体素子にクラックが生じない樹脂封止
型半導体装置を提供しようとするものである。As described above, the resin-encapsulated semiconductor device has a problem that cracks occur in the semiconductor element or the encapsulating resin during reflow soldering. The present invention has been made in view of such circumstances,
An object of the present invention is to provide a resin-sealed type semiconductor device in which cracks do not occur in a sealing resin or a semiconductor element even when a thermal stress such as reflow soldering is applied.
【0009】[0009]
【課題を解決するための手段】上記目的を達成するため
に本発明では、半導体素子と、この半導体素子を搭載す
るアイランドと、前記半導体素子の電極部と電気的に接
続される複数のリードとを樹脂封止してなる樹脂封止型
半導体装置において、前記アイランドのほぼ中央で前記
半導体素子の裏面下に形成された、前記半導体素子の外
径より小なる開口部と、前記開口部より外径が小で前記
半導体素子の裏面下に所定の間隔をおいて係止され、前
記樹脂封止中に包含される金属板とを具備することを特
徴としている。In order to achieve the above object, according to the present invention, a semiconductor element, an island on which the semiconductor element is mounted, and a plurality of leads electrically connected to an electrode portion of the semiconductor element are provided. A resin-sealed semiconductor device obtained by resin-sealing a semiconductor element, the opening having a diameter smaller than the outer diameter of the semiconductor element and formed outside the rear surface of the semiconductor element at substantially the center of the island. And a metal plate which has a small diameter and is retained at a predetermined distance below the back surface of the semiconductor element and is included in the resin encapsulation.
【0010】[0010]
【作用】上記のように本発明では、アイランドのほぼ中
央で半導体素子の裏面下にこの半導体素子の外径より小
なる開口部を設け、さらにこの開口部に半導体素子の裏
面から所定の間隔をおいて前記開口部の外径より小な金
属板を係止しているので、樹脂封止時に樹脂がこの金属
板と半導体素子裏面との間に入り込むと同時に、前記金
属板全体も封止樹脂内に包含される。半導体素子と樹脂
の接着強度は金属板と樹脂との接着強度より強いので、
半導体素子と樹脂の界面に水分が溜まることはない。ア
イランド周縁部と樹脂の間に水分が溜まる可能性はある
が、アイランド中央部が開口され周縁部の面積が小にな
っているのでクラックを発生させるまでには至らない。As described above, according to the present invention, an opening having a diameter smaller than the outer diameter of the semiconductor element is provided below the back surface of the semiconductor element at approximately the center of the island, and the opening is provided with a predetermined distance from the back surface of the semiconductor element. Since the metal plate smaller than the outer diameter of the opening is locked, the resin enters between the metal plate and the back surface of the semiconductor element at the time of resin sealing, and at the same time, the entire metal plate is sealed with resin. Contained within. Since the adhesive strength between the semiconductor element and the resin is stronger than the adhesive strength between the metal plate and the resin,
Water does not accumulate at the interface between the semiconductor element and the resin. Water may accumulate between the edge of the island and the resin, but since the central area of the island is open and the area of the edge is small, cracking does not occur.
【0011】前記金属板の外向主面と樹脂との接着面に
も水分が溜まり樹脂クラックが生ずる可能性はあるが、
前記金属板の面積が従来のアイランドの面積よりも小さ
くなっているため発生応力は小さくなる。There is a possibility that water may be accumulated on the bonding surface between the resin and the outward main surface of the metal plate to cause resin cracks.
Since the area of the metal plate is smaller than the area of the conventional island, the generated stress is small.
【0012】一方樹脂ー半導体素子ー樹脂ー金属板ー樹
脂の5層構造を梁構造とみて、半導体素子の裏面にかか
る応力をシミュレーションしてみると,図3に示す結果
が得られる。図において横軸は半導体素子裏面と金属板
の距離、縦軸は半導体素子の下に金属板が存在しない場
合の応力を100としたときの相対値を表している。金
属板がFe-Ni 合金、樹脂をエポキシ樹脂とした場合のシ
ミュレーションであるが、金属板を半導体素子の裏面か
ら0.1 mm程度離して設置することにより、半導体素子
裏面の応力を40%程度低減させることができる。以上
のごとき二つの作用が相俟って封止樹脂のクラック、半
導体素子のクラックを防止することができる。On the other hand, when the stress applied to the back surface of the semiconductor element is simulated by considering the five-layer structure of resin-semiconductor element-resin-metal plate-resin as a beam structure, the results shown in FIG. 3 are obtained. In the figure, the horizontal axis represents the distance between the back surface of the semiconductor element and the metal plate, and the vertical axis represents the relative value when the stress when there is no metal plate under the semiconductor element is 100. This is a simulation when the metal plate is an Fe-Ni alloy and the resin is an epoxy resin. By placing the metal plate about 0.1 mm away from the back surface of the semiconductor element, the stress on the back surface of the semiconductor element is reduced by about 40%. be able to. The above two effects work together to prevent cracks in the sealing resin and cracks in the semiconductor element.
【0013】[0013]
【実施例】次に本発明の実施例を図を参照して説明す
る。図1は本発明の実施例に係わるリードフレームの平
面図、図2はこれを用いた半導体装置の断面図である。
図1において1はリードで後にカットされるダムバー2
によって他のリードとフレーム部3に連結されている。
4は後に半導体素子が搭載されるアイランドで、吊りピ
ン5でフレーム部3に連結され、かつ前記吊りピン5を
変形させる形で前記アイランドがディプレスされてい
る。前記アイラアンド4のほぼ中央には吊りピン6によ
って吊られた金属板7が形成されており、前記吊りピン
6を変形させる形で前記金属板7がディプレスされてい
る。即ち図2の半導体装置の断面図(図1のA−A線で
の断面図に相当する)に示されているように、リード1
に対しアイランド4が1段下がり、金属板7がアイラン
ド4より更に1段下がった形に形成されている。Embodiments of the present invention will now be described with reference to the drawings. 1 is a plan view of a lead frame according to an embodiment of the present invention, and FIG. 2 is a sectional view of a semiconductor device using the same.
In FIG. 1, 1 is a dam bar 2 which is cut later by a lead.
Is connected to the other lead and the frame portion 3.
Reference numeral 4 denotes an island on which a semiconductor element is to be mounted later. The island is connected to the frame portion 3 by the hanging pin 5 and the island is depressed so as to deform the hanging pin 5. A metal plate 7 hung by a hanging pin 6 is formed substantially in the center of the iron and wire 4, and the metal plate 7 is depressed so as to deform the hanging pin 6. That is, as shown in the sectional view of the semiconductor device of FIG. 2 (corresponding to the sectional view taken along the line AA of FIG. 1), the lead 1
On the other hand, the island 4 is lowered by one step, and the metal plate 7 is formed in a shape lower than the island 4 by one step.
【0014】このリードフレームを用いて図2に示す半
導体装置は次のように製造し得る。すなわち図1のリー
ドフレームのアイランド4の開口部の周縁に導電性接着
剤8をディスペンサ等で供給する。続いて半導体素子9
の周縁を開口部の周縁に重なるように載置し、加熱する
事により前記導電性接着剤8を硬化させる。Using this lead frame, the semiconductor device shown in FIG. 2 can be manufactured as follows. That is, the conductive adhesive 8 is supplied to the periphery of the opening of the island 4 of the lead frame shown in FIG. 1 by a dispenser or the like. Then, the semiconductor element 9
The conductive adhesive 8 is hardened by placing the peripheral edge of the conductive adhesive 8 so as to overlap the peripheral edge of the opening and heating.
【0015】次に前記半導体素子の電極パッド(図示せ
ず)とリード1の間を、よく知られたワイヤボンディン
グ法で接続する。10は導線(ボンディングワイヤ)で
ある。続いてボンディングの済んだリードフレームをモ
ールド金型に装填し、加熱され溶融した樹脂を高圧で送
り込み、いわゆるトランスファモールドを行う。このと
き溶融樹脂は金属板7の周囲を充填し、半導体素子9と
金属板7との間にも入り込む。封止樹脂11が硬化後、
モールド金型より取り出しダムバー2、リード1の先端
をカットしリードフォーミングする。次に吊りピン5を
カットすることにより、図2に示す半導体装置が完成す
る。Next, the electrode pad (not shown) of the semiconductor element and the lead 1 are connected by a well-known wire bonding method. 10 is a conducting wire (bonding wire). Then, the bonded lead frame is loaded into a molding die, and the heated and melted resin is fed under high pressure to perform so-called transfer molding. At this time, the molten resin fills the periphery of the metal plate 7 and also enters between the semiconductor element 9 and the metal plate 7. After the sealing resin 11 is cured,
The tip of the dam bar 2 and the lead 1 is taken out from the mold and the lead is formed. Next, the hanging pins 5 are cut to complete the semiconductor device shown in FIG.
【0016】このようにして形成された半導体装置は、
半導体素子9の裏面中央が封止樹脂11と密着してお
り、この界面に水分が溜まることはない。また半導体素
子9の裏面とパッケージ裏面との間に金属板7が介在す
ることにより、半導体素子9の裏面に発生する熱応力も
軽減される。The semiconductor device thus formed is
The center of the back surface of the semiconductor element 9 is in close contact with the sealing resin 11, and moisture does not collect at this interface. Further, since the metal plate 7 is interposed between the back surface of the semiconductor element 9 and the back surface of the package, thermal stress generated on the back surface of the semiconductor element 9 is also reduced.
【0017】具体例として厚さ0.15mmの Fe-Ni合金を
用いて図1のリードフレームを作成した。アイランド4
と金属板7も同一材料、同一厚さで形成されることにな
る。10×8 mmのアイランド4の中央に7 ×5 mmの開
口部を設け、更にその中央に4隅で吊りピン6に吊られ
た5 ×3 mmの金属板7を形成し、この金属板7を 0.1
mmディプレスした。これに9.4 ×7.4 mm、厚さ0.35
mmの半導体素子を銀系の導電性接着剤8を用いてマウ
ントした。硬化後の導電性接着剤8の厚さは0.03mmで
あった。次にワイヤボンディングを行ったのち、封止樹
脂11としてエポキシ樹脂でトランスファモールドを行
って図2に示すごとき半導体装置を作成した。As a specific example, the lead frame shown in FIG. 1 was prepared using a Fe-Ni alloy having a thickness of 0.15 mm. Island 4
The metal plate 7 is also formed of the same material and the same thickness. An opening of 7 × 5 mm is provided in the center of the island 4 of 10 × 8 mm, and a metal plate 7 of 5 × 3 mm hung from the hanging pins 6 at the four corners is further formed in the center. To 0.1
mm depressed. 9.4 x 7.4 mm, thickness 0.35
A mm semiconductor element was mounted using a silver-based conductive adhesive 8. The thickness of the conductive adhesive 8 after curing was 0.03 mm. Next, after wire bonding was performed, transfer molding was performed using epoxy resin as the sealing resin 11 to produce a semiconductor device as shown in FIG.
【0018】上記具体例で図2における厚さ方向の寸法
は下記の如くなる。すなわち半導体素子9上の樹脂厚が
0.235mm、半導体素子9の厚さが0.35mm、半導体素
子9と金属板7との間隔が0.13mm、金属板7の厚さが
0.15 mm、金属板7の下の樹脂厚が0.135 mmであ
り、総厚 1.0mmの半導体装置を実現した。In the above specific example, the dimension in the thickness direction in FIG. 2 is as follows. That is, the resin thickness on the semiconductor element 9 is
0.235 mm, the thickness of the semiconductor element 9 is 0.35 mm, the distance between the semiconductor element 9 and the metal plate 7 is 0.13 mm, and the thickness of the metal plate 7 is
0.15 mm, the resin thickness under the metal plate 7 was 0.135 mm, and a semiconductor device with a total thickness of 1.0 mm was realized.
【0019】このようにして作成した半導体装置を、最
も厳しいリフロー手法として知られるIR(赤外線)リ
フロー(最高温度240℃)に供したが、樹脂クラック
や半導体素子のクラックは発生しなかった。The semiconductor device thus produced was subjected to IR (infrared) reflow (maximum temperature 240 ° C.) known as the most severe reflow method, but no resin cracks or semiconductor element cracks occurred.
【0020】以上本発明の実施例を説明したが、本発明
は上記実施例に限られるものではなく、発明の主旨を逸
脱しない範囲で種々の変形を採り得ることはいうまでも
ない。例えば上記実施例では導線10としてボンディン
グワイヤの例を説明したが、TAB(Tape Automated B
onding)方式等の箔状導線であっても良い。Although the embodiments of the present invention have been described above, it is needless to say that the present invention is not limited to the above embodiments and various modifications can be made without departing from the spirit of the invention. For example, in the above-mentioned embodiment, the example of the bonding wire is explained as the conductive wire 10, but TAB (Tape Automated B
It may be a foil conductor such as an onding type.
【0021】[0021]
【発明の効果】上記の如く本発明ではアイランドのほぼ
中央部に開口部を設け、半導体素子の裏面中央部が樹脂
と密着するようにしたので、アイランド下に溜まる水分
の量を極めて少なくすることができる。このためリフロ
ー時の加熱に起因する水分の気化膨張に基づく樹脂クラ
ックを防止することができる。As described above, according to the present invention, the opening is provided in the substantially central portion of the island so that the central portion of the back surface of the semiconductor element is in close contact with the resin. You can Therefore, it is possible to prevent resin cracks due to vaporization and expansion of water due to heating during reflow.
【0022】加えて開口部下に所定の距離をおいて金属
板を係止しているので、この金属板が無い場合に比較し
て半導体素子裏面のストレスを40%程度軽減すること
ができ、半導体素子のクラックも防止することができ
る。以上のように本発明の構造は、リフロー時の耐クラ
ック性向上に極めて効果が大なるものである。In addition, since the metal plate is locked under the opening at a predetermined distance, the stress on the back surface of the semiconductor element can be reduced by about 40% as compared with the case without the metal plate. It is also possible to prevent cracks in the device. As described above, the structure of the present invention is extremely effective in improving crack resistance during reflow.
【図1】本発明の実施例に係わるリードフレーム1素子
分の要部平面図。FIG. 1 is a plan view of a main part of one element of a lead frame according to an embodiment of the present invention.
【図2】本発明の実施例に係わる半導体装置の断面図。FIG. 2 is a sectional view of a semiconductor device according to an embodiment of the invention.
【図3】本発明の構造における半導体素子裏面と金属板
との距離と、半導体素子裏面における相対応力の関係を
示した図。FIG. 3 is a diagram showing the relationship between the distance between the back surface of the semiconductor element and the metal plate and the relative stress on the back surface of the semiconductor element in the structure of the present invention.
【図4】従来技術に係わるリードフレーム1素子分の要
部平面図。FIG. 4 is a plan view of an essential part of one element of a lead frame according to a conventional technique.
【図5】従来技術に係わる半導体装置の断面図。FIG. 5 is a cross-sectional view of a semiconductor device according to a conventional technique.
【図6】従来技術における半導体装置の樹脂クラックの
発生メカニズムを説明する断面図。FIG. 6 is a cross-sectional view illustrating a mechanism of resin crack generation in a semiconductor device according to a conventional technique.
【図7】従来技術における半導体装置の半導体素子クラ
ックの発生メカニズムを説明した断面図。FIG. 7 is a cross-sectional view illustrating a mechanism of a semiconductor element crack of a semiconductor device according to a conventional technique.
1 … リード 2 … ダムバー 3 … フレーム部 4 … 吊りピン 5 … アイランド 6 … 吊りピン 7 … 金属板 8 … 導電性接着剤 9 … 半導体素子 10 … 導線(ボンディングワイヤ) 11 … 封止樹脂 1 ... Lead 2 ... Dam bar 3 ... Frame part 4 ... Hanging pin 5 ... Island 6 ... Hanging pin 7 ... Metal plate 8 ... Conductive adhesive 9 ... Semiconductor element 10 ... Conducting wire (bonding wire) 11 ... Sealing resin
Claims (1)
るアイランドと、前記半導体素子の電極部と電気的に接
続される複数のリードとを樹脂封止してなる樹脂封止型
半導体装置において、前記アイランドのほぼ中央で前記
半導体素子の裏面下に形成された前記半導体素子の外径
より小なる開口部と、前記開口部より外径が小で前記半
導体素子の裏面下に所定の間隔をおいて係止され、前記
樹脂封止中に包含される金属板とを具備することを特徴
とする樹脂封止型半導体装置。1. A resin-sealed semiconductor device comprising a semiconductor element, an island on which the semiconductor element is mounted, and a plurality of leads electrically connected to an electrode portion of the semiconductor element, which are resin-sealed. An opening smaller than the outer diameter of the semiconductor element formed under the back surface of the semiconductor element at approximately the center of the island, and a predetermined distance under the back surface of the semiconductor element having an outer diameter smaller than the opening. And a metal plate included in the resin encapsulation, the resin-encapsulated semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30363193A JPH07161909A (en) | 1993-12-03 | 1993-12-03 | Resin-sealed type semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30363193A JPH07161909A (en) | 1993-12-03 | 1993-12-03 | Resin-sealed type semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07161909A true JPH07161909A (en) | 1995-06-23 |
Family
ID=17923316
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP30363193A Pending JPH07161909A (en) | 1993-12-03 | 1993-12-03 | Resin-sealed type semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07161909A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008034416A (en) * | 2006-07-26 | 2008-02-14 | Denso Corp | Semiconductor device |
-
1993
- 1993-12-03 JP JP30363193A patent/JPH07161909A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008034416A (en) * | 2006-07-26 | 2008-02-14 | Denso Corp | Semiconductor device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7443022B2 (en) | Board-on-chip packages | |
JP2929273B2 (en) | Ball grid array semiconductor package unit PCB carrier frame and method of manufacturing ball grid array semiconductor package using the same | |
JP3310617B2 (en) | Resin-sealed semiconductor device and method of manufacturing the same | |
US7015593B2 (en) | Semiconductor device having contact prevention spacer | |
KR100192760B1 (en) | Method for manufacturing bga package using metal carrier frame | |
JP2501953B2 (en) | Semiconductor device | |
JPH01303730A (en) | Mounting structure of semiconductor element and manufacture thereof | |
JPH0964244A (en) | Semiconductor device and its manufacture | |
JP3119649B2 (en) | Semiconductor device having heat dissipation structure on both sides and method of manufacturing the same | |
JPH07161909A (en) | Resin-sealed type semiconductor device | |
JPH08236665A (en) | Resin sealed semiconductor device and manufacture thereof | |
JP3314574B2 (en) | Method for manufacturing semiconductor device | |
KR100237912B1 (en) | Packaged semiconductor, semiconductor device made therewith and method for making same | |
JP3398580B2 (en) | Semiconductor device manufacturing method and substrate frame | |
JP3300525B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
JPH1084055A (en) | Semiconductor device and its manufacturing method | |
JPH0870087A (en) | Lead frame | |
JP4175339B2 (en) | Manufacturing method of semiconductor device | |
JPH06132443A (en) | Semiconductor device and lead frame used for manufacture thereof | |
JPS6095944A (en) | Plug-in package and manufacture thereof | |
KR100348862B1 (en) | Method for fabricating Semiconductor package | |
JPH0794674A (en) | Semiconductor device and fabrication thereof | |
JPS63232452A (en) | Semiconductor device | |
JPH09181223A (en) | Semiconductor device | |
JPH0529493A (en) | Plastic molded type semiconductor device |