JPH04114232A - Microcomputer - Google Patents

Abstract

PURPOSE:To reduce the burden of a CPU processing and to improve speed for an average value calculation processing by providing a circuit to sample only the set number of data having the length of plural bits from a peripheral circuit, to calculate the average value and to output it to a central operation processor. CONSTITUTION:A simplified average value calculation circuit 6 is provided to sample only the set number of data having the length of plural bits from a peripheral circuit 5, to calculate the average value and to output it to a CPU 1. Namely, this microcomputer is equipped with the CPU 1, address bus 2, data bus 3, input / output device 4 and peripheral circuit 6 and adds the simplified average value calculation circuit 6 to them. Thus, the burden of the CPU processing can be reduced and the speed for the average value calculation processing can be improved.

Description

Detailed Description of the Invention [Industrial Field of Application] The present invention relates to a system configured with a microcomputer as one component, in which a value input to the microcomputer from a device other than the microcomputer, or a value input inside the microcomputer This relates to a microcomputer that controls the entire system using the average value of the values generated by the microcomputer.

[Conventional technology]

FIG. 4 is a block diagram showing the configuration of a system including a conventional microcomputer, in which 1 is a central processing unit (hereinafter abbreviated as CPU), 2 is an address bus, 3 is a data bus, 4 is an input/output device, 5 is A/D converter, timer, U
Some peripheral circuits such as ART and 12 indicate external devices.

The data sent from the external device 12 to the microcomputer is an analog value, a pulse of a certain width, a serial/
All data other than the dual data are sent to the peripheral circuit 5 via the input/output device 4.The peripheral circuit 5 converts each form of data into m-bit dual data that can be processed by the CPU. is converted to

These data are transferred from the input/output bag f4 or the peripheral circuit 5 to the CPUI via the data bus 3 and address bus 2, where they are subjected to arithmetic processing 2 and analysis processing. As a result, the next control of the system is determined, and the next operation command is issued from the CPU to the input/output device 4 or the peripheral circuit 5, and even to the external device 12 via the data bus 3 and the address bus 2. Sent.

[Problem to be solved by the invention]

Since conventional microcomputers are configured in this way, all the pigs processed by the peripheral circuit 5 are transferred to the CP.
Since it enters the UI and undergoes calculation and analysis processing there, the CP
Since the load on LJ 1 was heavy and the calculation process took time, it was not possible to determine the next action in real time.

In particular, when several pieces of data are sampled and the system is controlled based on the average value, the CPU must fetch the data from the peripheral circuit 5 every time it is sampled and calculate the average value. Further, calculation of the average value of a plurality of values having the same m-bit length as the m-bit operation bit length of the CPU requires complicated processing that takes into account carry.

The present invention has been made to solve such problems, and aims to reduce the burden on CPU processing and improve the average value calculation processing speed.

[Means to solve the problem]

The microcomputer according to the present invention samples a set number of multiple bit length data from the peripheral circuit 5,
It is equipped with a simple average value calculation circuit 6 that calculates the average value and outputs it to the CPUI.

[Effect]

In the present invention, the simple average value calculation circuit 6 samples a set number of data having a plurality of bit lengths from the peripheral circuit 5, calculates the average value, and outputs the average value to the CPUI.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing the configuration of a microcomputer according to an embodiment of the present invention, in which 1 is a CPU as in the conventional example, 2 is an address bus, 3 is a data bus, and 4 is an input/output device. , 5 are peripheral circuits, and in this embodiment, a simple average value calculation circuit 6 is added thereto.

FIG. 2 shows an example of the configuration of the simple average value calculation circuit 6. 7
is an adder circuit, 8 is a shifter, 9 is an average value register, 10
is a control circuit, and 11 is a switch. FIG. 3 is a diagram illustrating the operation of the simple average value calculation circuit 6.

As shown in FIG. 3, this average value calculation circuit 6 samples m-bit length data by 2 to the n power and calculates the average value.

The size of the sampling population is 2 to the nth power (n=1.2.
3...) is a configuration that can be selected arbitrarily, and the CP
It is set via the address bus 2 and data bus 3 by the UI. The set value of n is stored in a register within the control circuit 10.

First, in the adder circuit 7, data of m bit length is
Multiply and add. The control circuit 10 counts the number of data sent from the peripheral circuit 5, and when it reaches a preset population size (2 to the n power), the m + n bit length addition result is sent to the switch 11. Open it and send it to shifter 8. The shifter 8 receives instructions from the control circuit 10 and moves the lower n
The digits are rounded down and the upper m bits of data are stored in the average value register 9.
Transfer to.

A signal indicating the completion of the average value calculation is sent to the CPUI, and in response to this, the CPUI reads the value of the average value register 9 via the address bus 2 and the data bus 3. The CPUI analyzes this average value to determine the next action of the system. The adder 7 has a size in which n bits are added to the CPUI's operation bit length m bits, and the optimum size can be selected for each microcomputer.

〔Effect of the invention〕

As described above, according to the present invention, since the average value is calculated by the simple average value calculation circuit independently from the CPU, the burden on the CPU processing can be reduced and the average value calculation processing speed can be improved. There is an effect that it can be done.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a microcomputer according to the present invention, FIG. 2 is a diagram showing an embodiment of a simple average value calculation circuit according to the present invention, and FIG. 3 is a diagram explaining its operation.
FIG. 4 is a block diagram showing the configuration of a conventional microcomputer. ■...CPU, 2...Address bus, 3...Data bus, 4...I/O device, 5...Peripheral circuit, 6
...Simple average value calculation circuit, 7...Adder, 8...
Shifter 9...Average value register, 10...Control wholesale circuit, 11...Switch. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Agent Patent Attorney Jun Miyazono Figure 1−−＋＋＋＋−−−−−−−−−ノ

Claims (1)

[Claims] In a microcomputer consisting of a central processing unit, peripheral circuits, input/output devices, and an address and data bus, a set number of multi-bit length data are sampled from the peripheral circuits and the average value is calculated. A microcomputer comprising a simple average value calculation circuit that outputs the calculated average value to the central processing unit.