JPH0395243U - - Google Patents

Info

Publication number
JPH0395243U
JPH0395243U JP1990003643U JP364390U JPH0395243U JP H0395243 U JPH0395243 U JP H0395243U JP 1990003643 U JP1990003643 U JP 1990003643U JP 364390 U JP364390 U JP 364390U JP H0395243 U JPH0395243 U JP H0395243U
Authority
JP
Japan
Prior art keywords
array chip
led array
wiring board
led
light emitted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1990003643U
Other languages
English (en)
Other versions
JP2541118Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990003643U priority Critical patent/JP2541118Y2/ja
Publication of JPH0395243U publication Critical patent/JPH0395243U/ja
Application granted granted Critical
Publication of JP2541118Y2 publication Critical patent/JP2541118Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Description

【図面の簡単な説明】
第１図は本考案の第１実施例であるＬＥＤプリ
ントヘツドの横断面図、第２図は従来のＬＥＤプ
リントヘツドの横断面図、第３図は第１図の矢印
方向からの矢視図、第４図は本考案の第２実施
例であるＬＥＤプリントヘツドの横断面図、第５
図は本考案の第３実施例であるＬＥＤプリントヘ
ツドの横断面図である。 １１……ＬＥＤアレイチツプ、１１ａ……発光
部、１２……ドライバＩＣ、１３……配線基板、
１３ｂ……透光部、１４ａ，１４ｂ，１４ｃ，１
４ｄ……配線パターン、１６……拡散制限手段、
１６ａ，……開口部、１７……はんだバンプ、２
０……拡散制限手段、２１……感光体、２２……
金属細線。

Claims (1)

  1. 【実用新案登録請求の範囲】 (1) 感光体に投射する光を発するＬＥＤアレイ
    チツプと、このＬＥＤアレイチツプを駆動するド
    ライバＩＣと、表面に配線パターンを有してこの
    配線パターン上に前述のＬＥＤアレイチツプやド
    ライバＩＣを搭載する配線基板と、前記ＬＥＤア
    レイチツプの発する光が一定範囲以上に拡散して
    感光体に投射されないようにＬＥＤアレイチツプ
    の発する光の拡散を制限する拡散制限手段とを具
    備したＬＥＤプリントヘツドであつて、 前記ＬＥＤアレイチツプは、発光部が前記配線
    基板の表面に対峙した状態で配線基板に搭載され
    、 前記配線基板には、搭載したＬＥＤアレイチツ
    プの発する光を透過させる透光部が設けられ、 前記拡散制限手段は、一定範囲以上に拡散する
    光をマスク部材で遮光する構成とされて、 前記ＬＥＤアレイチツプの発する光の内、前記
    配線基板の透光部と拡散制限手段とを通過した光
    が感光体に投射されることを特徴としたＬＥＤプ
    リントヘツド。 (2) 前記配線基板は、ＬＥＤアレイチツプの発
    する光を透過させる透明な部材で形成された透明
    基板の表面に前記配線パターンを所定形状に形成
    したものとし、前記透光部が配線パターンを施し
    ていない部分の透明基板によつて提供されること
    を特徴とした請求項１記載のＬＥＤプリントヘツ
    ド。 (3) 前記拡散制限手段のマスク部材には、金属
    もしくは不透明の樹脂が使用され、かつ、拡散制
    限手段が前記配線基板の表面又は裏面に薄膜状に
    密着形成されていることを特徴とした請求項１ま
    たは２に記載のＬＥＤプリントヘツド。 (4) 前記拡散制限手段が、配線基板上に形成さ
    れる配線パターンの一部であることを特徴とする
    請求項１または２に記載のＬＥＤプリントヘツド
    。
JP1990003643U 1990-01-18 1990-01-18 Ｌｅｄプリントヘッド Expired - Fee Related JP2541118Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990003643U JP2541118Y2 (ja) 1990-01-18 1990-01-18 Ｌｅｄプリントヘッド

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990003643U JP2541118Y2 (ja) 1990-01-18 1990-01-18 Ｌｅｄプリントヘッド

Publications (2)

Publication Number Publication Date
JPH0395243U true JPH0395243U (ja) 1991-09-27
JP2541118Y2 JP2541118Y2 (ja) 1997-07-09

Family

ID=31507454

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990003643U Expired - Fee Related JP2541118Y2 (ja) 1990-01-18 1990-01-18 Ｌｅｄプリントヘッド

Country Status (1)

Country Link
JP (1) JP2541118Y2 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0761035A (ja) * 1993-06-30 1995-03-07 Ricoh Co Ltd 広幅サイズ用ｌｅｄ書込ヘッド

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6463173A (en) * 1987-09-02 1989-03-09 Alps Electric Co Ltd Optical writing head
JPH0262256A (ja) * 1988-08-29 1990-03-02 Matsushita Electric Ind Co Ltd 光プリンタ用書き込みヘッド

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6463173A (en) * 1987-09-02 1989-03-09 Alps Electric Co Ltd Optical writing head
JPH0262256A (ja) * 1988-08-29 1990-03-02 Matsushita Electric Ind Co Ltd 光プリンタ用書き込みヘッド

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0761035A (ja) * 1993-06-30 1995-03-07 Ricoh Co Ltd 広幅サイズ用ｌｅｄ書込ヘッド

Also Published As

Publication number Publication date
JP2541118Y2 (ja) 1997-07-09

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Legal Events

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