JPH0391295A - Multilayer electronic printed circuit board - Google Patents

Multilayer electronic printed circuit board

Info

Publication number
JPH0391295A
JPH0391295A JP1226585A JP22658589A JPH0391295A JP H0391295 A JPH0391295 A JP H0391295A JP 1226585 A JP1226585 A JP 1226585A JP 22658589 A JP22658589 A JP 22658589A JP H0391295 A JPH0391295 A JP H0391295A
Authority
JP
Japan
Prior art keywords
film
electronic circuit
circuit board
resin
porous ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1226585A
Other languages
Japanese (ja)
Other versions
JP2803752B2 (en
Inventor
Kiyotaka Tsukada
輝代隆 塚田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP1201757A priority Critical patent/JP2787953B2/en
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP1226585A priority patent/JP2803752B2/en
Priority to US07/556,521 priority patent/US5144536A/en
Priority to KR1019900011819A priority patent/KR100211852B1/en
Priority to DE69008963T priority patent/DE69008963T2/en
Priority to EP90114875A priority patent/EP0411639B1/en
Publication of JPH0391295A publication Critical patent/JPH0391295A/en
Application granted granted Critical
Publication of JP2803752B2 publication Critical patent/JP2803752B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To enhance high-moisture resistance and high-temperature resistance and improve reliability by using an electronic circuit where a direct film-shaped element is formed on the surface of a sintered porous ceramic body, laminating it, and then impregnating a resin into a pore within a sintered body. CONSTITUTION:Electronic printed circuit boards 1, 1 are laminated above the under a center electronic printed circuit board 2 and these are adhered into one piece. A film-shaped conductive circuit 12 and a film-shaped conductive circuit 13 are adhered and formed onto the surface side of a sintered porous ceramic 11 body 11 as a substrate and the film-shaped conductive circuit 12 is adhered and formed onto the rear side of this electronic circuit board 1. Also, in this adhesion state, the film-shaped conductive circuit 12 and the lower surface of the film-shaped resistor 13 are engaged on a recessed and projected part of the surface among a large number of ceramic particles 10 consisting the sintered porous ceramic body 11 in wedge shape. Also, a resin 14 which is impregnated after lamination is filled into a pore which is formed among the ceramic particles 10 in the sintered porous ceramic body 11. The porous ceramic and film-shaped elements are directly adhered in this manner, thus enabling the film-shaped elements to be extremely stable against environmental change such as temperature and humidity.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は1表面に導電性回路等の膜状素子を形成した。[Detailed description of the invention] [Industrial application field] In the present invention, a film element such as a conductive circuit is formed on one surface.

信頼性に優れた多層状の電子回路基板に関する。This invention relates to a highly reliable multilayer electronic circuit board.

〔従来技術〕[Prior art]

近年、電子回路基板としては種々のものが知られ、かつ
実用化されており1例えばガラス・エポキシ複合体、ア
ルミナ質焼結体およびムライト質焼結体等を基板材料と
する電子回路基板が提案され使用されている。そして、
高集積化を促進する1つの方法として、シリコン集積回
路などを直接基板に搭載する実装方法が検討されている
In recent years, various types of electronic circuit boards have become known and put into practical use.1 For example, electronic circuit boards using glass-epoxy composites, alumina sintered bodies, mullite sintered bodies, etc. as substrate materials have been proposed. has been used. and,
As one method for promoting higher integration, a mounting method in which silicon integrated circuits and the like are directly mounted on a substrate is being considered.

しかしながら、ガラス・エポキシ複合体はシリコン集積
回路と熱膨張率が大きく異なるため、該基板に直接搭載
することのできるシリコン集積回路は極めて小さいもの
に限られている。そればかりでなく、ガラス・エポキシ
複合体のみからなる基板は5回路形成工程において寸法
が変化し易いため、特に微細で精密な回路が要求される
基板には適用が困難である。
However, since the glass-epoxy composite has a significantly different coefficient of thermal expansion from that of silicon integrated circuits, the silicon integrated circuits that can be directly mounted on the substrate are limited to extremely small ones. In addition, since the dimensions of a substrate made only of a glass-epoxy composite tend to change during the five-circuit forming process, it is difficult to apply this method to substrates that require particularly fine and precise circuits.

また、アル旦す質焼結体やムライト質焼結体は硬度が高
く機械加工性に劣る。そのため3例えばスルーホール等
を設けるような機械加工が必要な場合には、生成形体の
段階で加工した後焼成する方法が行われている。しかし
、焼成時の収縮を均一に生じさせることは困難であり、
特に高い寸法精度を要求されるものや寸法の大きなもの
を製造することは困難であった。
In addition, aluminum sintered bodies and mullite sintered bodies have high hardness and poor machinability. For this reason, if machining is required, for example to create through holes, etc., a method is used in which the machining is performed at the stage of forming the green body and then fired. However, it is difficult to cause uniform shrinkage during firing,
It has been difficult to manufacture products that require particularly high dimensional accuracy or have large dimensions.

そこで、これらの問題に対処するため、特開昭61−2
87190号あるいは特開昭61−82689号には、
多孔質セラミックの気孔に樹脂を含浸した基板が提案さ
れている。
Therefore, in order to deal with these problems,
No. 87190 or JP-A-61-82689,
A substrate in which the pores of porous ceramic are impregnated with resin has been proposed.

この基板は、セラミックの気孔率を種々変化させること
で、実装する部品1例えばシリコン集積回路等の熱膨張
に合わせたもので、低膨張で寸法安定性に優れている。
This substrate is made by varying the porosity of the ceramic to match the thermal expansion of the component 1 to be mounted, such as a silicon integrated circuit, and has low expansion and excellent dimensional stability.

また1機械加工が容易で大型化及び軽量化に対応できる
In addition, machining is easy and it can be made larger and lighter.

一方、近年は、高集積化のために、電子回路基板の多層
化が進んでいる。また、チップ抵抗、コンデンサー等の
チップ部品に代わり、これら素子を膜状に回路上に形成
した膜状素子を有する電子回路基板が開発されている。
On the other hand, in recent years, electronic circuit boards have become more multilayered in order to achieve higher integration. Moreover, instead of chip components such as chip resistors and capacitors, electronic circuit boards having film-like elements in which these elements are formed on circuits in the form of films have been developed.

このように、膜状の導電性回路、抵抗体、コンデンサー
等の膜状素子を形成することにより、電子回路基板の小
型化、軽量化が図られる。
In this way, by forming film-like conductive circuits, resistors, capacitors, and other film-like elements, the electronic circuit board can be made smaller and lighter.

〔解決しようとする課題〕[Problem to be solved]

しかしながら、上記の多孔質セラミックー樹脂含浸基板
に膜状素子を形成した電子回路基板は使用上の信頼性に
乏しい。
However, the electronic circuit board in which film-like elements are formed on the porous ceramic resin-impregnated substrate described above has poor reliability in use.

即ち、多孔質セラミックー樹脂含浸体では、その表面に
形成した膜状素子が樹脂上に形成されるため、樹脂の挙
動により膜状素子が著しく影響を受ける。例えば、高湿
度、高温度により、上記樹脂と接触している膜状素子の
初期特性1例えば抵抗値、コンデンサー容量が大きく変
動するという大きな欠点がある。
That is, in a porous ceramic-resin-impregnated body, since the membrane elements formed on the surface thereof are formed on the resin, the membrane elements are significantly influenced by the behavior of the resin. For example, there is a major drawback in that initial characteristics 1, such as resistance value and capacitor capacity, of the membrane element in contact with the resin vary greatly due to high humidity and high temperature.

本発明は、かかる従来の問題点に鑑み、上記の多孔質セ
ラミック焼結体−樹脂含浸基板の長所を生かした。耐高
温度性、耐高温度性に優れた。信頼性の高い多層電子回
路基板を提供しようとするものである。
In view of these conventional problems, the present invention takes advantage of the advantages of the porous ceramic sintered body-resin impregnated substrate described above. Excellent high temperature resistance. The present invention aims to provide a highly reliable multilayer electronic circuit board.

[課題の解決手段] 本発明は、多孔質セラミック焼結体の表面に膜状の導電
性回路、抵抗体、コンデンサー等の膜状素子を直接形成
して電子回路基板を作製し、その後該電子回路基板を積
層し1次いで上記多孔質セラくツク焼結体の気孔内に樹
脂を充填してなることを特徴とする多層電子回路基板に
ある。
[Means for Solving the Problems] The present invention produces an electronic circuit board by directly forming film-like conductive circuits, resistors, capacitors, and other film-like elements on the surface of a porous ceramic sintered body, and then This multilayer electronic circuit board is characterized in that circuit boards are laminated and then resin is filled into the pores of the porous ceramic sintered body.

本発明において最も注目すべきことは、多孔質セラミッ
ク焼結体の表面に直接膜状素子を形成した電子回路基板
を用い、これを積層し9次いで前記焼結体の気孔内に樹
脂を含浸したことである。
The most noteworthy feature of the present invention is that an electronic circuit board in which membrane elements are directly formed on the surface of a porous ceramic sintered body is used, and these are laminated, and then resin is impregnated into the pores of the sintered body. That's true.

即ち2本発明の電子回路基板においては、多孔質セラミ
ック焼結体の表面の気孔及び凹凸に、導電性回路等の膜
状素子がくさび状に入り込んで直接密着している。一方
、膜状素子形成部分以外の気孔内には、電子回路基板を
積層した後に樹脂が充填される。
That is, in the electronic circuit board of the second aspect of the present invention, a membrane element such as a conductive circuit is inserted into the pores and irregularities of the surface of the porous ceramic sintered body in a wedge shape and directly adheres thereto. On the other hand, the pores other than the part where the membrane element is formed are filled with resin after the electronic circuit boards are laminated.

多孔質セラ旦ツタ焼結体の表面に導電性回路等の膜状素
子を形成する方法としては、まずセラミックの生成形体
に膜状素子を形成する粒子を含んだペーストを、印刷な
どの方法により塗布し1次いでセラミックの生成形体を
焼結体が形成される温度で焼成する方法がある。
To form a film-like element such as a conductive circuit on the surface of a porous ceramic sintered body, first, a paste containing particles to form a film-like element is applied to a ceramic formed body by a method such as printing. There is a method of coating and then firing the ceramic green body at a temperature at which a sintered body is formed.

また、他の方法としては、まず多孔質セラもツタ焼結体
を作成しておいた後3その表面に前記ペーストを塗布し
1次いで焼つける方法がある。
Another method is to first prepare a porous ceramic sintered body, then apply the paste on its surface and then bake it.

更に、多孔質セラミック焼結体の表面に回路となる部分
以外をマスクして、蒸着、スパッター等により導電性回
路等の膜状素子を形成し、その後前記マスクを除去する
方法がある。
Furthermore, there is a method in which a film element such as a conductive circuit is formed by vapor deposition, sputtering, etc. by masking the surface of the porous ceramic sintered body except for the part that will become the circuit, and then removing the mask.

いずれの方法においても、多孔質セラミック焼結体と膜
状素子が、直接密着していることが重要である。
In either method, it is important that the porous ceramic sintered body and the membrane element are in direct contact with each other.

上述のように多孔質セラミックと膜状素子が直接密着し
ていることで、膜状素子は温度、湿度などの環境変化に
対して極めて安定になる。
As described above, the direct contact between the porous ceramic and the membrane element makes the membrane element extremely stable against environmental changes such as temperature and humidity.

ここに膜状素子とは、前記のごとき導電性回路。The term "membrane element" here refers to a conductive circuit as described above.

膜状抵抗体、膜状コンデンサーなど、基板上に膜状に形
成する電子部品をいう。また、これらの膜状素子は、電
子回路基板の片面又は両面に形成する。
Refers to electronic components formed in the form of a film on a substrate, such as film resistors and film capacitors. Further, these film elements are formed on one or both sides of the electronic circuit board.

また、上記多孔質セラミック焼結体の材質としては、コ
ージェライト、アル柔す、窒化アルξニラム。ムライト
、チタン酸マグネシウム、チタン酸アルごニウム、二酸
化ケイ素、酸化鉛、酸化亜鉛、酸化ベリリウム、酸化錫
、酸化バリウム、酸化マグネシウム、酸化カルシウムの
いずれか少なくとも1種を主成分とするセラミックスな
どがある。この中、コージェライトは、熱膨張率がシリ
コン集積回路のそれに近く、好ましい材料である。
The porous ceramic sintered body may be made of cordierite, aluminum, or aluminum nitride. There are ceramics whose main component is at least one of mullite, magnesium titanate, argonium titanate, silicon dioxide, lead oxide, zinc oxide, beryllium oxide, tin oxide, barium oxide, magnesium oxide, and calcium oxide. . Among these, cordierite is a preferred material because its coefficient of thermal expansion is close to that of silicon integrated circuits.

本発明において、前記多孔質セラミック焼結体は、平均
気孔径が0. 2〜15μmであることが好ましい。こ
の理由は、平均気孔径が0.2よりも小さいと、前記膜
状素子と多孔質セラミック焼結体との密着力が低下する
からである。即ち、密着力向上のための楔効果が低下す
るためである。
In the present invention, the porous ceramic sintered body has an average pore diameter of 0. It is preferable that it is 2-15 micrometers. The reason for this is that when the average pore diameter is smaller than 0.2, the adhesion between the membrane element and the porous ceramic sintered body decreases. That is, this is because the wedge effect for improving adhesion is reduced.

一方、平均気孔径が15μmよりも大きいと、多孔質セ
ラごンク焼結体の表面よりかなり深く膜状素子が入り込
み、精度の高い電子回路基板の形成が困難となるからで
ある。
On the other hand, if the average pore diameter is larger than 15 μm, the membrane element will penetrate considerably deeper than the surface of the porous ceramic sintered body, making it difficult to form a highly accurate electronic circuit board.

また2本発明においては、気孔率が10%(容量比)以
上であることが好ましい。この理由は。
Further, in the present invention, the porosity is preferably 10% (volume ratio) or more. The reason for this is.

気孔率が10%より小さいと、前記楔効果が低下するか
らである。
This is because if the porosity is less than 10%, the wedge effect will be reduced.

なお、このようにできた基板の表裏の導通は。Furthermore, the conductivity between the front and back sides of the board created in this way is as follows.

多孔質セラミック焼結体に樹脂を充填した後にスルーホ
ールを形成し、無電解銅メツキ等で容易に導通すること
ができる。
After filling the porous ceramic sintered body with resin, through holes are formed, and electrical conductivity can be easily established by electroless copper plating or the like.

しかして、上記のごとく構成した電子回路基板は、その
複数枚を積層状に接合して、多層体とし。
Therefore, the electronic circuit board configured as described above is made into a multilayer body by bonding a plurality of the electronic circuit boards in a laminated manner.

その後多孔質セラミック焼結体の気孔内に樹脂を含浸さ
せて、多層電子回路基板とする(第1図参照)。
Thereafter, the pores of the porous ceramic sintered body are impregnated with resin to form a multilayer electronic circuit board (see FIG. 1).

上記焼結体中に含浸させる樹脂としては、エポキシ樹脂
、ポリイミド樹脂、トリアジン樹脂、ポリパラバン酸樹
脂、ポリアミトイミド樹脂、シリコン樹脂、エポキシシ
リコン樹脂、アクリル酸樹脂、メタクリル酸樹脂、アニ
リン酸樹脂、フェノール樹脂、ウレタン系樹脂、フラン
系樹脂、フッ素樹脂などがある。
Examples of the resin to be impregnated into the sintered body include epoxy resin, polyimide resin, triazine resin, polyparabanic acid resin, polyamitimide resin, silicone resin, epoxy silicone resin, acrylic acid resin, methacrylic acid resin, anilic acid resin, phenol resin, There are urethane resins, furan resins, fluororesins, etc.

また、これら樹脂を多孔質焼結体中に含浸させる方法と
しては、樹脂を加熱溶融しておき、この中に電子回路基
板の積層体を浸漬する方法がある。
Further, as a method of impregnating these resins into a porous sintered body, there is a method of heating and melting the resin and immersing a laminate of electronic circuit boards in the resin.

また、樹脂を溶媒に溶かして含浸させる方法、モノマー
状態の樹脂を含浸させた後ポリマー化する方法などがあ
る。
Other methods include a method of dissolving a resin in a solvent and impregnating it, and a method of impregnating a resin in a monomer state and then turning it into a polymer.

また、上記積層に当たっては、各電子回路基板の間に次
の絶縁層を介在させることが好ましい。
Further, in the above lamination, it is preferable to interpose the following insulating layer between each electronic circuit board.

このように絶縁層を介在させることにより上下の基板上
の導体同志の接触を防止する。
By interposing the insulating layer in this manner, contact between the conductors on the upper and lower substrates is prevented.

上記絶縁層としては、樹脂又は樹脂と無機拐料との複合
材を用いる。該樹脂としては、エポキシ樹脂、フェノー
ル樹脂、ポリイミド樹脂などを用いる。樹脂と無機材料
との複合材としては、エポキシ樹脂とガラスファイバー
、フェノール樹脂とシリカ粉末、エポキシ樹脂とマイカ
などを用いる。
As the insulating layer, a resin or a composite material of a resin and an inorganic material is used. As the resin, epoxy resin, phenol resin, polyimide resin, etc. are used. As a composite material of resin and inorganic material, epoxy resin and glass fiber, phenol resin and silica powder, epoxy resin and mica, etc. are used.

また、上記のごとくして得た多層電子回路基板の表面に
は、更に前記絶縁層を設け、その上に導体層を形成する
こともできる(第4図参照)。
Furthermore, the above-described insulating layer may be further provided on the surface of the multilayer electronic circuit board obtained as described above, and a conductive layer may be formed thereon (see FIG. 4).

上記導体層とは、電子回路をいう。該導体層の形成は1
例えば金属箔をラミネートすると、蒸着。
The above-mentioned conductor layer refers to an electronic circuit. Formation of the conductor layer is 1
For example, when laminating metal foil, it is vapor-deposited.

スパッタリング、電解或いは無電解メツキ等の方法によ
り行う。
This is carried out by methods such as sputtering, electrolytic or electroless plating.

〔作用及び効果〕[Action and effect]

本発明の多層電子回路基板は、各電子回路基板が、多孔
質セラミック焼結体の表面に、直接膜状素子を密着させ
ているため、膜状素子が上記焼結体の粒子の間にくさび
状に強固に結合しており。
In the multilayer electronic circuit board of the present invention, since each electronic circuit board has a membrane element in direct contact with the surface of the porous ceramic sintered body, the membrane element is wedged between the particles of the sintered body. It is strongly connected to the shape.

膜状素子が剥離することはない。また、膜状素子が形成
されていない部分は、気孔内に樹脂が充填されているの
で、耐高湿度性、耐高温度性にも優れている。
The membrane element does not peel off. Furthermore, since the pores of the portion where the membrane element is not formed are filled with resin, it has excellent high humidity resistance and high temperature resistance.

また、樹脂を充填させることで基板全体の強度を増加さ
せ9割れにくくすると同時に機械加工を容易にし、カケ
、チッピング等の加工欠陥を防ぐことができる。また、
気体の透過を防ぎ使用環境からの影響を低減することに
効果的である。
In addition, filling the board with resin increases the strength of the entire board, making it less likely to crack, and at the same time making machining easier and preventing processing defects such as chips and chipping. Also,
It is effective in preventing gas permeation and reducing the influence from the usage environment.

したがって1本発明によれば、耐高温度性、耐高温度性
及び機械加工性に優れた。信頼性の高い多層電子回路基
板を提供することができる。
Therefore, according to the present invention, high temperature resistance, high temperature resistance, and machinability are excellent. A highly reliable multilayer electronic circuit board can be provided.

〔実施例〕〔Example〕

第1実施例 本発明の実施例にかかる多層電子回路基板につき、第1
図〜第3図を用いて説明する。
First Embodiment Regarding the multilayer electronic circuit board according to the embodiment of the present invention, the first embodiment
This will be explained using FIGS.

該多層電子回路基板は、第1図に示すごとく。The multilayer electronic circuit board is as shown in FIG.

中央の電子回路基板2の上下に電子回路基板11を積層
し、これらを一体的に接着したものである。上記電子回
路基板1は、第2図に示すごとく。
Electronic circuit boards 11 are stacked above and below a central electronic circuit board 2, and these are bonded together. The electronic circuit board 1 is as shown in FIG.

基板としての多孔質セラミック焼結体11の表側面に、
膜状導電性回路12と膜状抵抗体13をまた裏側面には
膜状導電性回路12を密着形成したものである。
On the front side of the porous ceramic sintered body 11 as a substrate,
A film-like conductive circuit 12 and a film-like resistor 13 are formed in close contact with each other on the back side.

また、上記の密着状態は、第3図に示すごとく。Further, the above-mentioned close contact state is as shown in FIG.

多孔質セラミック焼結体11を構成する多数のセラミッ
ク粒子10の間の凹凸表面部分に、膜状導電性回路12
.膜状抵抗体13の下面がくさび状に喰い込んだ状態に
ある。また、多孔質セラミック焼結体11の内部におい
ては、セラミック粒子10の間に形成された気孔内に、
積層後において含浸された樹脂14が充填されている。
A film-like conductive circuit 12 is formed on the uneven surface portion between the large number of ceramic particles 10 constituting the porous ceramic sintered body 11.
.. The lower surface of the film resistor 13 is wedge-shaped. Furthermore, inside the porous ceramic sintered body 11, in the pores formed between the ceramic particles 10,
After lamination, the impregnated resin 14 is filled.

また、上記電子回路基板2においても、電子回路基板1
と同様である。
Also, in the electronic circuit board 2, the electronic circuit board 1
It is similar to

上記のごとく1本例の多層電子回路基板は、電子回路基
板1.1の間に電子回路基板2を5設けたもので、各電
子回路基板1,1.2はその表裏両面に膜状素子を有す
る。それ故2本例は6層回路の多層電子回路基板である
As described above, the multilayer electronic circuit board of this example is one in which five electronic circuit boards 2 are provided between the electronic circuit boards 1.1, and each electronic circuit board 1, 1.2 has film-like elements on both the front and back sides. has. Therefore, the two examples are multilayer electronic circuit boards with six layer circuits.

また、該多層電子回路基板は、積層体とした後に、その
全体を溶融樹脂中に浸漬して該樹脂を含浸させているの
で、各基板の間にも樹脂14が充填され、またその表面
が該樹脂により被覆された状態にある。
Moreover, since the multilayer electronic circuit board is made into a laminate, the entire board is immersed in molten resin to be impregnated with the resin, so that the resin 14 is also filled between each board, and the surface thereof is It is in a state covered with the resin.

第2実施例 本例は、第4図に示すごとく、8層回路の多層電子回路
基板であり、最表面にも絶縁層の上に導体層を形成した
ものである。
Second Embodiment As shown in FIG. 4, this embodiment is a multilayer electronic circuit board with an eight-layer circuit, in which a conductive layer is formed on the insulating layer on the outermost surface as well.

即ち1本例の多層電子回路基板は、電子回路基板51,
52.53を積層接着してなり、また上下の最表面には
、絶縁層3を設け、その表面に導体層40を設けたもの
である。
That is, one example of a multilayer electronic circuit board includes an electronic circuit board 51,
52 and 53 are laminated and bonded together, and an insulating layer 3 is provided on the upper and lower outermost surfaces, and a conductor layer 40 is provided on the surface thereof.

上記の各電子回路基板51,52.53は、膜状導電性
回路512,522,532.膜状抵抗体513,52
3,533.を、その表面に形成1 している。また、電子回路基板51,52.53におけ
る膜状導電性回路、膜状抵抗体の間、更に最表面の導体
層40との間には、基板一基板導通スルーホール55.
基板内スルーホール57がそれぞれ設けである。なお、
各電子回路基板51゜52.53の間には含浸された樹
脂層14が介在されて、これらの間の電気絶縁性を確保
している。
Each of the above-mentioned electronic circuit boards 51, 52.53 includes film-like conductive circuits 512, 522, 532. Film resistor 513, 52
3,533. is formed on its surface. Further, between the film-like conductive circuits and film-like resistors on the electronic circuit boards 51, 52, and 53, and further between the outermost conductor layer 40, there are board-to-substrate conductive through holes 55.
Through-holes 57 are provided in each substrate. In addition,
An impregnated resin layer 14 is interposed between each of the electronic circuit boards 51, 52, and 53 to ensure electrical insulation between them.

これら膜状導電性回路12.膜状抵抗体13と。These film-like conductive circuits 12. and a film resistor 13.

基板としての多孔質セラミック焼結体との密着状態、多
孔質セラごツク焼結体内の樹脂充填状態などは、第1実
施例に示した電子回路基板lと同様である。
The state of close contact with the porous ceramic sintered body as a substrate, the resin filling state within the porous ceramic sintered body, etc. are the same as those of the electronic circuit board l shown in the first embodiment.

しかして、上記第1及び第2実施例にかかる多層電子回
路基板は、それを構成する各電子回路基板が前記のごと
き構成を有し、また多孔質セラミック焼結体の気孔内に
は樹脂が含浸されているので、耐高温度性、耐高温度性
3機械加工性に優れ。
Therefore, in the multilayer electronic circuit boards according to the first and second embodiments, each of the electronic circuit boards constituting the multilayer electronic circuit boards has the above-described structure, and resin is contained in the pores of the porous ceramic sintered body. Because it is impregnated, it has excellent high temperature resistance and high temperature resistance 3 machinability.

信頼性が高い。Highly reliable.

第3実施例 前記第2実施例に示した。8層回路の多層電子2 回路基板(第4図参照)を作製し、テストを行った。Third embodiment This is shown in the second embodiment. 8 layer circuit multilayer electronics 2 A circuit board (see FIG. 4) was manufactured and tested.

該多層電子回路基板は、まず電子回路基板Aと電子回路
基板Bとを作製しておき、電子回路基板A、Aの間に電
子回路基板Bを積層することにより作製した。
The multilayer electronic circuit board was manufactured by first preparing an electronic circuit board A and an electronic circuit board B, and then laminating the electronic circuit board B between the electronic circuit boards A and A.

即ち、電子回路基板Aを作製するため、平均粒径が1.
8μmのコージェライト粉末100重量部に対してポリ
ビニールアルコール2重量部、ポリエチレングリコール
1重量部、ステアリン酸0゜5重量部及び水100重量
部を配合し、ボールミル中で3時間混合した後、噴霧乾
燥した。
That is, in order to produce the electronic circuit board A, the average particle size is 1.
2 parts by weight of polyvinyl alcohol, 1 part by weight of polyethylene glycol, 0.5 parts by weight of stearic acid, and 100 parts by weight of water were mixed with 100 parts by weight of 8 μm cordierite powder, mixed in a ball mill for 3 hours, and then sprayed. Dry.

この乾燥物を適量採取し、金属製押し型を用いて1.O
t/cdの圧力で底形し、大きさが220mmX250
iaX 1. 2m、密度1.5g/cIIl(60v
o 1%)のセラごツクス生成形体を得た。
Collect an appropriate amount of this dried material and use a metal press to perform 1. O
Bottom shape with t/cd pressure, size 220mm x 250
iaX 1. 2m, density 1.5g/cIIl (60v
o 1%) was obtained.

この生成形体を大気中、1400℃で1時間焼成して多
孔質コージェライト焼結体とした。
This formed body was fired in the air at 1400° C. for 1 hour to obtain a porous cordierite sintered body.

得られた多孔質セラミック焼結体は、厚みが0゜25f
flI11で、密度が1.8g/cJ気孔率が30vo
l(容量)%、平均気孔径が3.2μmであった。
The obtained porous ceramic sintered body has a thickness of 0°25f.
flI11, density 1.8g/cJ porosity 30vo
l (volume)%, and the average pore diameter was 3.2 μm.

この多孔質コージェライト焼結体の表面に、平均粒径1
1μmの銀−白金粒子を46%含んだ粘度90Pa −
sのペーストを、325メツシユのスクリーンで印刷し
た。これにより、前記多孔質コージェライト焼結体上に
膜状素子としての導電性回路を形成し、乾燥した後、空
気中850°Cで焼付けた。
On the surface of this porous cordierite sintered body, an average grain size of 1
Viscosity 90 Pa - containing 46% of 1 μm silver-platinum particles.
The paste of s was printed on a 325 mesh screen. As a result, a conductive circuit as a membrane element was formed on the porous cordierite sintered body, dried, and then baked at 850° C. in air.

この時点における上記導電性回路のパターンの密着強度
は、  3kg/ml11”であった。次いで、平均粒
径16μmの酸化ルテニウム粒子を38%含んだ粘度1
60Pa−sのペーストを、325メツシユのスクリー
ンで印刷し、前記導体上に膜状素子としての膜状抵抗体
を形成した。乾燥した後。
At this point, the adhesion strength of the conductive circuit pattern was 3 kg/ml11''.
A 60 Pa-s paste was printed using a 325 mesh screen to form a film resistor as a film element on the conductor. After drying.

空気中850°Cで焼付けた。この時の抵抗値は23Ω
/口であった。
Baked in air at 850°C. The resistance value at this time is 23Ω
/It was a mouth.

ここで、この基板を85℃・85%RH(相対湿度)で
1000時間、高温、高温寿命試験を行った。その結果
、抵抗値の変化率は0.15%で5 あり、優れた安定性を有していた。
Here, this substrate was subjected to a high temperature and high temperature life test for 1000 hours at 85° C. and 85% RH (relative humidity). As a result, the rate of change in resistance value was 0.15%, indicating excellent stability.

以上により、電子回路基板Aを作製した。Through the above steps, electronic circuit board A was manufactured.

次に、電子回路基板Bを作製するため、平均粒径が2.
4μmのアルミナ粉末50重量部に対して、平均粒径が
0.7μmのアルミナ粉末50重量部とポリアクリル酸
エステル12重量部、ポリエステル分散剤1重量部、ジ
ブチルフタレート2重量部及び酢酸エチル50重量部を
配合し、ボールミル中で3時間混合した後、シート底形
した。
Next, in order to produce electronic circuit board B, the average particle size is 2.
For 50 parts by weight of alumina powder of 4 μm, 50 parts by weight of alumina powder with an average particle size of 0.7 μm, 12 parts by weight of polyacrylic ester, 1 part by weight of polyester dispersant, 2 parts by weight of dibutyl phthalate, and 50 parts by weight of ethyl acetate. After mixing in a ball mill for 3 hours, a sheet was formed.

この生成形体を大気圧下の空気中で1550°Cの温度
で1時間焼成して、多孔質アル逅す焼結体を形成した。
This formed body was fired in air at atmospheric pressure at a temperature of 1550° C. for 1 hour to form a porous sintered body.

得られた焼結体は、厚みが0.25mmで密度が2、g
g/cwt、気孔率が25Vo1%、平均気孔径が1.
 2μmであった。
The obtained sintered body has a thickness of 0.25 mm and a density of 2 g.
g/cwt, porosity is 25Vo1%, and average pore diameter is 1.
It was 2 μm.

この焼結体の表面に平均粒径18μmのランタンポライ
ド−酸化スズ粒子を41%含んだ粘度110Pa−sの
ペーストを250メツシユのスクリーンで印刷を行い、
膜状抵抗体を形成し、乾燥した後窒素中で900°Cで
焼付けた。
A paste with a viscosity of 110 Pa-s containing 41% of lanthanum polide-tin oxide particles with an average particle size of 18 μm was printed on the surface of this sintered body using a 250 mesh screen.
A film resistor was formed, dried and then baked at 900°C in nitrogen.

次いで、この膜状抵抗体の上に平均粒径8μmの銅粒子
を50%含んだ粘度120Pa−sのペーストを、25
0メツシユのスクリーンで印刷を行い導体回路を形成し
、乾燥した後窒素中で600℃で焼付けた。この時のパ
ターンの密着強度は2 、 5 kg / ttm ”
であった。また、この時の抵抗値は80にΩ/口であっ
た。
Next, a paste with a viscosity of 120 Pa-s containing 50% copper particles with an average particle size of 8 μm was placed on top of this film resistor for 25 minutes.
A conductor circuit was formed by printing with a 0 mesh screen, dried and then baked at 600°C in nitrogen. The adhesion strength of the pattern at this time was 2.5 kg/ttm”
Met. Further, the resistance value at this time was 80Ω/mouth.

更に、この基板を85°C985%RHで1000時間
、高温、高温寿命試験を行ったところ、抵抗値の変化率
は、0.8%であり、優れた安定性を有していた。
Furthermore, when this substrate was subjected to a high temperature and high temperature life test for 1000 hours at 85° C. and 985% RH, the rate of change in resistance value was 0.8%, indicating excellent stability.

以上により、電子回路基板Bを作製した。Through the above steps, electronic circuit board B was manufactured.

次に、前記多孔質コージェライト焼結体からなる電子回
路基板A(第1.3層)と、前記多孔質アル果す焼結体
からなる電子回路基板B(第2層)を前記第4図のよう
に積層した。
Next, as shown in FIG. Laminated like this.

次に、該積層体に二液性のエポキシ樹脂を含浸。Next, the laminate is impregnated with a two-component epoxy resin.

硬化させて、多層電子回路基板を得た。この含浸は、該
積層体を真空下において脱気した後、該積層体を入れた
容器内に未硬化で流動性の高い状態にある樹脂を投入し
、含浸させることにより行った。また、この含浸の際に
更に10気圧の加圧を行い、充分に含浸させた。その後
、150℃、8時間の加熱を行い樹脂を硬化させた。
After curing, a multilayer electronic circuit board was obtained. This impregnation was performed by deaerating the laminate under vacuum, and then pouring an uncured and highly fluid resin into a container containing the laminate, and impregnating the resin. Further, during this impregnation, a further pressure of 10 atm was applied to ensure sufficient impregnation. Thereafter, the resin was cured by heating at 150° C. for 8 hours.

次に、この積層体にφ0.40amのダイヤモンドドリ
ルでスルーホールを形成し、10tImの無電解銅メツ
キを施して前記3枚の基板間の導通をとった。
Next, a through hole was formed in this laminate using a diamond drill having a diameter of 0.40 am, and electroless copper plating of 10 tIm was applied to establish electrical continuity between the three substrates.

次いで、前記積層体の表裏に、絶縁層としての0.05
m+++のBTレジン系プリプレグと、更にその上に1
8μmの銅箔を配置し真空プレスを行って1表裏面にそ
れぞれ導体層を形成した。
Next, on the front and back sides of the laminate, an insulating layer of 0.05
m+++ BT resin prepreg and 1 on top
8 μm copper foil was placed and vacuum pressed to form conductor layers on each of the front and back surfaces.

次いで、該積層体に、φ0.40園のダイヤモンドドリ
ルで表裏及び中間層まで穴明けし、同様にして15μm
の無電解銅メツキを施して導通をとった後1表裏面の導
体層をエツチングして回路形成を行った。
Next, holes were drilled in the laminate using a diamond drill with a diameter of 0.40 mm to the front and back sides and to the middle layer, and holes of 15 μm were drilled in the same manner.
After applying electroless copper plating to establish continuity, the conductor layers on the front and back surfaces were etched to form a circuit.

このようして得られた多層電子回路基板は8層回路であ
り、総厚みは1.05mmで極めて薄いものであった。
The thus obtained multilayer electronic circuit board was an 8-layer circuit, and had a total thickness of 1.05 mm, which was extremely thin.

しかも、この多層電子回路基板は。Moreover, this multilayer electronic circuit board.

lc/当たり膜状の抵抗体が46個、コンデンサー素子
が24個内蔵された極めて実装密度の高いものであった
It had an extremely high packaging density, with 46 film-like resistors and 24 capacitor elements built-in per lc/lc.

この多層電子回路基板につき、20°Cで30秒260
°Cで30秒のオイルデイツプ繰り返し耐熱試験を実施
した。その結果、500サイクルでも断線、基板間剥離
などの不良は何ら発生しなかった。
For this multilayer electronic circuit board, 260 seconds at 20°C
A heat resistance test was conducted with repeated oil dips at °C for 30 seconds. As a result, no defects such as wire breakage or separation between substrates occurred even after 500 cycles.

また、この多層電子回路基板を85°C・85%RHで
1000時間、高温、高温寿命試験を行ったところ、抵
抗値の変化率は、酸化ルテニウム系のものは0.38%
、ランタンポライド−酸化錫系のものは1.53%で極
めて安定であった。
In addition, when this multilayer electronic circuit board was subjected to a high temperature and high temperature life test for 1000 hours at 85°C and 85% RH, the rate of change in resistance value was 0.38% for the ruthenium oxide type.
The lanthanumolide-tin oxide type was extremely stable at 1.53%.

なお、上記電子回路基板A、Bは、前記第2図第3図に
示すごとく、多孔質セラミック焼結体11の表裏両面に
膜状の導電性回路12と、膜状抵抗体13とを強固に密
着形成したものである(詳細は第I実施例参照)。
As shown in FIG. 2 and FIG. 3, the electronic circuit boards A and B have a film-like conductive circuit 12 and a film-like resistor 13 firmly attached to both the front and back surfaces of the porous ceramic sintered body 11. (See Example I for details).

一方、比較のために、同様にして、多孔質コージェライ
ト焼結体を製作した後、すぐに同様のニ液性のエポキシ
樹脂を含浸し、同時に銅箔を積層して基板を得た。次い
で、エツチングにより回路形成を行った。この時のビー
ル強度は1.8kg/印で、低かった。
On the other hand, for comparison, a porous cordierite sintered body was produced in the same manner, immediately impregnated with the same two-component epoxy resin, and copper foil was laminated at the same time to obtain a substrate. Next, a circuit was formed by etching. The beer strength at this time was 1.8 kg/mark, which was low.

また、前記の電子回路基板A、Bにおいては。Moreover, in the electronic circuit boards A and B described above.

それぞれ長さ350+n+++、幅250閣の基板に、
12万穴以上の穴明を行うことができた。このように2
本発明の電子回路基板は強度が高く1機械加工性に優れ
ている。
Each board has a length of 350+n+++ and a width of 250mm,
We were able to drill over 120,000 holes. Like this 2
The electronic circuit board of the present invention has high strength and excellent machinability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図〜第3図は第1実施例の多層電子回路基板を示し
、第1図はその断面図、第2図は1つの電子回路基板の
断面図、第3図は要部拡大断面図。 第4図は第2実施例の多層電子回路基板の断面図である
。 1、 2. 51. 52. 53 16.電子回路基板 10、、、セラミック粒子。 9 11゜ 12゜ 13゜ 14゜ 3゜ 40゜ 多孔質セラごツク焼結体。 膜状導電性回路 膜状抵抗体素子。 樹脂。 絶縁層。 導体層 出 代 願人 イビデ 埋入
1 to 3 show the multilayer electronic circuit board of the first embodiment, FIG. 1 is a sectional view thereof, FIG. 2 is a sectional view of one electronic circuit board, and FIG. 3 is an enlarged sectional view of the main parts. . FIG. 4 is a sectional view of the multilayer electronic circuit board of the second embodiment. 1, 2. 51. 52. 53 16. Electronic circuit board 10... Ceramic particles. 9 11゜12゜13゜14゜3゜40゜Porous ceramic sintered body. Membrane conductive circuit membrane resistor element. resin. insulation layer. Conductive layer embedding by applicant

Claims (2)

【特許請求の範囲】[Claims] (1)多孔質セラミック焼結体の表面に膜状の導電性回
路,抵抗体,コンデンサー等の膜状素子を直接形成して
電子回路基板を作製し,その後該電子回路基板を積層し
,次いで上記多孔質セラミック焼結体の気孔内に樹脂を
充填してなることを特徴とする多層電子回路基板。
(1) An electronic circuit board is produced by directly forming a film-like conductive circuit, a film-like element such as a resistor, a capacitor, etc. on the surface of a porous ceramic sintered body, and then the electronic circuit board is laminated, and then A multilayer electronic circuit board characterized in that the pores of the porous ceramic sintered body are filled with resin.
(2)第1請求項において,多層電子回路基板は,各電
子回路基板の間に樹脂又は樹脂と無機材料の複合材とか
らなる絶縁層を介在させて積層されていることを特徴と
する多層電子回路基板。
(2) In the first claim, the multilayer electronic circuit board is a multilayer electronic circuit board laminated with an insulating layer made of resin or a composite material of resin and inorganic material interposed between each electronic circuit board. electronic circuit board.
JP1226585A 1989-08-03 1989-09-01 Multilayer electronic circuit board Expired - Lifetime JP2803752B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP1201757A JP2787953B2 (en) 1989-08-03 1989-08-03 Electronic circuit board
JP1226585A JP2803752B2 (en) 1989-09-01 1989-09-01 Multilayer electronic circuit board
US07/556,521 US5144536A (en) 1989-08-03 1990-07-24 Electronic circuit substrate
KR1019900011819A KR100211852B1 (en) 1989-08-03 1990-08-01 Electronic circuit board and fabricating method thereof
DE69008963T DE69008963T2 (en) 1989-08-03 1990-08-02 Electronic circuit substrate.
EP90114875A EP0411639B1 (en) 1989-08-03 1990-08-02 Electronic circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1226585A JP2803752B2 (en) 1989-09-01 1989-09-01 Multilayer electronic circuit board

Publications (2)

Publication Number Publication Date
JPH0391295A true JPH0391295A (en) 1991-04-16
JP2803752B2 JP2803752B2 (en) 1998-09-24

Family

ID=16847483

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1226585A Expired - Lifetime JP2803752B2 (en) 1989-08-03 1989-09-01 Multilayer electronic circuit board

Country Status (1)

Country Link
JP (1) JP2803752B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006147932A (en) * 2004-11-22 2006-06-08 Kyocera Corp Multilayer wiring board and its manufacturing method
JP2008117815A (en) * 2006-10-31 2008-05-22 Kyocera Corp Glass ceramic circuit board and its manufacturing method
JP2008223795A (en) * 2007-03-08 2008-09-25 Kawakami Sangyo Co Ltd Fixing member
KR100925122B1 (en) * 2007-11-01 2009-11-04 한국세라믹기술원 Manufacturing method of ceramic thick film substrate and the module using the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006147932A (en) * 2004-11-22 2006-06-08 Kyocera Corp Multilayer wiring board and its manufacturing method
JP2008117815A (en) * 2006-10-31 2008-05-22 Kyocera Corp Glass ceramic circuit board and its manufacturing method
JP2008223795A (en) * 2007-03-08 2008-09-25 Kawakami Sangyo Co Ltd Fixing member
KR100925122B1 (en) * 2007-11-01 2009-11-04 한국세라믹기술원 Manufacturing method of ceramic thick film substrate and the module using the same

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