JPH0385654U - - Google Patents

Info

Publication number
JPH0385654U
JPH0385654U JP14681289U JP14681289U JPH0385654U JP H0385654 U JPH0385654 U JP H0385654U JP 14681289 U JP14681289 U JP 14681289U JP 14681289 U JP14681289 U JP 14681289U JP H0385654 U JPH0385654 U JP H0385654U
Authority
JP
Japan
Prior art keywords
tab terminal
plate
copper foil
upward step
fixed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14681289U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14681289U priority Critical patent/JPH0385654U/ja
Publication of JPH0385654U publication Critical patent/JPH0385654U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は本考案実施例を示し、第1
図は、要部切欠拡大縦断面図、第2図は、基板部
の斜視図、第3図乃至第5図は従来例を示し、第
3図は、一部切欠拡大縦断面図、第4図は、基板
部の斜視図、第5図a、第5図b、第5図c、第
5図dは、それぞれ取付状態の異なる場合を模式
的に示す部分切欠側面図である。 1……絶縁基板、2……銅箔(板)、2′……
上向き段部、10……タブ端子、11……半田。
1 and 2 show an embodiment of the present invention, and the first
2 is a perspective view of the base plate, FIGS. 3 to 5 show a conventional example, FIG. 3 is an enlarged longitudinal sectional view of a part cut away, and FIG. 5A, 5B, 5C, and 5D are partially cutaway side views schematically showing different mounting states, respectively. 1...Insulating board, 2...Copper foil (plate), 2'...
Upward step, 10...Tab terminal, 11...Solder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] セラミツクなどの熱伝導の良好な絶縁基板上に
、上向き段部を形成した銅箔(板)を定着すると
共に、該上向き段部と前記基板とのなす間隙にタ
ブ端子の基端部を挿入して該銅箔(板)とタブ端
子との間を半田によつて固着したことを特徴とす
る電力用半導体のタブ端子取付構造。
A copper foil (plate) with an upward step formed thereon is fixed onto an insulating substrate with good thermal conductivity such as ceramic, and the base end of the tab terminal is inserted into the gap formed between the upward step and the substrate. A tab terminal mounting structure for a power semiconductor, characterized in that the copper foil (plate) and the tab terminal are fixed by solder.
JP14681289U 1989-12-19 1989-12-19 Pending JPH0385654U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14681289U JPH0385654U (en) 1989-12-19 1989-12-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14681289U JPH0385654U (en) 1989-12-19 1989-12-19

Publications (1)

Publication Number Publication Date
JPH0385654U true JPH0385654U (en) 1991-08-29

Family

ID=31693356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14681289U Pending JPH0385654U (en) 1989-12-19 1989-12-19

Country Status (1)

Country Link
JP (1) JPH0385654U (en)

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