JPS62201965U - - Google Patents

Info

Publication number
JPS62201965U
JPS62201965U JP8937086U JP8937086U JPS62201965U JP S62201965 U JPS62201965 U JP S62201965U JP 8937086 U JP8937086 U JP 8937086U JP 8937086 U JP8937086 U JP 8937086U JP S62201965 U JPS62201965 U JP S62201965U
Authority
JP
Japan
Prior art keywords
grid array
pin grid
spacer
view
electrically insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8937086U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8937086U priority Critical patent/JPS62201965U/ja
Publication of JPS62201965U publication Critical patent/JPS62201965U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例を示す断面図、第２
図は第１図の斜視図、第３図はプリント基板を示
す図であり、同図ａは斜視図、同図ｂは要部断面
図、第４図はＰＧＡ搭載前の本実施例を示す説明
図であり、同図ａは分解斜視図、同図ｂは同図ａ
の―線断面図、第５図はＰＧＡ搭載時の本実
施例を示す説明図であり、同図ａは斜視図、同図
ｂは―線断面図である。 １…スペーサ、１ａ…ガイド孔、２…ＰＧＡ、
２ａ…リード端子、３…プリント基板、３ａ…ス
ルーホール。 Fig. 1 is a sectional view showing one embodiment of the present invention;
The figure is a perspective view of Figure 1, Figure 3 is a diagram showing the printed circuit board, Figure a is a perspective view, Figure b is a sectional view of the main part, and Figure 4 shows this embodiment before mounting the PGA. Figure a is an exploded perspective view, figure b is an explanatory view, and figure a is an exploded perspective view.
FIG. 5 is an explanatory view showing this embodiment when a PGA is mounted, FIG. 5A is a perspective view, and FIG. 1... Spacer, 1a... Guide hole, 2... PGA,
2a...Lead terminal, 3...Printed circuit board, 3a...Through hole.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 厚さをピングリツドアレイのリード端子長より
小さい寸法とした電気的絶縁体のスペーサに、前
記リード端子に対応した複数個のガイド孔を形成
することを、特徴とするピングリツドアレイ用ス
ペーサ機構。 A spacer for a pin grid array, characterized in that a plurality of guide holes corresponding to the lead terminals are formed in an electrically insulating spacer having a thickness smaller than the lead terminal length of the pin grid array. mechanism.
JP8937086U 1986-06-13 1986-06-13 Pending JPS62201965U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8937086U JPS62201965U (en) 1986-06-13 1986-06-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8937086U JPS62201965U (en) 1986-06-13 1986-06-13

Publications (1)

Publication Number Publication Date
JPS62201965U true JPS62201965U (en) 1987-12-23

Family

ID=30948300

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8937086U Pending JPS62201965U (en) 1986-06-13 1986-06-13

Country Status (1)

Country Link
JP (1) JPS62201965U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01152095U (en) * 1988-04-11 1989-10-19
JPH0686350U (en) * 1993-05-25 1994-12-13 三相電機株式会社 Mounting base for hall elements, etc.
JP6359711B1 (en) * 2017-03-27 2018-07-18 大崎電気工業株式会社 Mounting structure of LCD panel

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01152095U (en) * 1988-04-11 1989-10-19
JPH0686350U (en) * 1993-05-25 1994-12-13 三相電機株式会社 Mounting base for hall elements, etc.
JP6359711B1 (en) * 2017-03-27 2018-07-18 大崎電気工業株式会社 Mounting structure of LCD panel
JP2018164026A (en) * 2017-03-27 2018-10-18 大崎電気工業株式会社 Mounting structure of liquid crystal display panel

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