JPH038424U - - Google Patents

Info

Publication number
JPH038424U
JPH038424U JP1989067814U JP6781489U JPH038424U JP H038424 U JPH038424 U JP H038424U JP 1989067814 U JP1989067814 U JP 1989067814U JP 6781489 U JP6781489 U JP 6781489U JP H038424 U JPH038424 U JP H038424U
Authority
JP
Japan
Prior art keywords
heat treatment
heat
section
treatment section
buffer storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1989067814U
Other languages
Japanese (ja)
Other versions
JPH0536269Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989067814U priority Critical patent/JPH0536269Y2/ja
Priority to KR1019900008438A priority patent/KR930010971B1/en
Publication of JPH038424U publication Critical patent/JPH038424U/ja
Application granted granted Critical
Publication of JPH0536269Y2 publication Critical patent/JPH0536269Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例を示す基板の熱処理
装置の斜視図、第２図は本考案の別実施例を略示
した概要図、第３図は従来例を示す概要図である
。 １……熱処理部、２，３，４……熱処理板、６
……バツフア収容部、１０……基板移載ロボツト
。 FIG. 1 is a perspective view of a substrate heat treatment apparatus showing one embodiment of the present invention, FIG. 2 is a schematic diagram showing another embodiment of the present invention, and FIG. 3 is a schematic diagram showing a conventional example. 1... Heat treatment section, 2, 3, 4... Heat treatment plate, 6
... Buffer storage section, 10 ... Board transfer robot.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の熱処理板を上下多段に配置して構成した
熱処理部と、熱処理部の上側又は下側に配設した
基板のバツフア収容部と、基板を熱処理部及びバ
ツフア収容部へ給排する基板多載ロボツトとを具
備して成り、後続処理部における処理の中断に際
し、熱処理済みの基板をバツフア収容部へ収容す
るように構成したことを特徴とする基板の熱処理
装置。 A heat treatment section configured by arranging a plurality of heat treatment plates in upper and lower stages, a buffer storage section for substrates disposed above or below the heat treatment section, and a multi-board loading system for supplying and discharging substrates to and from the heat treatment section and buffer storage section. 1. A substrate heat processing apparatus, comprising a robot, and configured to store a heat-treated substrate in a buffer accommodating part when processing in a subsequent processing part is interrupted.
JP1989067814U 1989-06-09 1989-06-09 Expired - Lifetime JPH0536269Y2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1989067814U JPH0536269Y2 (en) 1989-06-09 1989-06-09
KR1019900008438A KR930010971B1 (en) 1989-06-09 1990-06-08 Anealing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989067814U JPH0536269Y2 (en) 1989-06-09 1989-06-09

Publications (2)

Publication Number Publication Date
JPH038424U true JPH038424U (en) 1991-01-28
JPH0536269Y2 JPH0536269Y2 (en) 1993-09-14

Family

ID=13355791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989067814U Expired - Lifetime JPH0536269Y2 (en) 1989-06-09 1989-06-09

Country Status (2)

Country Link
JP (1) JPH0536269Y2 (en)
KR (1) KR930010971B1 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59211243A (en) * 1983-05-17 1984-11-30 Toshiba Corp Semiconductor substrate treating device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59211243A (en) * 1983-05-17 1984-11-30 Toshiba Corp Semiconductor substrate treating device

Also Published As

Publication number Publication date
JPH0536269Y2 (en) 1993-09-14
KR910001897A (en) 1991-01-31
KR930010971B1 (en) 1993-11-18

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