JPH0382164A - Thin film transistor memory and manufacture thereof - Google Patents

Abstract

PURPOSE:To make a thin film transistor memory small in element area so as to improve it in degree of integration and to enable the manufacture of it through a smaller number of processes by a method wherein a part of a breakdown strength retaining layer between a gate electrode and a gate insulating film corresponding to a part of the gate electrode is formed of a thin film which consists of only a breakdown strength retaining film formed on the gate electrode, and the rest part of the breakdown strength retaining layer corresponding to the other part of the gate electrode is formed of a two-layered thick film composed of an oxide insulating layer and a breakdown strength retaining film. CONSTITUTION:A gate electrode G is formed on a substrate 11, and an oxidation preventive film 17 is formed on the center of the electrode G through a photolightography method. Then, the gate electrode G is anodized using the oxidation preventive film 17 as a mask to form an oxide insulating layer 12 on both the ends of the gate electrode G excluding the center of it, and then the oxide preventive film 17 is removed. Then, a breakdown strength retaining film 13, a gate insulating film 14, a semiconductor film 15, and an N-type semiconductor layer 16 are successively laminated on the gate electrode G throughout all the surface of the substrate 11. In succession, a source electrode S and a drain electrode D are formed, and thus a memory transistor T10 and two selection transistors T20 are formed in a single thin film transistor.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thin film transistor memory and a method for manufacturing the same.

[Conventional technology]

Recently, E2FR that can be written/erased/read electrically
As a memory such as OM, a thin film transistor memory in which a memory element is formed of a thin film transistor is considered.

Conventionally, this thin film transistor memory is known in which a memory thin film transistor and a selection thin film transistor are formed adjacent to each other on an insulating substrate to form a memory element.

FIG. 8 shows an equivalent circuit of a conventional thin film transistor memory. In the figure, T1 is a memory thin film transistor (hereinafter referred to as a memory transistor), T2 is a selection thin film transistor (hereinafter referred to as a selection transistor), and the source of the selection transistor T2 is The electrode S2 is connected to the drain electrode D1 of the memory transistor T1, and one memory element is constituted by the memory transistor T1 and the selection transistor T2. Note that the gate electrode G1 of the memory transistor T1 and the selection transistor T2
The gate electrode G2 is connected to a gate line (address line) not shown, and the memory transistor T
The source electrode s1 of the selection transistor T2 is connected to a source line (data line) not shown, and the drain electrode D2 of the selection transistor T2 is connected to a drain line (data line) not shown.
It is connected to the.

[Problem to be solved by the invention] However, the above conventional thin film transistor memory has the following problems:
Since the memory element is constructed by forming the memory thin film transistor T1 and the selection thin film transistor T2 adjacent to each other on an insulating substrate, the element area of the memory element is large, and therefore it is difficult to increase the degree of integration. .

Furthermore, since the memory thin film transistor T1 and the selection thin film transistor T2 must be manufactured in separate processes, there is a problem in that a large number of manufacturing processes are required.

The present invention has been made in view of the above-mentioned circumstances, and its purpose is to reduce the element area of a memory element consisting of a memory transistor and a selection transistor to increase the degree of integration. It is an object of the present invention to provide a thin film transistor memory that can be easily manufactured with a small number of steps, and also to provide a method for manufacturing the same.

[Means to solve the problem]

The thin film transistor memory of the present invention includes a gate electrode formed on an insulating substrate, a breakdown voltage holding film formed on the gate electrode, a gate insulating film formed on the breakdown voltage holding film, and a gate insulating film formed on the breakdown voltage holding film. The gate electrode consists of a semiconductor layer formed on the film to face the gate electrode, and source and drain electrodes provided on both sides of the semiconductor layer, and the gate electrode, except for a portion thereof, is connected to the gate electrode. An oxide insulating layer is formed by oxidizing the above to a predetermined depth from the surface thereof, and the part of the gate electrode, the breakdown voltage holding film, the gate insulating film, the semiconductor layer, and the source;
A memory transistor is constituted by the drain electrode, and a selection transistor is constituted by the other part of the gate electrode, the oxide insulating layer on the surface thereof, the breakdown voltage holding film, the gate insulating film, the semiconductor layer, and the source and drain electrodes. It is characterized by comprising the following.

Further, the method for manufacturing a thin film transistor memory of the present invention includes:
After forming a gate electrode on an insulating substrate, the gate electrode is oxidized to a predetermined depth from its surface except for a part to form an oxide insulating layer, and then a breakdown voltage holding film and a gate electrode are formed on the gate electrode. This method is characterized by sequentially forming an insulating film, a semiconductor layer, and source and drain electrodes.

[Effect]

That is, in the thin film transistor memory of the present invention, the breakdown voltage holding layer between the gate electrode and the gate insulating film of the thin film transistor is a thin film consisting only of the breakdown voltage holding film on the gate electrode in a portion corresponding to a part of the gate electrode, and By forming a two-layer thick film consisting of an oxide insulating layer formed on the surface of the gate electrode and the above-mentioned breakdown voltage holding film in a part corresponding to other parts of the gate electrode, the voltage applied from the gate electrode to the gate insulating film is reduced. The intensity of the electric field is made different between a portion corresponding to one portion of the gate electrode and another portion thereof, and the electric field is opposed to the gate electrode through a thin film voltage-retaining layer consisting only of the voltage-retaining film of the gate insulating film. In this thin film transistor, only one portion has a charge storage function, the gate insulating film has a charge storage function, and the other portion is used as a memory transistor.
Since a transistor memory has a memory transistor and a selection transistor formed in one thin film transistor, it is possible to increase the degree of integration by reducing the element area of the memory element composed of the memory transistor and selection transistor. Furthermore, since the memory transistor and the selection transistor constituting the memory element can be formed in the process of manufacturing one thin film transistor, it can be easily manufactured with a small number of steps. Moreover, in the thin film transistor memory of the present invention, the film thickness of the selective transistor portion of the breakdown voltage holding layer between the gate electrode and the gate insulating film is changed to an oxide insulating layer formed by oxidizing the gate electrode to a predetermined depth from the surface thereof. Therefore, unlike when the thickness of the breakdown voltage retention film formed on the gate electrode is made thicker in the selection transistor part, there is no difference in the film surface of the breakdown voltage retention film, and therefore, the thickness of the breakdown voltage retention film is The semiconductor layer provided on the gate insulating film formed thereon can be formed flat and have a uniform thickness, thereby improving reliability.

Further, the method for manufacturing a thin film transistor memory of the present invention includes:
After forming a gate electrode on an insulating substrate, a portion except a part of the second gate electrode is oxidized to a predetermined depth from its surface to form an oxide insulating layer, and then a breakdown voltage maintaining film is formed on the gate electrode. Since the gate insulating film, the semiconductor layer, and the source and drain electrodes are sequentially formed, it is possible to manufacture the thin film transistor memory in which a memory transistor and a selection transistor are formed in one thin film transistor.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

1 to 3 show a first embodiment of the present invention, and FIG. 1 is a sectional view of a thin film transistor memory.

To explain the structure of this thin film transistor memory, the first
In the figure, reference numeral 11 denotes an insulating substrate made of glass or the like, and on this substrate 11 is a gate electrode G that is shared by the memory transistor TIO and the selection transistor T20.
is formed. This gate electrode G is made of tantalum (Ta), for example, and is formed to have a thickness of 4000 λ to 5000 Å.

The gate electrode G is placed at a predetermined depth (2000 m
An oxide insulating layer 12 oxidized to a thickness of 3000 Å) is formed. This oxide insulating layer 12 is made of tantalum oxide (T), which is obtained by oxidizing tantalum (Ta) forming the gate electrode G.
a Ox). Further, on the gate electrode G, for example, tantalum oxide (TaO) is provided over the entire surface of the substrate 11.
2,000 people ~
The breakdown voltage holding film 1 is formed to have a thickness of 3000 Å.
3, the composition ratio Sl/N of silicon atoms Sl and nitrogen atoms N is approximately the same as the stoichiometric ratio (81/N-0,75) (Sl/N-0,65 to 0.85). A gate insulation film 14 made of silicon nitride (SIN) having a thickness of 100 λ to 500 Å is formed. On this gate insulating film 14, a memory transistor TIG and a selection transistor T20 are arranged to face the entire area of the gate electrode G.
An i-type semiconductor layer 15 shared by both is formed. This t-type semiconductor layer 15 is made of 1-a-3l (i-type amorphous silicon), and this i-type semiconductor layer 1
On both sides of 5, a source electrode S and a drain electrode are formed via an n-type semiconductor layer 16 made of n''-a-Sl (amorphous silicon doped with n-type impurities). .

The central portion of this thin film transistor (corresponding to the central portion of the gate electrode G) is the memory transistor T.
IO, and both side portions thereof (portions corresponding to both side portions on which the oxide insulating layer 12 of the gate electrode G is formed) are respectively used as selection transistors T2G.

That is, in the thin film transistor memory of this embodiment, the breakdown voltage holding layer A between the gate electrode G and the gate insulating film 14 of the thin film transistor is replaced by the breakdown voltage holding layer A on the gate electrode G in the portion corresponding to the central portion of the gate electrode G. 13 (film thickness 2000 Å to 3000 λ), and in the portions corresponding to both side portions of the gate electrode G, there is a double layer consisting of the oxide insulating layer 12 formed on the surface portion of the gate electrode G and the breakdown voltage holding film 13. thick film (thickness 4000λ~6000
λ), the intensity of the electric field applied from the gate electrode G to the gate insulating film 14 is made different between a portion corresponding to the center portion of the gate electrode G and both side portions, and By providing a charge storage function only in the portion facing the gate electrode G through the thin film breakdown voltage holding layer A consisting of only the breakdown voltage holding film 13, one memory transistor TIO is provided in one thin film transistor.
and two selection transistors T20 located on both sides of the memory transistor TIO. The two selection transistors T20 are composed of a layer 15 and an n-type semiconductor layer 16, and source and drain electrodes S and D, and each of the two selection transistors T20 includes an oxide insulating layer 12 on both sides of the gate electrode G and a surface thereof, and the breakdown voltage A holding film 13, a gate insulating film 14,
The i-type semiconductor layer 15 and the n-type semiconductor layer 16, and the source.

It is composed of drain electrodes S and D.

FIG. 2 shows an equivalent circuit of the thin film transistor memory described above, in which the gate electrode G is connected to a gate line (address line), not shown, and a source.

Drain electrodes S and D are sources (not shown).

Connected to the drain line (data line).

FIG. 3 shows a method for manufacturing the thin film transistor memory described above, and this thin film transistor memory is manufactured through the following steps.

First, as shown in FIG. 3(a), a tantalum (Ta) film is formed on a substrate 11 to a thickness of 4000λ to 5000λ, and this tantalum film is patterned to form a gate electrode G. An anti-oxidation film 17 made of chromium (C'') or the like is formed on the center portion of the electrode G by photolithography.

Next, the gate electrode G is anodized using the anti-oxidation film 17 as a mask, and as shown in FIG. 3(b), a predetermined depth (2000A The oxide insulating layer (Ta
Ox layer) 12 is formed, and then the anti-oxidation film 17 is removed.

Next, as shown in FIG. 3(c), tantalum oxide (TaOx
) and a pressure-resistant holding film 13 consisting of Sl/N-0,65~0
．． 85, a gate insulating film 14 made of silicon nitride, and 1
The semiconductor film 15 made of -a-3l and the n-type semiconductor layer 16 made of n"-a-31 are each
The layers are sequentially deposited to a thickness of 00λ, 100 to 500λ, 1500λ, and 250λ.

Next, as shown in FIG. 3(d), the n-type semiconductor layer 1
6 and the l-type semiconductor layer 14 are patterned into the element shape of a thin film transistor.

After this, source and drain electrodes S are formed on the n-type semiconductor layer 16 over the entire surface of the substrate 11.

By depositing a metal film such as chromium as D and patterning this metal film and the n-type semiconductor layer 16 below, a source electrode S and a drain electrode are formed as shown in FIG. 3(e). One memory transistor TIO and two selection transistors 7 are included in one thin film transistor.
A thin film transistor memory formed with 20 is completed.

The area of the memory transistor TIO and the selection transistor T20 can be determined depending on how the characteristics of each transistor T10T2O are selected, and the area of the gate electrode G and its non-oxidized region and oxidized region can be determined by The area and the distance between the source electrode S and the drain electrode may be selected.

Writing, erasing, and reading from this thin film transistor memory are performed as follows.

During writing, a positive voltage +1/2Vp corresponding to 1/2 of the write/erase voltage vP of the memory transistor TIO is applied to the gate line to which the gate electrode G is connected, and the source line to which the source electrode S is connected is applied. A negative voltage -1/2 VP corresponding to 1/2 of the write/erase voltage V is applied to each drain line to which the drain electrodes are connected. When such a voltage is applied, the two selection transistors RO20 are turned on, and the memory transistor TIO is turned on.
A write/erase voltage V is applied between the gate, source, and drain of
.

A potential difference corresponding to is generated, and the memory transistor TIO enters the write state.

Also, during erasing, apply 1/2V P to the gate line and +l to the source line and drain line, respectively.
/2VP is applied. When such a voltage is applied, an opposite potential difference corresponding to the write/erase voltage vP is generated between the gate, source, and drain of the memory transistor TIO, and data held in the memory transistor TIO is erased.

On the other hand, during reading, an on-voltage VON that is sufficiently smaller than the write/erase voltage vP is applied to the gate line, a read voltage (voltage that is sufficiently smaller than the write/erase voltage vP) VD is applied to the drain line, and the potential of the source line is Set to 0. When such a voltage is applied, a current flows from the drain line to the source line in accordance with the data held in the memory transistor TIO, and this is output as read data.

In addition, in any of the above writing, erasing, and reading cases,
The voltage applied to the selected source/drain line is also applied to other unselected memory elements on this source/drain line, but since the gate line of this unselected memory element is not selected, it is not selected. Since the selection transistor T20 of the memory element is in an off state, the memory transistor TIO of the non-selected memory element is not affected by the voltage applied to the source and drain lines. That is, the selection transistor T20 is the memory transistor TIO.
In addition to selecting the memory transistor TIO, it also functions as a guard transistor to guard the memory transistor TIO from the voltage applied to the source and drain lines when it is not selected.

Therefore, in the thin film transistor memory of the above embodiment, the withstand voltage holding layer 13 between the gate electrode G of the thin film transistor and the gate insulating film 14 is A thin film consisting only of the holding film 13 is used, and a two-layer thick film consisting of the oxide insulating layer 12 formed on the surface of the gate electrode G and the voltage-resistance holding film 13 is used in the portions corresponding to both sides of the gate electrode G. By this, the intensity of the electric field applied from the gate electrode G to the gate insulating film 14 is made different between a portion corresponding to the center portion of the gate electrode G and both side portions, thereby increasing the gate insulation If! 114, charge is accumulated only in the portion facing the gate electrode G through the thin film breakdown voltage holding layer A consisting only of the breakdown voltage holding film 13. Since the memory transistor TIO and the selection transistor T20 are formed in one thin film transistor, the area of the memory element composed of the memory transistor and the selection transistor can be reduced to increase the degree of integration. In addition, since the memory transistor TIO and the selection transistor T20 constituting the memory element can be formed in the process of manufacturing one thin film transistor, it can be easily manufactured with a small number of steps. Moreover, in the thin film transistor memory described above, the film thickness of the selective transistor 720 portion of the breakdown voltage holding layer A between the gate electrode G and the gate insulating film 14 is formed by oxidizing the gate electrode G to a predetermined depth from the surface thereof. Since this is ensured by the oxide insulating layer 12, there is no possibility that a step will be formed on the surface of the breakdown voltage retention film 13, such as when the thickness of the breakdown voltage retention film 13 formed on the gate electrode G is increased at the selection transistor T20 portion. Therefore, the i-type semiconductor layer 15 provided on the gate insulating film 14 formed on the breakdown voltage holding film 13 is
can be formed flat and with a uniform thickness to improve reliability. Furthermore, in the above embodiment, since the selection transistor T20 is provided on both sides of the memory transistor TIO, even if one of the two selection transistors T20 has poor characteristics, the memory transistor TIG can be selected and guarded, and therefore reliability can be improved compared to the case where there is only one selection transistor T20.

In addition, in the method for manufacturing the thin film transistor memory of the above embodiment, after forming the gate electrode G on the substrate 11, both sides of the gate electrode G except for the central part are oxidized to a predetermined depth from the surface to form an oxide insulating layer. 12 is formed, and then a breakdown voltage holding film 13 and a gate insulating film 14 are formed on the gate electrode G.
and an i-type semiconductor layer 15, an n-type semiconductor layer 16, and a source,
Since the drain electrodes S and D are formed sequentially, 1
It is possible to manufacture the thin film transistor memory of the above embodiment in which a memory transistor and a selection transistor are formed in one thin film transistor.

Next, another embodiment of the present invention will be described.

4 and 5 show a second embodiment of the present invention, in which FIG. 4 is a cross-sectional view of a thin film transistor memory, and FIG.
The figure is its equivalent circuit diagram.

The thin film transistor memory of this embodiment is the same as the thin film transistor memory of the first embodiment described above, but is provided with a second gate electrode Ga that is shared by the memory transistor TIO and the two selection transistors 720. The electrode Ga is formed on the upper gate insulating film 18 formed on the l-type semiconductor layer 15 and the source and drain electrodes S and D. This upper gate insulating film 18 is S1
The second gate electrode Ga is an insulating film made of silicon nitride of /N -0.85 to 0.85 and has a thickness of about 8000 Å and does not have a charge storage function, and the second gate electrode Ga is used as a read gate electrode. Furthermore, the gate electrode G on the substrate 11 is connected to a write/erase gate line (not shown), and the second gate electrode Ga is connected to a read gate line (not shown). The structure of the thin film transistor memory of this embodiment is the same as that of the thin film transistor memory of the first embodiment except for the provision of the second gate electrode Ga. It will be omitted. Furthermore, this thin film transistor memory can be manufactured by simply adding the step of forming the upper gate insulating film 18 and the step of forming the second gate electrode Ga to the method of manufacturing the thin film transistor memory of the first embodiment.
The explanation of the manufacturing method will also be omitted.

In the thin film transistor memory of this embodiment, writing and erasing to the memory transistor TIO is performed by applying a gate voltage to the gate electrode G on the substrate 11, and reading is performed by applying a gate voltage to the second gate electrode Ga. This is what I decided to do.

Therefore, since the thin film transistor memory of this third embodiment also includes the memory transistor TIO and the two selection transistors T20 in one thin film transistor, it is composed of the memory transistor TIO and the selection transistor T20. The element area of the memory element can be reduced to increase the degree of integration, and the memory transistor TIO and selection transistor T20 constituting the memory element can be removed in the process of manufacturing one thin film transistor.
In addition, the film thickness of the selection transistor 720 portion of the breakdown voltage holding layer A between the gate electrode G and the gate insulating film 14 can be reduced by oxidizing the gate electrode G to a predetermined depth from its surface. Since this is ensured by the formed oxide insulating layer 12, the l-type semiconductor layer 15 provided on the gate insulating film 14 formed on the breakdown voltage holding film 13 is formed flat and with a uniform thickness. Reliability can be improved.

Further, in the thin film transistor memory of the second embodiment, since reading is performed by applying a gate voltage to the second gate electrode Ga, the l-type semiconductor layer 14 is read through the memory insulating film 13 during reading. Board 1 facing
There is no need to apply a gate voltage that would change the threshold voltage of the memory transistor TIO to the gate electrode G on the memory transistor TIO. Stable reading can be performed, and furthermore, the above l
Since the L-type semiconductor layer 15 is flat and has a uniform thickness, it is easier to apply a gate voltage to the second gate electrode Ga than when the L-type semiconductor layer 15 is formed over a step. A large drain current can be obtained during reading when applied.

6 and 7 show a third embodiment of the present invention, in which FIG. 6 is a sectional view of a thin film transistor memory, and FIG. 7 is an equivalent circuit diagram thereof.

In the thin film transistor memory of this embodiment, the oxide insulating layer 12 formed on both sides of the gate electrode G in the thin film transistor memory of the first embodiment is formed in approximately half the area of the gate electrode G. One half (the part where the breakdown voltage holding layer A between the gate electrode G and the gate insulating film 14 is only the breakdown voltage holding layer 13 on the gate electrode G) is used as the memory transistor TIO, and the other half is used as the selection transistor 720, The rest of the structure is the same as that of the thin film transistor memory of the first embodiment.

That is, the thin film transistor memory of this third embodiment has one memory transistor T10 and one selection transistor T20 formed in one thin film transistor, and also in the thin film transistor memory of this third embodiment. , the element area of the memory element composed of the memory transistor TIO and the selection transistor T20 can be reduced to increase the degree of integration;
In the process of manufacturing two thin film transistors, the memory transistor TIO and selection transistor T20 constituting the memory element can be formed, and the i-type semiconductor layer 15 provided on the gate insulating film 14 formed on the breakdown voltage holding film 13 can be formed. can be formed flat and with a uniform thickness to improve reliability.

It should be noted that in the thin film transistor memory of this third embodiment as well, the second
By providing a gate electrode of 1, it is possible to eliminate changes in the threshold voltage of the memory transistor TIO due to repeated reading, and to perform stable reading semi-permanently.

In the above embodiment, the gate electrode G is made of tantalum; however, the gate electrode G may be made of, for example, titanium or other metal as long as it exhibits insulating properties through oxidation. Voltage holding film 1 formed on electrode G
3 is not limited to tantalum oxide, but may also be formed from a dielectric material such as titanium oxide, barium titanate, titanium zirconate, or the like.

〔Effect of the invention〕

In the thin film transistor memory of the present invention, the breakdown voltage holding layer between the gate electrode and the gate insulating film of the thin film transistor is a thin film consisting only of the breakdown voltage holding film on the gate electrode in a portion corresponding to a part of the gate electrode, and the gate electrode By forming a two-layer thick film consisting of an oxide insulating layer formed on the surface of the gate electrode and the above-mentioned breakdown voltage holding film in a part corresponding to the other part of the gate electrode, the electric field applied from the gate electrode to the gate insulating film is reduced. The strength is made different between a part corresponding to one part of the gate electrode and another part, and only the part of the gate insulating film that faces the gate electrode through a thin film withstand voltage holding layer consisting only of the withstand voltage holding film. The gate insulating film has a charge storage function, and the part where the gate insulating film has a charge storage function is used as a memory transistor, and the other part is used as a selection transistor.This thin film transistor memory has a memory transistor and a memory transistor in one thin film transistor. Since the memory element is made up of a selection transistor and a selection transistor, it is possible to reduce the element area of the memory element composed of the memory transistor and the selection transistor and increase the degree of integration. Since the memory transistor and selection transistor constituting the memory element can be formed, it can be easily manufactured with a small number of steps. Moreover, in the thin film transistor memory of the present invention, the film thickness of the selective transistor portion of the breakdown voltage holding layer between the gate electrode and the gate insulating film is changed to an oxide insulating layer formed by oxidizing the gate electrode to a predetermined depth from the surface thereof. Therefore, unlike when the thickness of the breakdown voltage retention film formed on the gate electrode is made thicker in the selection transistor part, there is no difference in the film surface of the breakdown voltage retention film, and therefore, the thickness of the breakdown voltage retention film is The semiconductor layer provided on the gate insulating film formed thereon can be formed flat and have a uniform thickness, thereby improving reliability.

Further, the method for manufacturing a thin film transistor memory of the present invention includes:
After forming a gate electrode on an insulating substrate, the gate electrode is oxidized to a predetermined depth from its surface except for a part to form an oxide insulating layer, and then a breakdown voltage holding film and a gate electrode are formed on the gate electrode. Since the insulating film, the semiconductor layer, and the source and drain electrodes are sequentially formed, it is possible to manufacture the thin film transistor memory in which a memory transistor and a selection transistor are formed in one thin film transistor.

[Brief explanation of drawings]

1 to 3 show a first embodiment of the present invention, FIGS. 1 and 2 are a cross-sectional view of a thin film transistor memory and its equivalent circuit diagram, and FIG. 3 is a manufacturing process of the thin film transistor memory. It is a diagram. 4 and 5 are cross-sectional views and equivalent circuit diagrams of a thin film transistor memory showing a second embodiment of the present invention, and FIGS. 6 and 7 are diagrams of a thin film transistor memory showing a third embodiment of the present invention. Cross-sectional view and its equivalent circuit diagram, No. 8
The figure is an equivalent circuit diagram of a conventional thin film transistor memory. TIO...Memory transistor, T2O...Selection transistor, 11...Substrate, G...Gate electrode, 1
2... Oxide insulating layer, 13... Voltage holding film, A...
Breakdown voltage holding layer, 14... Gate insulating film, 15... L-type semiconductor film, 16... N-type semiconductor layer, S... Source electrode, D... Drain electrode, 18... Upper gate Insulating film, Ga... second gate electrode (for reading).

Claims (2)

[Claims] (1) A gate electrode formed on an insulating substrate, a voltage-retaining film formed on the gate electrode, a gate insulating film formed on the voltage-retaining film, and a gate insulating film formed on the gate insulating film. It consists of a semiconductor layer formed to face the gate electrode, and source and drain electrodes provided on both sides of the semiconductor layer, and the gate electrode is connected to the surface of the gate electrode except for a portion thereof. forming an oxidized insulating layer oxidized to a predetermined depth, forming a memory transistor with the part of the gate electrode, the breakdown voltage holding film, the gate insulating film, the semiconductor layer, and the source and drain electrodes; A thin film transistor memory characterized in that a selection transistor is constituted by the oxide insulating layer, the breakdown voltage holding film, the gate insulating film, the semiconductor layer, and the source and drain electrodes on the other part of the gate electrode and its surface part. (2) After forming a gate electrode on an insulating substrate, oxidize all but a portion of this gate electrode to a predetermined depth from its surface to form an oxide insulating layer, and then maintain a withstand voltage on top of the gate electrode. A method for manufacturing a thin film transistor memory, comprising sequentially forming a film, a gate insulating film, a semiconductor layer, and source and drain electrodes.