JPH0381653U - - Google Patents

Info

Publication number
JPH0381653U
JPH0381653U JP1989142391U JP14239189U JPH0381653U JP H0381653 U JPH0381653 U JP H0381653U JP 1989142391 U JP1989142391 U JP 1989142391U JP 14239189 U JP14239189 U JP 14239189U JP H0381653 U JPH0381653 U JP H0381653U
Authority
JP
Japan
Prior art keywords
light emitting
emitting diode
layer
diode chip
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989142391U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989142391U priority Critical patent/JPH0381653U/ja
Publication of JPH0381653U publication Critical patent/JPH0381653U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Description

【図面の簡単な説明】
第1図は本考案にかかる発光ダイオードランプ
の一例を示す断面図、第2図a,bはその樹脂モ
ールド工程を説明するための断面図、第3図は本
考案にかかる発光ダイオードランプの別の例を示
す断面図、第4図a,bはその樹脂モールド工程
を説明するための断面図、第5図は本考案にかか
る発光ダイオードランプのさらに別の例を示す断
面図、第6図はその光輝度分布図、第7図は従来
の発光ダイオードランプの断面図、第8図はその
樹脂モールド工程を説明するための断面図である
。 10…発光ダイオードチツプ、20…リードフ
レーム、50…モールド樹脂。

Claims (1)

    【実用新案登録請求の範囲】
  1. リードフレームの先端に搭載された発光ダイオ
    ードチツプと、該発光ダイオードチツプを包容す
    るようにリードフレーム先端部に保持されたモー
    ルド樹脂とを具備しており、該モールド樹脂が発
    光ダイオードチツプを包容する層と、その層の外
    側に被冠された層の複数層よりなることを特徴と
    する発光ダイオードランプ。
JP1989142391U 1989-12-08 1989-12-08 Pending JPH0381653U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989142391U JPH0381653U (ja) 1989-12-08 1989-12-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989142391U JPH0381653U (ja) 1989-12-08 1989-12-08

Publications (1)

Publication Number Publication Date
JPH0381653U true JPH0381653U (ja) 1991-08-21

Family

ID=31689221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989142391U Pending JPH0381653U (ja) 1989-12-08 1989-12-08

Country Status (1)

Country Link
JP (1) JPH0381653U (ja)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09116194A (ja) * 1995-10-17 1997-05-02 Alps Electric Co Ltd 発光ダイオード装置
JP2000058925A (ja) * 1998-08-12 2000-02-25 Stanley Electric Co Ltd Ledランプ
JP2000068562A (ja) * 1998-08-21 2000-03-03 Stanley Electric Co Ltd Ledランプ
JP2002221658A (ja) * 2001-01-26 2002-08-09 Rabo Sufia Kk バルク型レンズ、発光体、受光体、照明器具、光情報通信システム及びバルク型レンズの製造方法
JP2002223636A (ja) * 2001-01-29 2002-08-13 Rabo Sufia Kk バルク型レンズを用いた植物栽培装置
JP2003069081A (ja) * 2001-08-22 2003-03-07 Okaya Electric Ind Co Ltd 発光素子及びその製造方法
WO2007080742A1 (ja) * 2006-01-16 2007-07-19 Towa Corporation 光素子の樹脂封止成形方法
JP2007310419A (ja) * 2007-08-06 2007-11-29 Rabo Sufia Kk バルク型レンズ、発光体、受光体、照明器具及びバルク型レンズの製造方法
JP2009117375A (ja) * 2009-01-13 2009-05-28 Rabo Sufia Kk 室内照明装置

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09116194A (ja) * 1995-10-17 1997-05-02 Alps Electric Co Ltd 発光ダイオード装置
JP2000058925A (ja) * 1998-08-12 2000-02-25 Stanley Electric Co Ltd Ledランプ
JP2000068562A (ja) * 1998-08-21 2000-03-03 Stanley Electric Co Ltd Ledランプ
JP2002221658A (ja) * 2001-01-26 2002-08-09 Rabo Sufia Kk バルク型レンズ、発光体、受光体、照明器具、光情報通信システム及びバルク型レンズの製造方法
JP2002223636A (ja) * 2001-01-29 2002-08-13 Rabo Sufia Kk バルク型レンズを用いた植物栽培装置
JP2003069081A (ja) * 2001-08-22 2003-03-07 Okaya Electric Ind Co Ltd 発光素子及びその製造方法
WO2007080742A1 (ja) * 2006-01-16 2007-07-19 Towa Corporation 光素子の樹脂封止成形方法
JP2007189116A (ja) * 2006-01-16 2007-07-26 Towa Corp 光素子の樹脂封止成形方法
JP2007310419A (ja) * 2007-08-06 2007-11-29 Rabo Sufia Kk バルク型レンズ、発光体、受光体、照明器具及びバルク型レンズの製造方法
JP2009117375A (ja) * 2009-01-13 2009-05-28 Rabo Sufia Kk 室内照明装置

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