JPH0375883B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Field of the Invention The present invention relates to a programmable controller, and particularly relates to a programmable controller that controls all external output signals or divides them into groups and manipulates the signals for each group.

(2) Background of the Invention In programmable controllers, it is extremely important to be able to easily meet the diverse demands of users, and to ensure that the entire control system operates safely even in the unlikely event that an abnormality occurs. be.

Conventionally, some programmable controllers have been configured to stop control operations and turn off all external outputs (cut off all loads) when some abnormality within the device is detected.

However, from the user's perspective of a programmable controller, when an abnormality occurs in the device, the control operation is completely stopped, regardless of the type of abnormality or the situation of the object to be controlled when the abnormality occurs. In practice, it was often not always appropriate to put things away.

In view of this, the present inventors have previously developed the following programmable controller. In other words, the user can arbitrarily set what kind of abnormality inside the device is detected and what state the controlled object is in to inhibit the control output, and then set it in the user program. It was configured so that it could be assembled as a part.

However, since even the above-mentioned programmable controller is configured to prohibit all external outputs at once, it is difficult to adapt it to all of the various purposes of use by users.

(3) Purpose of the Invention The purpose of the present invention is to prohibit updating of the entire output according to the degree of abnormality of the device, divide it into a plurality of groups, and prohibit the output for each group. It is an object of the present invention to provide a highly versatile and flexible programmable controller that allows a user to set arbitrary settings on a user program.

(4) Structure and Effects of the Invention In order to achieve the above object, the present invention divides external output signals (corresponding to output data of input/output memory) into a plurality of groups, and sets an output group flag for each group. set what will be,
This flag is configured to be set or reset by the result of any logical operation between any input/output data specified in a part of the user program, and the output data of the input/output memory is set to the output circuit. A first output inhibiting means that checks the state of the output group flag when the output updating means is operated, and inhibits updating of the output data included in the group in which the flag is set, thereby setting the output to a predetermined external output state. and a second output prohibition means that prohibits updating of all output data to set a predetermined external output state when an all output prohibition flag arbitrarily set by a user program is set. do.

Since this invention is configured as described above,
By setting the relevant output group flag, it is possible to respond to local abnormalities without completely stopping the control operation, and in the event of a serious abnormality, updating of the entire output can be prohibited. This can be done simply by setting one all output prohibition flag. In other words, according to the present invention, abnormality processing can be performed with a minimum number of programs depending on the importance of the abnormality.

(5) Description of embodiments Figure 1 shows a programmable computer to which this invention is applied.
FIG. 2 is a block diagram showing the overall schematic configuration of the controller.

This programmable controller consists of a CPU 1 (consisting of a so-called microcomputer) that serves as the center of overall control, a working memory 2 that is used by the CPU 1 as a temporary storage area for various variable data, and a memory that can be set arbitrarily by the user. a user program memory 3 in which a sequence control program is stored, and an input circuit 4 which is an input interface to which external input signals I1 to In are applied.
, an output circuit 5 which is an output interface that sends out external output signals O1 to Om, and an area which serves as a buffer memory for input and output data corresponding to the input circuit 4 and output circuit 5, as well as so-called internal relays, auxiliary relays, etc. It also includes an input/output memory 6 that stores other circuit data called .

As is well known, the execution operation of a user program in this type of programmable controller involves sequentially reading out user instructions from the user program memory 3, and changing between input and output data stored in the input/output memory 6 according to each user instruction. It is to perform arithmetic processing and rewrite designated output data according to the result of the arithmetic processing, and also to input data (external input signal) given to the input circuit 4 in synchronization with the execution processing of this user program. An input update operation is performed in which the data is written in a predetermined area of the input/output memory 6, and an output update operation is performed in which the output data in a predetermined area of the input/output memory 6 is transferred to the output circuit 5 and outputted to the outside.

As a result, a sequence state defined by the user program is created in the relationship between the external input signal applied to the input circuit 4 and the external output signal output from the output circuit 5.

The objects of arithmetic processing in the user program are not only the input/output data corresponding to the input circuit 4 and the output circuit 5, but also the data stored in the input/output memory 6 or working memory 2, which are so-called internal relays and auxiliary relays. What is included is well known. It is also well known that the memory 2 or the memory 6 can be used to perform processing that handles numerical data, such as so-called timer instructions and counter instructions.

As for the hardware configuration of the input circuit 4 and the output circuit 5, for example, a circuit that handles 8 points (8 bits) of input signals or output signals is configured in one unit, and the user side can handle the maximum number of connectable units. Within this range, a required number of input units and output units are easily connected.

In this embodiment, it is assumed that the output circuit 5 is divided into units of 8 bits as described above, and 8 bits of output data belonging to one unit are called a group.

In other words, the output data of the output circuit 5 is m/8=M
into multiple output groups. In the programmable controller of the present invention, output group flags corresponding one-to-one to the M output groups are stored in a predetermined area of the input/output memory 6.
FG1 to FGM are set.

These flags FG1 to FGM can be used as logical operation targets on the user program.
Each flag can be arbitrarily set or reset in the user program by the result of any logical operation between any input and output data. Therefore, with such a configuration, it is possible to respond to local abnormalities without completely stopping the control operation. Furthermore, as will be described later, during the output update operation, measures are taken to prohibit the output update for each output group, depending on the state of each flag FG1 to FGM.

Furthermore, a full output prohibition flag FA is set in a predetermined area of the input/output memory 6. This flag FA
It can also be used to set or reset the results of logical operations on arbitrary input/output data on the user program, and measures can be taken to prohibit updating of all output data at once depending on the logical state of flag FA. . Therefore, with such a configuration, if a serious abnormality occurs, all output can be prohibited by simply setting one all-output prohibition flag.

For example, in the case of a ladder diagram programmable controller, the output group flags FG1 to FGM can be arbitrarily set or reset in a user program based on the state of input/output data, as shown in Figure 2. , flag FG1 is set as an output relay, and this relay
Configure an arbitrary ladder circuit using arbitrary input/output contacts X1, X2, X3, and X4 related to the controlled device as a condition for driving FG1, convert this into a predetermined command format, and set it in the user program memory 3. It means to do.

Next, an outline of the control operation by the CPU 1 will be sequentially explained according to the flowchart of FIG.

First step following initial processing 100
At 101, the external input signal applied to the input circuit 4 is written into a predetermined area of the input/output memory 6 (operation of input updating means). Next, the program counter PC for addressing the user program memory 3 is cleared (step 102), and the instruction indicated by the contents of the program counter PC is read from the user program memory 3 (step 103).
Checks whether the read instruction is the END instruction inserted at the end of the program (step 104),
If it is not an END instruction, the instruction is executed (step 105), the program counter PC is incremented (step 106), and the process returns to step 103.

In other words, steps 103 to 106 are executed repeatedly, and the user program is ENDed from the first address.
Executes up to instructions at high speed (operation of instruction execution means). As a result of this operation, the data (output data and the above-mentioned flags) in the input/output memory 6 is rewritten.

When the END command is executed, the process proceeds to step 107 and subsequent steps for output update operations. First step 107
Then, it is checked whether or not the all output prohibition flag FA is set to "1". If it is set, the process proceeds to step 109, and all external outputs O1 to O1 of the output circuit 5 are disabled without performing an output update operation.
Turn off all Om and return to step 101.

If FA="0", the process proceeds to step 108 and subsequent steps.
First, in step 108, the number of output units actually used as the output circuit 5 is preset in the counter C1. In the next step 110, a counter C2 for sequentially specifying the output group flags FG1 to FGM is cleared. Next step 111
Checks the logic state of the output group flag FGi indicated by the contents of counter C2, and sets FGi="0".
If so, proceed to step 112 and select output group i.
8-bit output data for input/output memory 6
A normal output update operation is performed to transfer the output from the output circuit 5 to the output circuit 5.

If FGi="1", the process advances to step 113, where no output update operation is performed for output group i;
Moreover, 8 of output circuits 5 corresponding to output group i
Turn off the external output signal of the point.

Next, in step 114, the counter C1 is decremented by 1, and in step 115, the counter C2 is incremented by 1. In the next step 116, it is checked whether the counter C1 has become 0 or not, and the process returns to step 111 until C1=0, and the above-mentioned process is performed, and C1=0.
When it reaches 0, return to the first step 101.

In this way, depending on the state of each output group flag FG1 to FGM, which are arbitrarily set or reset by executing the user program, the output update operation for the output circuit 5 is performed for each output group, or the output is not updated. It is determined whether to turn off all corresponding outputs.

[Brief explanation of drawings]

Figure 1 shows a programmable system to which this invention is applied.
Block diagram showing the schematic configuration of the controller, Part 2
The figure shows an example of a user program that includes output group flags. Figure 3 shows the CPU1 in Figure 1.
2 is a flowchart showing an overview of the control operation of FIG. 1...CPU, 3...Program memory, 4...
...Input circuit, 5...Output circuit, 6...I/O memory, FG1 to FGM...Output group flag, FA
...Full output prohibition flag.

Claims (1)

[Scope of Claims] 1. A user program memory in which a user program is stored, an input circuit to which an external input signal is applied, an output circuit to send out an external output signal, and input/output data corresponding to the input circuit and output circuit. Each instruction in the input/output memory, which serves as a buffer memory, and the user program memory are executed in sequence at high speed, arithmetic processing is performed based on the data in the input/output memory, and the output data in the input/output memory is rewritten with the processing results. an input updating means for writing input data of the input circuit into a predetermined area of the input/output memory; and an output updating means for setting output data of the predetermined area of the input/output memory in the output circuit. In a programmable controller having: The output data of the output circuit and the input/output memory are divided into multiple groups, and instructions assigned to each group and arbitrarily set as part of the user program are executed, so that arbitrary The output group flag is set or reset as a result of any logical operation between input and output data, and the state of the output group flag is checked during operation of the output update means, and the flag is included in the set group. a first output prohibition means that prohibits the update of the output data to be in a predetermined external output state; and a first output prohibition means that prohibits the update of the output data to be in a predetermined external output state; An all-output prohibition flag that is set or reset as a result of any logical operation in
A programmable controller comprising: an output inhibiting means.