JPH0371789B2 - - Google Patents
Info
- Publication number
- JPH0371789B2 JPH0371789B2 JP57138587A JP13858782A JPH0371789B2 JP H0371789 B2 JPH0371789 B2 JP H0371789B2 JP 57138587 A JP57138587 A JP 57138587A JP 13858782 A JP13858782 A JP 13858782A JP H0371789 B2 JPH0371789 B2 JP H0371789B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- basic cell
- basic
- basic cells
- wiring layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57138587A JPS5929440A (ja) | 1982-08-11 | 1982-08-11 | 半導体集積回路装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57138587A JPS5929440A (ja) | 1982-08-11 | 1982-08-11 | 半導体集積回路装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5929440A JPS5929440A (ja) | 1984-02-16 |
| JPH0371789B2 true JPH0371789B2 (enExample) | 1991-11-14 |
Family
ID=15225593
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57138587A Granted JPS5929440A (ja) | 1982-08-11 | 1982-08-11 | 半導体集積回路装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5929440A (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59163837A (ja) * | 1983-03-09 | 1984-09-14 | Toshiba Corp | 半導体集積回路 |
| JPS6022338A (ja) * | 1983-07-19 | 1985-02-04 | Nec Ic Microcomput Syst Ltd | 半導体集積回路装置 |
| JPS61149340U (enExample) * | 1985-03-06 | 1986-09-16 | ||
| JP2588876B2 (ja) * | 1986-05-14 | 1997-03-12 | 三菱電機株式会社 | Cmosマスタスライスlsi |
| US4915519A (en) * | 1987-10-30 | 1990-04-10 | International Business Machines Corp. | Direct negative from resistive ribbon |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1440512A (en) * | 1973-04-30 | 1976-06-23 | Rca Corp | Universal array using complementary transistors |
-
1982
- 1982-08-11 JP JP57138587A patent/JPS5929440A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5929440A (ja) | 1984-02-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0098163B1 (en) | Gate-array chip | |
| KR100433025B1 (ko) | 반도체장치,반도체집적회로장치,플립플롭회로,배타적논리합회로,멀티플렉서및가산기 | |
| EP0133958B1 (en) | A masterslice semiconductor device | |
| JPH0516188B2 (enExample) | ||
| JPH058585B2 (enExample) | ||
| US4992845A (en) | Semiconductor integrated circuit device having input/output buffer cells each comprising a plurality of transistor regions arranged in a single line | |
| JPH0434309B2 (enExample) | ||
| JPH0480538B2 (enExample) | ||
| JPH0371789B2 (enExample) | ||
| KR100269494B1 (ko) | Soi·cmos 기술을 이용한 소형 반도체 장치 | |
| KR920004225B1 (ko) | 마스터 슬라이스(Master slice)방법을 사용하여 반도체 집적회로를 형성하는 방법 | |
| JP3651944B2 (ja) | Cmosセル | |
| EP0119059B1 (en) | Semiconductor integrated circuit with gate-array arrangement | |
| JPH0120539B2 (enExample) | ||
| JPH0120536B2 (enExample) | ||
| JPH0252428B2 (enExample) | ||
| JPH0258871A (ja) | ボーダーレスマスタスライス半導体装置 | |
| JPH0329187B2 (enExample) | ||
| JPH08213577A (ja) | 半導体集積回路装置 | |
| JP2522678B2 (ja) | Cmos集積回路装置 | |
| KR920005798B1 (ko) | 보더레스 마스터 슬라이스 반도체장치 | |
| JP4156864B2 (ja) | 半導体装置及びその製造方法 | |
| JPS59150446A (ja) | 半導体集積回路装置 | |
| JPH0570942B2 (enExample) | ||
| JPS61107741A (ja) | 半導体集積回路装置 |