JPH0370394U - - Google Patents

Info

Publication number
JPH0370394U
JPH0370394U JP13132189U JP13132189U JPH0370394U JP H0370394 U JPH0370394 U JP H0370394U JP 13132189 U JP13132189 U JP 13132189U JP 13132189 U JP13132189 U JP 13132189U JP H0370394 U JPH0370394 U JP H0370394U
Authority
JP
Japan
Prior art keywords
circuit
input
measures
signal
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13132189U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13132189U priority Critical patent/JPH0370394U/ja
Publication of JPH0370394U publication Critical patent/JPH0370394U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Measurement Of Unknown Time Intervals (AREA)
  • Manipulation Of Pulses (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す構成図、第2
図は本考案の適用例の説明図、第3図は第2図の
動作波形図、第4図は時間間隔計測入力の波形図
である。 図中、10はチヤタリング除去回路、13は禁
止回路、14は計時回路、20は時間間隔計測装
置、30は被測定回路である。
Fig. 1 is a configuration diagram showing one embodiment of the present invention;
The figure is an explanatory diagram of an application example of the present invention, FIG. 3 is an operation waveform diagram of FIG. 2, and FIG. 4 is a waveform diagram of time interval measurement input. In the figure, 10 is a chattering removal circuit, 13 is an inhibition circuit, 14 is a clock circuit, 20 is a time interval measuring device, and 30 is a circuit to be measured.

Claims (1)

【実用新案登録請求の範囲】 被測定回路30から出力されるスタート信号と
ストツプ信号の時間間隔を計測する装置20の入
力側に設けられ、 該装置に入力する該スタート信号で起動される
と所定のキヤンセル時間τを計時する計時回路1
4と、 該時計回路の計時中は該ストツプ信号が前記装
置20へ入力するのを阻止する禁止回路13とを
備えてなることを特徴とするチヤタリング除去回
路。
[Claims for Utility Model Registration] A device provided on the input side of a device 20 that measures the time interval between a start signal and a stop signal outputted from a circuit under test 30, and which generates a predetermined signal when activated by the start signal input to the device. Timing circuit 1 that measures the cancel time τ of
4, and a prohibition circuit 13 that prevents the stop signal from being input to the device 20 while the clock circuit is measuring time.
JP13132189U 1989-11-10 1989-11-10 Pending JPH0370394U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13132189U JPH0370394U (en) 1989-11-10 1989-11-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13132189U JPH0370394U (en) 1989-11-10 1989-11-10

Publications (1)

Publication Number Publication Date
JPH0370394U true JPH0370394U (en) 1991-07-15

Family

ID=31678837

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13132189U Pending JPH0370394U (en) 1989-11-10 1989-11-10

Country Status (1)

Country Link
JP (1) JPH0370394U (en)

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