JPH02110880U - - Google Patents
Info
- Publication number
- JPH02110880U JPH02110880U JP1956089U JP1956089U JPH02110880U JP H02110880 U JPH02110880 U JP H02110880U JP 1956089 U JP1956089 U JP 1956089U JP 1956089 U JP1956089 U JP 1956089U JP H02110880 U JPH02110880 U JP H02110880U
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- pair
- noise
- detection
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 1
Landscapes
- Manipulation Of Pulses (AREA)
- Radar Systems Or Details Thereof (AREA)
Description
第１図は本考案の一実施例を示すブロツク図、
第２図は第１図におけるペアパルス検出のタイミ
ングを示す波形図、第３図はペアパルスの間にノ
イズが発生した場合の波形図、第４図はペアパル
スの直前にノイズが発生した場合の波形図である
。
１……ノイズ除去回路、２，３……ゲート形成
回路、９，９１……遅延カウンタ、１０，１０１
……モードセレクタ、１１，１１１……遅延ゲー
ト発生回路、１２，１２１……１ｓｔパルスデコ
ーダ。
FIG. 1 is a block diagram showing an embodiment of the present invention.
Figure 2 is a waveform diagram showing the timing of paired pulse detection in Figure 1, Figure 3 is a waveform diagram when noise occurs between paired pulses, and Figure 4 is a waveform diagram when noise occurs immediately before paired pulses. It is. 1...Noise removal circuit, 2, 3...Gate formation circuit, 9,9 1 ...Delay counter, 10,10 1
...Mode selector, 11,11 1 ...Delay gate generation circuit, 12,12 1 ...1st pulse decoder.
Claims (1)
ペアパルスを検出するために、該パルス列中の一
定のパルス幅以下のノイズパルスを除去するノイ
ズ除去手段と、カウンタを用いて遅延ゲートを発
生するゲート発生手段と、該遅延ゲートによりペ
アパルスの第２パルスの有無を検出しペアパルス
の第１パルスの立上り時から一定時間後に距離測
定用パルスを出力するパルス発生手段と、ノイズ
によるペアパルス検出への影響を除去する２系統
から成るパルス検出手段とを有することを特徴と
するペアパルス検出装置。 In order to detect a pair of pulses spaced at a constant distance from a series of pulse trains, the present invention comprises a noise removing means for removing noise pulses having a width equal to or less than a certain pulse width in the pulse train, and a gate generating means for generating a delay gate using a counter. , a pulse generating means for detecting the presence or absence of the second pulse of the pair pulse by the delay gate and outputting a distance measuring pulse after a certain period of time from the rise of the first pulse of the pair pulse; and 2 for removing the influence of noise on the detection of the pair pulse. What is claimed is: 1. A paired pulse detection device comprising: pulse detection means consisting of a system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1956089U JPH02110880U (en) | 1989-02-23 | 1989-02-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1956089U JPH02110880U (en) | 1989-02-23 | 1989-02-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02110880U true JPH02110880U (en) | 1990-09-05 |
Family
ID=31235181
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1956089U Pending JPH02110880U (en) | 1989-02-23 | 1989-02-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02110880U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09329664A (en) * | 1996-06-07 | 1997-12-22 | Nec Corp | Decoder |
-
1989
- 1989-02-23 JP JP1956089U patent/JPH02110880U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09329664A (en) * | 1996-06-07 | 1997-12-22 | Nec Corp | Decoder |
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