JPH01137645U - - Google Patents

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Publication number
JPH01137645U
JPH01137645U JP3319588U JP3319588U JPH01137645U JP H01137645 U JPH01137645 U JP H01137645U JP 3319588 U JP3319588 U JP 3319588U JP 3319588 U JP3319588 U JP 3319588U JP H01137645 U JPH01137645 U JP H01137645U
Authority
JP
Japan
Prior art keywords
carrier
signal
response
time
measures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3319588U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3319588U priority Critical patent/JPH01137645U/ja
Publication of JPH01137645U publication Critical patent/JPH01137645U/ja
Pending legal-status Critical Current

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  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の基本構成図、第2図は本考案
の実施例の構成図、そして第3図は第2図の構成
のタイミング図である。 符号の説明、1……模擬キヤリア発生手段、2
……被測定キヤリア検出回路、3……計時手段、
11……フアンクシヨンジエネレータ、12……
ゲート回路、31……カウンタ、32……比較手
段、33……規格値記憶部。
FIG. 1 is a basic configuration diagram of the present invention, FIG. 2 is a configuration diagram of an embodiment of the present invention, and FIG. 3 is a timing diagram of the configuration of FIG. 2. Explanation of symbols, 1...Simulated carrier generation means, 2
...Measured carrier detection circuit, 3...Timekeeping means,
11...Function generator, 12...
Gate circuit, 31... Counter, 32... Comparison means, 33... Standard value storage unit.

Claims (1)

【実用新案登録請求の範囲】 キヤリア信号を検出してキヤリア検出信号を出
力するキヤリア検出回路2のキヤリア応答時間を
測定するキヤリア応答時間測定回路において、 開始信号に応じて模擬キヤリア信号を出力する
模擬キヤリア発生手段1と、 前記開始信号に応じて計時を開始し、前記キヤ
リア検出回路2からキヤリア検出信号が出力され
るまでの時間を測定する計時手段3とを有してな
ることを特徴とするキヤリア応答時間測定回路。
[Scope of Claim for Utility Model Registration] In a carrier response time measurement circuit that measures the carrier response time of a carrier detection circuit 2 that detects a carrier signal and outputs a carrier detection signal, a simulator that outputs a simulated carrier signal in response to a start signal. It is characterized by comprising: a carrier generating means 1; and a time measuring means 3 which starts time counting in response to the start signal and measures the time until a carrier detection signal is output from the carrier detection circuit 2. Carrier response time measurement circuit.
JP3319588U 1988-03-15 1988-03-15 Pending JPH01137645U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3319588U JPH01137645U (en) 1988-03-15 1988-03-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3319588U JPH01137645U (en) 1988-03-15 1988-03-15

Publications (1)

Publication Number Publication Date
JPH01137645U true JPH01137645U (en) 1989-09-20

Family

ID=31259854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3319588U Pending JPH01137645U (en) 1988-03-15 1988-03-15

Country Status (1)

Country Link
JP (1) JPH01137645U (en)

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