JPH0365338U - - Google Patents

Info

Publication number
JPH0365338U
JPH0365338U JP12730489U JP12730489U JPH0365338U JP H0365338 U JPH0365338 U JP H0365338U JP 12730489 U JP12730489 U JP 12730489U JP 12730489 U JP12730489 U JP 12730489U JP H0365338 U JPH0365338 U JP H0365338U
Authority
JP
Japan
Prior art keywords
interface
communication processor
communication
serial
buffer memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12730489U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12730489U priority Critical patent/JPH0365338U/ja
Publication of JPH0365338U publication Critical patent/JPH0365338U/ja
Pending legal-status Critical Current

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  • Information Transfer Systems (AREA)
  • Communication Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案に係るGP−IBインターフエ
イスの一実施例を示す構成図、第2図はその動作
を説明するためのフローチヤート、第3図は従来
のシリアル通信インターフエイスの構成図である
。 10……GP−IBインターフエイス、14…
…通信プロセツサ、17……シリアル通信用LS
I、22……シリアルポート、24……バツフア
メモリ。
Fig. 1 is a block diagram showing an embodiment of the GP-IB interface according to the present invention, Fig. 2 is a flowchart for explaining its operation, and Fig. 3 is a block diagram of a conventional serial communication interface. be. 10...GP-IB interface, 14...
...Communication processor, 17...LS for serial communication
I, 22...Serial port, 24...Buffer memory.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] GP−IBインターフエイスと、このGP−I
Bインターフエイスの双方向性バスが接続される
通信プロセツサと、この通信プロセツサに接続さ
れ受信データを格納するバツフアメモリと、前記
通信プロセツサのデータラインが接続されるシリ
アル通信用インターフエイスとを有する事を特徴
とするGP−IBシリアルコンバータ。
GP-IB interface and this GP-I
A communication processor to which a bidirectional bus of the B interface is connected, a buffer memory connected to the communication processor to store received data, and a serial communication interface to which a data line of the communication processor is connected. Features of GP-IB serial converter.
JP12730489U 1989-10-31 1989-10-31 Pending JPH0365338U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12730489U JPH0365338U (en) 1989-10-31 1989-10-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12730489U JPH0365338U (en) 1989-10-31 1989-10-31

Publications (1)

Publication Number Publication Date
JPH0365338U true JPH0365338U (en) 1991-06-25

Family

ID=31675064

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12730489U Pending JPH0365338U (en) 1989-10-31 1989-10-31

Country Status (1)

Country Link
JP (1) JPH0365338U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60159956A (en) * 1984-01-30 1985-08-21 Hitachi Ltd Interface control device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60159956A (en) * 1984-01-30 1985-08-21 Hitachi Ltd Interface control device

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