JPH0358545B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor memory device including a MOS capacitor, such as a MOS type dynamic RAM, and a method for manufacturing the semiconductor memory device.

[Conventional technology]

In conventional MOS type dynamic RAM
An example of a MOS capacitor is shown in FIG. FIGS. 2a to 2g are cross-sectional views showing the manufacturing process of a conventional semiconductor memory device.

In FIGS. 2a to 2g, 1 is a semiconductor substrate, 2 is an isolation dielectric film such as a thick oxide film for isolation between elements, and 3 is a capacitor dielectric film, which also serves as a gate dielectric film. 4 is a capacitor electrode made of polysilicon or the like, 9 is a gate electrode also made of polysilicon or the like, 10 is a diffusion region containing an impurity having a conductivity type opposite to that of the semiconductor substrate 1, and 11 is the capacitor electrode 4 and gate in the upper layer. An insulating dielectric film 12 provides insulation separation from the electrode 9, and electrode wiring 12 is made of A1 or the like.

Next, we will introduce a second method of manufacturing a conventional semiconductor memory device.
This will be explained according to the diagram.

An isolation dielectric film 2 as shown in FIG. 2B is selectively formed on a semiconductor substrate 1 made of silicon or the like as shown in FIG. 2A by a normal method for forming an isolation oxide film between elements. Thereafter, a capacitor dielectric film 3 is formed on the surface of the unoxidized semiconductor substrate 1, and a capacitor electrode 4 containing, for example, phosphorus is formed on the capacitor dielectric film 3 as shown in FIG. 2c.
Form CVD polysilicon. Next, Figure 2 d
Gate electrode 9 is formed as shown in FIG. After that, for example, by a method such as ion implantation as shown in Figure 2e,
Diffusion regions 10 are formed by introducing impurities from the surface of semiconductor substrate 1 that is not covered with polysilicon. Next, as shown in FIG. 2f, a contact hole is left in the diffusion region 10 and the insulating dielectric film 1 is
1, wiring is formed using electrode wiring 12 made of metal such as A1, thereby completing a MOS type dynamic RAM semiconductor memory device as shown in FIG. 2g.

Its operation is such that the diffusion region 10 serves as a source, and the MOS transistor is turned on and off depending on whether or not a voltage is applied to the gate electrode 9 connected by wiring (not shown), and the capacitor electrode 4 and the capacitor dielectric film Read and write the potential due to the charges under 3.

[Problem to be solved by the invention]

Conventional MOS type dynamic RAM has the above-mentioned configuration, so in order to increase the capacitance of the capacitor as a storage capacitor element, it is necessary to increase the area or reduce the thickness of the capacitor dielectric film. There is a limit to increasing density,
The latter has the problem that it cannot be reduced to less than 100 Å from the viewpoint of reliability.

This invention was made to solve this problem, and aims to provide a semiconductor memory device with a large capacity for the same memory cell area, and conversely, a small memory cell area for the same capacity. It is something to do.

[Means to solve the problem]

The semiconductor memory device of the present invention includes a separation dielectric film for isolating each element formed on a semiconductor substrate, and a capacitor dielectric formed on the exposed surface of the semiconductor substrate where the separation dielectric film is not formed. A MOS capacitor consists of a body film, a capacitor electrode formed extending over the capacitor dielectric film and a separation dielectric film, and a contact on the separation dielectric film at a position corresponding to the end of the capacitor electrode. An insulating dielectric film provided with a hole, a semiconductor film ohmicly connected to a capacitor electrode through a contact hole, a gate dielectric film formed on this semiconductor film, and a gate dielectric film formed on this gate dielectric film. consisting of a gate electrode
It is equipped with a MOS transistor and.

Further, the method for manufacturing a semiconductor memory device of the present invention includes a step of forming an isolation dielectric film for isolating each element on a semiconductor substrate, and a step of forming a capacitor dielectric on the exposed surface of the semiconductor substrate on which the isolation dielectric film is not formed. a step of forming a body film, a step of forming a capacitor electrode by extending over the capacitor dielectric film and the separation dielectric film, a step of forming an insulating dielectric film,
A step of forming a contact hole on the isolation dielectric film at a position corresponding to the end of the capacitor electrode, a step of forming a semiconductor film, a step of forming a gate dielectric film on this semiconductor film, and a step of forming a gate dielectric film on the semiconductor film. This process includes a step of forming an electrode, and a step of forming a source and a drain using the gate electrode as a mask.

[Effect]

In the semiconductor memory device of the present invention, the information or signal of the MOS capacitor that stores the information or signal charge formed on the semiconductor substrate is transferred to the MOS
readout by controlling transistors;
Or write.

Further, in the method of manufacturing a semiconductor memory device of the present invention, ohmic contact with the capacitor electrode is established simultaneously with the formation of the semiconductor film. Also,
The source and drain can be formed in self-alignment using the gate electrode.

〔Example〕

FIGS. 1a to 1g are side sectional views showing the manufacturing process of a semiconductor memory device according to an embodiment of the present invention.

In the semiconductor memory device of the present invention, the isolation dielectric film 2 for isolation between elements is formed by the same method as the conventional method from FIG. 1a to FIG. 1b,
A capacitor dielectric film 3 is formed on the exposed surface of the unoxidized semiconductor substrate 1, and a capacitor electrode 4 is further formed thereon extending over the isolation dielectric film 2, as shown in FIG. do. With the above steps, a MOS capacitor is formed.

Next, as shown in FIG. 1d, the insulating dielectric film 5
A thermally oxidized silicon film, a thermal silicon nitride film, a silicon nitride film formed by low-pressure CVD, or a composite thereof is used as the material. In this case, a contact hole is provided at a position corresponding to the end of the capacitor electrode 4, but this contact hole is formed so as to be necessarily located on the separation dielectric 2. Furthermore, as shown in FIG. 1e, a material that can be a semiconductor film, such as polysilicon, is formed on the insulating dielectric film 5, and a recrystallization technique such as short-time annealing or laser annealing is applied. Then, a semiconductor film 6 is obtained.
Thereby, the semiconductor film 6 is brought into contact with the capacitor electrode 4 at the same time as its formation. after that,
A normal MOS transistor is formed using the same conventional method. That is, as shown in FIG.
After forming the gate dielectric film 7 thereon, as shown in FIG. Form.

In the structure of the MOS capacitor as a new storage capacitor element, the gate electrode 8 of the MOS transistor and the MOS capacitor formed on the semiconductor substrate 1 are not on the same level, but are overlapped in the vertical direction of the element. , one transistor, and one capacitor can occupy a smaller area.

In a normal memory cell, the area occupied by the transistor is about 1/3, but in this invention, this transistor can be formed on the MOS capacitor, so the area can be reduced or the area can be left as is and the area occupied by the capacitor can be reduced. Either can be applied to increase the capacity of.

In the above embodiment, a three-dimensional dynamic RAM with one transistor and one capacitor is shown, but it goes without saying that this two-layer structure can be applied to many other devices.

〔Effect of the invention〕

As explained above, in the semiconductor memory device of the present invention, since the MOS transistor is formed on the MOS capacitor, the memory cell area can be reduced to 2/3 of the conventional one.
can be reduced to Conversely, with the same memory cell area as a conventional memory cell, it is possible to obtain a capacity 1.5 times or more compared to the conventional memory cell.

Since the capacitor electrode extends not only over the entire surface of the capacitor dielectric film but also over the separation dielectric film, leakage from the peripheral edge of the capacitor dielectric film can be prevented.

In addition, since the ohmic contact between the capacitor electrode and the semiconductor film is made on the separate dielectric film, damage during the formation of the contact hole can be prevented from affecting the device characteristics without increasing the size of the entire device. do not have.

Further, in the method of manufacturing a semiconductor memory device of the present invention, ohmic contact with a capacitor electrode can be established at the same time as the semiconductor film is formed. Further, the source and drain can be formed in self-alignment using the gate electrode, which has the advantage of simplifying the manufacturing process compared to the conventional method.

[Brief explanation of drawings]

1a to 1g are side sectional views showing the manufacturing process of a semiconductor memory device according to an embodiment of the present invention, and FIG. 2a
-g are side sectional views showing the manufacturing process of a conventional semiconductor memory device. In the figure, 1 is a semiconductor substrate, 2 is an isolation dielectric film, and 3 is a semiconductor substrate.
is a capacitor dielectric film, 4 is a capacitor electrode, 5 is a capacitor dielectric film, and 4 is a capacitor electrode.
6 is an insulating dielectric film, 6 is a semiconductor film, 7 is a gate dielectric film, and 8 is a gate electrode. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Scope of Claims] 1. A separation dielectric film for isolating each element formed on a semiconductor substrate, and a capacitor dielectric formed on the exposed surface of the semiconductor substrate where the separation dielectric film is not formed. a MOS capacitor consisting of a body film, a capacitor electrode formed extending over the capacitor dielectric film and the separation dielectric film; an insulating dielectric film provided with a contact hole at a position; a semiconductor film ohmicly connected to the capacitor electrode via the contact hole; a gate dielectric film formed on the semiconductor film; and a gate dielectric film formed on the semiconductor film. A semiconductor memory device comprising: a MOS transistor comprising a gate electrode formed on a film; 2. A step of forming an isolation dielectric film for separating each element on a semiconductor substrate, a step of forming a capacitor dielectric film on the exposed surface of the semiconductor substrate on which this isolation dielectric film is not formed, and a step of forming a capacitor dielectric film on the exposed surface of the semiconductor substrate on which this isolation dielectric film is not formed. a step of forming a capacitor electrode by extending the film and the isolation dielectric film, a step of forming an insulating dielectric film, and a contact hole on the isolation dielectric film at a position corresponding to the end of the capacitor electrode. a step of forming a semiconductor film, a step of forming a gate dielectric film on this semiconductor film, a step of forming a gate electrode on top of the gate dielectric film, a step of forming a source and a drain using this gate electrode as a mask. A method of manufacturing a semiconductor memory device, comprising: