JPH0358541B2 - - Google Patents
Info
- Publication number
- JPH0358541B2 JPH0358541B2 JP60257424A JP25742485A JPH0358541B2 JP H0358541 B2 JPH0358541 B2 JP H0358541B2 JP 60257424 A JP60257424 A JP 60257424A JP 25742485 A JP25742485 A JP 25742485A JP H0358541 B2 JPH0358541 B2 JP H0358541B2
- Authority
- JP
- Japan
- Prior art keywords
- cap
- organic resin
- encapsulating
- film
- electronic component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229920005989 resin Polymers 0.000 claims description 28
- 239000011347 resin Substances 0.000 claims description 28
- 239000000853 adhesive Substances 0.000 claims description 19
- 230000001070 adhesive effect Effects 0.000 claims description 19
- 238000007789 sealing Methods 0.000 claims description 13
- 239000000463 material Substances 0.000 claims description 11
- 239000012790 adhesive layer Substances 0.000 claims description 7
- 238000010438 heat treatment Methods 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 7
- 238000000576 coating method Methods 0.000 claims description 6
- 238000007650 screen-printing Methods 0.000 claims description 6
- 239000011248 coating agent Substances 0.000 claims description 5
- 239000007788 liquid Substances 0.000 claims description 5
- 238000002844 melting Methods 0.000 claims description 5
- 230000008018 melting Effects 0.000 claims description 5
- 238000007766 curtain coating Methods 0.000 claims description 3
- 238000001035 drying Methods 0.000 claims 1
- 239000007769 metal material Substances 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 description 18
- 239000000758 substrate Substances 0.000 description 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000004809 Teflon Substances 0.000 description 3
- 229920006362 Teflon® Polymers 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000003491 array Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 239000011148 porous material Substances 0.000 description 2
- 239000003566 sealing material Substances 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 239000004743 Polypropylene Substances 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- -1 polypropylene Polymers 0.000 description 1
- 229920001155 polypropylene Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、チツプキヤリア、ピングリツドアレ
イ等の半導体搭載用基板の封止用キヤツプに関す
るものであり、半導体素子の封止作業性及び封止
後の半導体素子の信頼性を向上させることを目的
とし、半導体搭載用基板との接着面側に接着層と
なる有機系樹脂がB―ステージの状態で均一に塗
布された電子部品封止用キヤツプとその製造方法
に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a cap for sealing semiconductor mounting substrates such as chip carriers and pin grid arrays, and improves the sealing workability and sealing of semiconductor elements. A cap for encapsulating electronic components in which an organic resin is uniformly applied in a B-stage state to serve as an adhesive layer on the adhesive side with the semiconductor mounting substrate, with the aim of improving the reliability of subsequent semiconductor devices. and its manufacturing method.
極小化された半導体素子を実装する場合には、
この半導体素子をパツケージ基板に載置してから
ボンデイングワイヤーにより当該パツケージ基板
の導体回路と半導体素子とを結線し、その後にパ
ツケージ基板に電子部品封止用キヤツプを接着し
ている。
When mounting miniaturized semiconductor elements,
After this semiconductor element is placed on a package board, the conductor circuit of the package board and the semiconductor element are connected using bonding wires, and then a cap for sealing electronic components is bonded to the package board.
ところで、これらのパツケージ基板と電子部品
封止用キヤツプとの製造と、半導体素子の設計・
製造及び実装は全く別の工程において行なわれて
いるのが通常であり、半導体素子を実装する場合
にはじめてパツケージ基板と電子部品封止用キヤ
ツプとの密着封止が行なわれているのである。 By the way, the manufacturing of these package substrates and caps for encapsulating electronic components, and the design and design of semiconductor elements are
Manufacturing and mounting are normally performed in completely separate processes, and the package substrate and the electronic component sealing cap are tightly sealed only when the semiconductor element is mounted.
このような半導体素子を実装する作業にあつて
は、従来、半導体素子の封止材として用いられて
いる電子部品封止用キヤツプに、その実装作業に
際してデイスペンサー等により前記キヤツプに接
着剤を直接塗布することによつて行なわれてい
る。このような従来のキヤツプは、プラスチツク
及びセラミツクスからなるチツプキヤリア、ピン
グリツドアレイ等の半導体搭載用基板に実装され
た半導体素子の封止材料として利用されている。 In the work of mounting such semiconductor elements, adhesive is applied directly to the cap for encapsulating electronic components, which is conventionally used as a sealing material for semiconductor elements, using a dispenser or the like during the mounting work. This is done by coating. Such conventional caps are used as a sealing material for semiconductor elements mounted on semiconductor mounting substrates such as chip carriers and pin grid arrays made of plastic and ceramics.
しかしながら、半導体素子を実装するに際し
て、キヤツプに接着剤を直接塗布する方法は、キ
ヤツプの形状、特に第2図に示すような切削加工
又は絞り加工等により凹部3aを有するキヤツプ
3の場合、凹部3aの内底部への接着剤の塗布は
極めて困難である。例えば、デイスペンサーによ
る方法では、接着剤の塗布幅及び厚みがどうして
も不均一となりがちであり、B−ステージの状態
にする際の熱処理で当該接着剤は初期の形状をと
どめることが困難であるばかりでなく、接着剤自
体の凝集により中央部が隆起し、接着層内部に気
孔が残りやすくなるなど封止後の信頼性を低下さ
せる要因となる。又、スクリーン印刷法、ロール
コーテイング、カーテンコーテイングにおいて
も、凹部3a内へ接着剤を直接塗布することは極
めて困難である。
However, when mounting a semiconductor element, the method of directly applying adhesive to the cap is difficult because of the shape of the cap, especially in the case of a cap 3 that has a recess 3a formed by cutting or drawing as shown in FIG. It is extremely difficult to apply adhesive to the inner bottom of the For example, in the method using a dispenser, the applied width and thickness of the adhesive tend to be uneven, and it is difficult for the adhesive to maintain its initial shape during heat treatment when bringing it to the B-stage state. Instead, the center part bulges due to aggregation of the adhesive itself, which tends to leave pores inside the adhesive layer, which causes a decrease in reliability after sealing. Also, in screen printing, roll coating, and curtain coating, it is extremely difficult to apply adhesive directly into the recesses 3a.
本発明は、この従来の電子部品封止用キヤツプ
の欠点を改善することを目的として、信頼性の高
い電子部品封止用キヤツプと、複雑な形状な基材
に対しても適用できる電子部品封止用キヤツプの
製造方法を提供するものである。 The present invention aims to improve the drawbacks of conventional caps for encapsulating electronic components. A method of manufacturing a stopper cap is provided.
以下に、本発明を図面に基づいて具体的に説明
する。
The present invention will be specifically explained below based on the drawings.
まず第1図のaは、離型用の板又はフイルム2
上にスクリーン印刷法により、液状の有機系樹脂
1が10〜500μmの厚さで均一に塗布された状態
を示す斜視図である。離型用の板又はフイルム2
としては種々なものが考えられ、板やフイルム等
の形状は勿論、その材料も適宜選択し得るもので
ある。上記スクリーン印刷とは別の塗布方法とし
て、ロールコーテイング、カーテンコーテイング
などの方法を適用しても本発明の効果は得られ
る。前記離型用の板又はフイルム2は、テフロン
樹脂、シリコン樹脂、ポリプロピレン樹脂等の離
型性を有する材質からなるものが好しい。 First, a in Fig. 1 is a release plate or film 2.
FIG. 2 is a perspective view showing a state in which a liquid organic resin 1 is uniformly applied to a thickness of 10 to 500 μm by screen printing. Release plate or film 2
Various materials can be considered, and not only the shape of the plate or film, but also the material thereof can be selected as appropriate. The effects of the present invention can also be obtained by applying methods such as roll coating and curtain coating as coating methods other than the above-mentioned screen printing. The mold release plate or film 2 is preferably made of a material with mold releasability, such as Teflon resin, silicone resin, or polypropylene resin.
第1図のbにおいて、符号1aは前記液状の有
機系樹脂1のスクリーン印刷後、加熱工程を経
て、前記有機系樹脂1がB−ステージの状態に固
化することによつて形成された固体状態の有機系
樹脂を示しており、この有機系樹脂1aから前記
離型用の板又はフイルム2を剥離した状態を示す
斜視図である。 In FIG. 1b, reference numeral 1a indicates a solid state formed by solidifying the organic resin 1 to a B-stage state through a heating process after screen printing the liquid organic resin 1. FIG. 2 is a perspective view showing a state in which the mold release plate or film 2 is peeled off from the organic resin 1a.
第2図は、第1図の(b)に示す有機系樹脂1aが
電子部品封止用キヤツプ3に搭載され、加熱溶融
により前記キヤツプ3に密着された状態を示す斜
視図である。 FIG. 2 is a perspective view showing a state in which the organic resin 1a shown in FIG. 1(b) is mounted on the electronic component sealing cap 3 and is adhered to the cap 3 by heating and melting.
このキヤツプ3はアルミニウム又は銅等の金属
を基材とするものであり、この基材の表面には、
接着面側においては液状の有機系樹脂1との密着
性を向上させるため、又、外表面側においては耐
蝕性を向上させるため、酸化被膜が形成されてい
ることが必要である。 This cap 3 is made of metal such as aluminum or copper as a base material, and the surface of this base material is
It is necessary to form an oxide film on the adhesive surface side in order to improve the adhesion with the liquid organic resin 1, and on the outer surface side in order to improve the corrosion resistance.
以上の方法により製造された電子部品封止用キ
ヤツプ3は表面が酸化被膜により覆れており、接
着面側には有機系樹脂1aがB−ステージの状態
で均一な接着層を形成している。 The surface of the electronic component sealing cap 3 manufactured by the above method is covered with an oxide film, and the organic resin 1a forms a uniform adhesive layer in a B-stage state on the adhesive surface side. .
そして、上記のように形成された有機系樹脂1
aを有する電子部品封止用キヤツプ3は、有機系
樹脂素材からなるパツケージ基板4とともに半導
体素子5の実装作業現場に搬送され、半導体素子
5をパツケージ基板4上に設置した後その有機系
樹脂1aをパツケージ基板4上に接するように搭
載し、加熱溶融することによりパツケージ基板4
に密着させるのである。 Then, the organic resin 1 formed as described above
The cap 3 for encapsulating electronic components having a cap 3 is transported to a mounting work site for a semiconductor element 5 together with a package substrate 4 made of an organic resin material, and after the semiconductor element 5 is installed on the package substrate 4, the organic resin 1a is is mounted so as to be in contact with the package substrate 4, and is heated and melted to form the package substrate 4.
This is to bring it into close contact with the
この電子部品封止用キヤツプ3の有機系樹脂1
aは完全な平坦面を保持したままの状態でパツケ
ージ基板4上に載置されたのであるから、密着完
了後の電子部品封止用キヤツプ3にあつてはその
有機系樹脂1aが隆起したり接着面に気孔を生じ
たりすることは全くないのである。 Organic resin 1 of this electronic component sealing cap 3
Since cap a was placed on the package substrate 4 while maintaining a completely flat surface, the organic resin 1a of the electronic component sealing cap 3 after completion of adhesion did not bulge. There is no formation of pores on the adhesive surface.
実施例 1
エポキシ樹脂からなる接着剤をテフロンシート
上にスクリーン印刷法により印刷した後、前記接
着剤に熱処理を加えB―ステージの状態に固化さ
せた。ついで、この接着剤をテフロンシートから
剥離し、被着体であるアルミニウムのキヤツプに
付着し加熱溶融により前記キヤツプに密着させ
た。前記アルミニウムのキヤツプは、アルマイト
処理により表面が酸化被膜に覆れているものを使
用した。
Example 1 After printing an adhesive made of epoxy resin on a Teflon sheet by screen printing, the adhesive was heat-treated to solidify it to a B-stage state. Next, this adhesive was peeled off from the Teflon sheet, adhered to an aluminum cap as an adherend, and was brought into close contact with the cap by heating and melting. The aluminum cap used was one whose surface was covered with an oxide film by alumite treatment.
実施例 2
ポリイミド樹脂からなる接着剤をシリコンシー
ト上にロールコーテイングにより塗布した後、前
記接着剤に熱処理を加えB―ステージの状態に固
化させた。ついで、この接着剤をシリコンシート
から剥離し、被着体である銅のキヤツプに付着し
加熱溶融により前記キヤツプ密着させた。前記銅
のキヤツプは黒化処理により表面が酸化被膜に覆
われているものを使用した。Example 2 After applying an adhesive made of polyimide resin onto a silicone sheet by roll coating, the adhesive was heat-treated to solidify it to a B-stage state. Next, this adhesive was peeled off from the silicone sheet, adhered to a copper cap as an adherend, and was brought into close contact with the cap by heating and melting. The copper cap used was one whose surface was covered with an oxide film by blackening treatment.
本発明によれば、予め離型用の板又はフイルム
上に所定の形状で有機系樹脂の接着層が形成され
た後、電子部品封止用キヤツプに前記有機系樹脂
が搭載され加熱溶融により密着されるので、第3
図及び第5図のようなあらゆる形状のキヤツプの
接着面側に均一な接着層を容易に形成することが
でき、従来方法の問題点を著しく改善し、半導体
素子を封止する様々な構造に対応することができ
る。
According to the present invention, after an adhesive layer of organic resin is formed in advance in a predetermined shape on a release plate or film, the organic resin is mounted on a cap for encapsulating electronic components and adhered by heating and melting. Therefore, the third
It is possible to easily form a uniform adhesive layer on the adhesive side of caps of all shapes as shown in Figures 1 and 5, which significantly improves the problems of the conventional method and can be applied to various structures for sealing semiconductor devices. can be accommodated.
第1図のa,bは本発明の電子部品封止用キヤ
ツプの製造工程を示す斜視図、第2図は本発明の
方法によつて形成した電子部品封止用キヤツプ3
の底面斜視図である。第3図〜第5図は本発明に
係る離型用の板又はフイルム2の各実施例をそれ
ぞれ示す図であり、各図のa及びbのそれぞれ
は、このキヤツプと回路形成されたパツケージ基
板とが接合一体化し、半導体素子などの電子部品
を封止した状態を示す断面図及び斜視図である。
符号の説明、1……有機系樹脂(液状)、1…
…有機系樹脂(固体)、2……離型用の板又はフ
イルム、3……電子部品封止用キヤツプ、4……
有機系樹脂素材からなるパツケージ基板、5……
電子部品、6……ボンデイングワイヤー、7……
導体回路、8……外部リード、9……有機系樹脂
素材からなるダム枠、10……接着層。
1A and 1B are perspective views showing the manufacturing process of a cap for encapsulating an electronic component according to the present invention, and FIG. 2 is a cap 3 for encapsulating an electronic component formed by the method of the present invention.
FIG. 3 to 5 are views showing respective embodiments of the mold release plate or film 2 according to the present invention, and a and b in each figure represent a package substrate on which a circuit is formed with this cap. FIG. 3 is a cross-sectional view and a perspective view showing a state in which the electronic components such as semiconductor elements are sealed and joined together. Explanation of symbols, 1...Organic resin (liquid), 1...
...organic resin (solid), 2... plate or film for mold release, 3... cap for sealing electronic components, 4...
Package substrate made of organic resin material, 5...
Electronic parts, 6... Bonding wire, 7...
Conductor circuit, 8... External lead, 9... Dam frame made of organic resin material, 10... Adhesive layer.
Claims (1)
イルム2に塗布する工程と、 (b) 前記有機系樹脂1を乾燥又はB−ステージの
状態に硬化させる工程と、 (c) その後に前記離型用の板又はフイルム2から
この硬化された有機系樹脂1aを剥離する工程
と、 (d) この有機系樹脂1aを電子部品封止用キヤツ
プ3の接着面側に搭載する工程と、 (e) この有機系樹脂1a加熱溶融することにより
前記電子部品封止用キヤツプ3に密着させる工
程 とからなる電子部品封止用キヤツプの製造方法。 2 前記有機系樹脂1は、スクリーン印刷法、ロ
ールコーテング、カーテンコーテングにより前記
離型用の板又はフイルム2に所定の形状で均一な
厚みで塗布されていることを特徴とする特許請求
の範囲第1項に記載の電子部品封止用キヤツプの
製造方法。 3 金属材を基材とするとともに、この基材の表
面に酸化被膜が形成されてなり、前記基材の接着
面側に有機系樹脂1を乾燥又はB−ステージの状
態で均一な厚みに形成した接着層からなつている
ことを特徴とする電子部品封止用キヤツプ。[Claims] 1. (a) A step of applying liquid organic resin 1 to a release plate or film 2; (b) Drying or curing the organic resin 1 to a B-stage state. (c) Thereafter, a step of peeling off the cured organic resin 1a from the release plate or film 2; (d) bonding the organic resin 1a to the electronic component sealing cap 3; A method for producing a cap for encapsulating an electronic component, comprising the steps of: mounting it on the surface side; and (e) heating and melting the organic resin 1a to bring it into close contact with the cap 3 for encapsulating an electronic component. 2. The organic resin 1 is applied to the release plate or film 2 in a predetermined shape and with a uniform thickness by screen printing, roll coating, or curtain coating. A method for manufacturing a cap for encapsulating an electronic component according to item 1. 3 A metal material is used as a base material, an oxide film is formed on the surface of this base material, and organic resin 1 is formed on the adhesive surface side of the base material to a uniform thickness in a dry or B-stage state. A cap for encapsulating electronic components, characterized by being made of an adhesive layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60257424A JPS62117348A (en) | 1985-11-16 | 1985-11-16 | Cap for sealing electronic parts and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60257424A JPS62117348A (en) | 1985-11-16 | 1985-11-16 | Cap for sealing electronic parts and manufacture thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62117348A JPS62117348A (en) | 1987-05-28 |
JPH0358541B2 true JPH0358541B2 (en) | 1991-09-05 |
Family
ID=17306175
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60257424A Granted JPS62117348A (en) | 1985-11-16 | 1985-11-16 | Cap for sealing electronic parts and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62117348A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6165816A (en) * | 1996-06-13 | 2000-12-26 | Nikko Company | Fabrication of electronic components having a hollow package structure with a ceramic lid |
-
1985
- 1985-11-16 JP JP60257424A patent/JPS62117348A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS62117348A (en) | 1987-05-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5717252A (en) | Solder-ball connected semiconductor device with a recessed chip mounting area | |
US5286679A (en) | Method for attaching a semiconductor die to a leadframe using a patterned adhesive layer | |
JPS608426Y2 (en) | Semiconductor wafer holding substrate | |
JP2003249510A (en) | Method for sealing semiconductor | |
JPH0358541B2 (en) | ||
JP2704342B2 (en) | Semiconductor device and manufacturing method thereof | |
JPH0380348B2 (en) | ||
JP2003249509A (en) | Method for sealing semiconductor and sealed semiconductor | |
JP3306981B2 (en) | Method for applying adhesive to lead frame for semiconductor device | |
JP2003218405A (en) | Electronic component mounting structure and mounting method | |
JPH0438859A (en) | Electronic component assembly structure and assembly method | |
JP2902497B2 (en) | Manufacturing method of hybrid integrated circuit board | |
EP0736225A1 (en) | Method of attaching integrated circuit dies by rolling adhesives onto semiconductor wafers | |
JPS629728Y2 (en) | ||
JP3695177B2 (en) | Intermediate products for semiconductor devices | |
US20050023682A1 (en) | High reliability chip scale package | |
JP3923661B2 (en) | Semiconductor device | |
JPH01272125A (en) | Manufacture of semiconductor device | |
JP4679991B2 (en) | Semiconductor device | |
JP4521078B2 (en) | Manufacturing method of semiconductor device | |
JP4408015B2 (en) | Manufacturing method of semiconductor device | |
TW567564B (en) | Semiconductor package having a die carrier to prevent delamination and method for fabricating the package | |
JP3956530B2 (en) | Integrated circuit manufacturing method | |
JP2570123B2 (en) | Semiconductor device and manufacturing method thereof | |
JPH04142042A (en) | Manufacture of semiconductor device |