JPH0380348B2 - - Google Patents
Info
- Publication number
- JPH0380348B2 JPH0380348B2 JP60257425A JP25742585A JPH0380348B2 JP H0380348 B2 JPH0380348 B2 JP H0380348B2 JP 60257425 A JP60257425 A JP 60257425A JP 25742585 A JP25742585 A JP 25742585A JP H0380348 B2 JPH0380348 B2 JP H0380348B2
- Authority
- JP
- Japan
- Prior art keywords
- cap
- organic resin
- adhesive
- film
- electronic components
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229920005989 resin Polymers 0.000 claims description 25
- 239000011347 resin Substances 0.000 claims description 25
- 239000000853 adhesive Substances 0.000 claims description 19
- 230000001070 adhesive effect Effects 0.000 claims description 19
- 238000007789 sealing Methods 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 9
- 239000012790 adhesive layer Substances 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 8
- 238000007650 screen-printing Methods 0.000 claims description 5
- 239000007788 liquid Substances 0.000 claims description 2
- 238000001035 drying Methods 0.000 claims 1
- 239000007769 metal material Substances 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 description 19
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 239000004809 Teflon Substances 0.000 description 3
- 229920006362 Teflon® Polymers 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 239000002313 adhesive film Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 239000011148 porous material Substances 0.000 description 2
- 239000003566 sealing material Substances 0.000 description 2
- 239000004743 Polypropylene Substances 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000007766 curtain coating Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000003779 heat-resistant material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- -1 polypropylene Polymers 0.000 description 1
- 229920001155 polypropylene Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、チツプキヤリア、ピングリツドアレ
イ等の半導体搭載用基板の半導体素子を封止する
キヤツプに関するものであり、半導体素子の封止
作業性及び封止後の半導体素子の信頼性を向上さ
せることを目的とし、半導体搭載用基板との接着
面側に接着層となる有機系樹脂がＢ−ステージの
状態で均一に塗布された電子部品封止用キヤツプ
とその製造方法に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a cap for sealing a semiconductor element on a semiconductor mounting substrate such as a chip carrier or a pin grid array, and improves the workability of sealing the semiconductor element. In order to improve the reliability of semiconductor devices after encapsulation, electronic component encapsulation in which an organic resin that serves as an adhesive layer is uniformly applied in a B-stage state on the adhesive side with the semiconductor mounting substrate. This invention relates to a stopper cap and its manufacturing method.
極小化された半導体素子を実装する場合には、
この半導体素子をパツケージ基板に載置してから
ボンデイングワイヤーにより当該パツケージ基板
の導体回路と半導体素子とを結線し、その後にパ
ツケージ基板に電子部品封止用キヤツプを接着し
ている。
When mounting miniaturized semiconductor elements,
After this semiconductor element is placed on a package board, the conductor circuit of the package board and the semiconductor element are connected using bonding wires, and then a cap for sealing electronic components is bonded to the package board.
ところで、これらのパツケージ基板と電子部品
封止用キヤツプとの製造と、半導体素子の設計・
製造及び実装は全く別の工程において行なわれて
いるのが通常であり、半導体素子を実装する場合
にはじめてパツケージ基板と電子部品封止用キヤ
ツプとの密着封止が行なわれているのである。 By the way, the manufacturing of these package substrates and caps for encapsulating electronic components, and the design and design of semiconductor elements are
Manufacturing and mounting are normally performed in completely separate processes, and the package substrate and the electronic component sealing cap are tightly sealed only when the semiconductor element is mounted.
このような半導体素子を実装する作業にあつて
は、従来、半導体素子の封止材として用いられて
いる電子部品封止用キヤツプに、その実装作業に
際してデイスペンサー等により前記キヤツプに接
着剤を直接塗布することによつて行なわれてい
る。このような従来のキヤツプは、プラスチツク
及びセラミツクスからなるチツプキヤリア、ピン
グリツドアレイ等の半導体搭載用基板に実装され
た半導体素子の封止材料として利用されている。 In the work of mounting such semiconductor elements, adhesive is applied directly to the cap for encapsulating electronic components, which is conventionally used as a sealing material for semiconductor elements, using a dispenser or the like during the mounting work. This is done by coating. Such conventional caps are used as a sealing material for semiconductor elements mounted on semiconductor mounting substrates such as chip carriers and pin grid arrays made of plastic and ceramics.
しかしながら、半導体素子を実装するに際し
て、キヤツプに接着剤を直接塗布する方法は、キ
ヤツプの形状、特に第１図のｂ及びｃに示すよう
な切削加工又は絞り加工等により凹部３ａを有す
るキヤツプ３の場合、凹部３ａの内底部への接着
剤の塗布は極めて困難である。例えば、デイスペ
ンサーによる方法では、接着剤の塗布幅及び厚み
がどうしても不均一となりがちであり、Ｂ−ステ
ージの状態にする際の熱処理で当該接着剤は初期
の形状をとどめることが困難であるばかりでな
く、接着剤自体の凝集により中央部が隆起し、接
着層内部に気孔が残りやすくなるなど封止後の信
頼性を低下させる要因となる。又、スクリーン印
刷法、ロールコーテイング、カーテンコーテイン
グにおいても、凹部３ａ内へ接着剤を直接塗布す
ることは極めて困難である。
However, when mounting a semiconductor device, the method of directly applying adhesive to the cap is difficult because of the shape of the cap, especially the shape of the cap 3 having a recessed portion 3a by cutting or drawing as shown in b and c of FIG. In this case, it is extremely difficult to apply adhesive to the inner bottom of the recess 3a. For example, in the method using a dispenser, the applied width and thickness of the adhesive tend to be uneven, and it is difficult for the adhesive to maintain its initial shape during heat treatment when bringing it to the B-stage state. Instead, the center part bulges due to aggregation of the adhesive itself, which tends to leave pores inside the adhesive layer, which causes a decrease in reliability after sealing. Also, in screen printing, roll coating, and curtain coating, it is extremely difficult to apply adhesive directly into the recesses 3a.
本発明は、この従来の電子部品封止用キヤツプ
の欠点を改善することを目的として、信頼性の高
い電子部品封止用キヤツプと、複雑な形状の基材
に対しても適用できしかも多様性に富んだ電子部
品封止用キヤツプの製造方法を提供するものであ
る。 The present invention aims to improve the drawbacks of conventional caps for encapsulating electronic components, and has developed a cap for encapsulating electronic components that is highly reliable, can be applied to substrates with complex shapes, and is versatile. The present invention provides a method for manufacturing a cap for encapsulating electronic components that is rich in quality.
以下に、本発明を図面に基づいて具体的に説明
する。
The present invention will be specifically explained below based on the drawings.
まず第１図のａは、離型用の板又はフイルム２
上にスクリーン印刷法により液状の有機系樹脂１
を10〜500μmの厚さで均一に塗布した状態を示す
断面図である。前記離型用の板又はフイルム２
は、テフロン、シリコン樹脂、ポリプロピレン樹
脂等の耐熱性をもつ材質が望ましい。 First, a in Fig. 1 is a release plate or film 2.
Liquid organic resin 1 is applied on top by screen printing method.
FIG. 2 is a cross-sectional view showing a state in which the material is uniformly applied to a thickness of 10 to 500 μm. The mold release plate or film 2
It is preferable to use a heat-resistant material such as Teflon, silicone resin, or polypropylene resin.
第１図のｂは、前記有機系樹脂１をスクリーン
印刷した後、熱処理を加えこれを乾燥又はＢ−ス
テージの状態にしてから、被着体である電子部品
封止用キヤツプ３へこの有機系樹脂１を熱圧着に
より転写した状態を示す断面図である。 In Fig. 1b, after the organic resin 1 is screen printed, it is heat-treated and brought to a dry or B-stage state, and then the organic resin 1 is applied to a cap 3 for sealing electronic components, which is an adherend. FIG. 3 is a cross-sectional view showing a state in which resin 1 is transferred by thermocompression bonding.
この場合、スクリーン印刷した後の熱処理の程
度によつては、有機系樹脂１をキヤツプ３へ搭載
した後にさらに熱処理を加えることによつて乾燥
又はＢ−ステージの状態にする方法も可能であ
る。 In this case, depending on the degree of heat treatment after screen printing, it is also possible to carry out further heat treatment after the organic resin 1 is mounted on the cap 3 to bring it into a dry or B-stage state.
前記キヤツプ３はその基材が金属であり、この
基材としてはアルミニウム又は銅等が適用され
る。またキヤツプの接着面側においては有機系樹
脂１との密着性を向上させるため、一方外表面側
においては耐蝕性を向上させるため、アルミニウ
ム又は銅表面に酸化被膜が形成されていることが
必要である。 The base material of the cap 3 is metal, and aluminum, copper, or the like is used as the base material. In addition, an oxide film must be formed on the aluminum or copper surface on the adhesive side of the cap to improve adhesion with the organic resin 1, and on the outer surface to improve corrosion resistance. be.
第１図のｃは、離型用の板又はフイルム２が剥
離されて均一な接着層を与えることを示す断面図
である。 FIG. 1c is a cross-sectional view showing the release plate or film 2 being peeled off to provide a uniform adhesive layer.
以上の方法により製造された電子部品封止用キ
ヤツプは、表面が酸化被膜により覆われており、
接着面側には有機系樹脂が乾燥又はＢ−ステージ
の状態で均一な接着層を形成している。 The surface of the electronic component sealing cap manufactured by the above method is covered with an oxide film.
On the adhesive surface side, the organic resin forms a uniform adhesive layer in a dry or B-stage state.
さらに、特許請求の範囲第１項記載の電子部品
封止用キヤツプの製造方法は、デイスペンサー、
ロールコーター、カーテンコーター等を用いても
可能である。 Furthermore, the method for manufacturing a cap for sealing an electronic component according to claim 1 includes a dispenser,
It is also possible to use a roll coater, curtain coater, etc.
そして、上記のように形成された有機系樹脂１
を有する電子部品封止用キヤツプ３は、有機系樹
脂素材からなるパツケージ基板４とともに半導体
素子５の実装作業現場に搬送され、半導体素子５
をパツケージ基板４上に設置した後その有機系樹
脂１をパツケージ基板４上に接するように搭載
し、熱圧着することによりパツケージ基板４に密
着させるのである。 Then, the organic resin 1 formed as described above
The cap 3 for encapsulating electronic components having a
After the organic resin 1 is placed on the package substrate 4, the organic resin 1 is mounted so as to be in contact with the package substrate 4, and the organic resin 1 is brought into close contact with the package substrate 4 by thermocompression bonding.
この電子部品封止用キヤツプ３の有機系樹脂１
は完全な平坦面を保持したままの状態でパツケー
ジ基板４上に載置されたのであるから、密着完了
後の電子部品封止用キヤツプ３にあつてはその有
機系樹脂１が隆起したり接着面に気孔を生じたり
することは全くないのである。 Organic resin 1 of this electronic component sealing cap 3
was placed on the package substrate 4 while maintaining a completely flat surface, so the organic resin 1 of the cap 3 for encapsulating electronic components may be raised or bonded after adhesion is completed. There are no pores on the surface.
実施例 １
エポキシ樹脂からなる接着剤をテフロンシート
上にスクリーン印刷法により印刷した後、前記接
着剤に熱処理を加えＢ−ステージの状態に固化さ
せた。この接着剤を被着体であるアルミニウムの
キヤツプへ付着し、熱圧着により転写させた。つ
いで、テフロンンシートを剥離した。前記アルミ
ニウムのキヤツプはアルマイト処理により表面が
酸化被膜に覆われているものを使用した。
Example 1 After printing an adhesive made of epoxy resin on a Teflon sheet by screen printing, the adhesive was heat-treated to solidify it to a B-stage state. This adhesive was applied to an aluminum cap as an adherend and transferred by thermocompression bonding. Then, the Teflon sheet was peeled off. The aluminum cap used was one whose surface was covered with an oxide film by alumite treatment.
実施例 ２
ポリイミド樹脂からなる接着剤をシリコンシー
ト上にロールコーテイングにより塗布した後、前
記接着剤に熱処理を加えＢ−ステージの状態に固
化させた。この接着剤を被着体である銅のキヤツ
プへ付着し、熱圧着により転写させた。ついで、
シリコンシートを剥離した。前記銅のキヤツプは
黒化処理により表面が酸化被膜に覆われているも
のを使用した。Example 2 After applying an adhesive made of polyimide resin onto a silicone sheet by roll coating, the adhesive was heat-treated to solidify it to a B-stage state. This adhesive was applied to a copper cap as an adherend and transferred by thermocompression bonding. Then,
The silicone sheet was peeled off. The copper cap used was one whose surface was covered with an oxide film by blackening treatment.
本発明によれば、予め離型用の板又はフイルム
２上に所定の形状で有機系樹脂１の接着被膜が形
成された後、電子部品封止用キヤツプ３に前記接
着被膜が熱圧着により転写されるため、第２図〜
第４図に示すようにあらゆる形状のキヤツプの接
着面に、均一な接着層を形成させることができ
る。したがつて、半導体素子を半導体搭載用基板
に搭載した後、外部からの湿気の侵入を防ぐため
の様々な封止構造を提供することができる。
According to the present invention, after an adhesive film of organic resin 1 is formed in advance in a predetermined shape on a mold release plate or film 2, the adhesive film is transferred to the electronic component sealing cap 3 by thermocompression bonding. Therefore, Figure 2~
As shown in FIG. 4, a uniform adhesive layer can be formed on the adhesive surface of caps of all shapes. Therefore, after a semiconductor element is mounted on a semiconductor mounting substrate, various sealing structures can be provided to prevent moisture from entering from the outside.
第１図のａ，ｂ，ｃのそれぞれは本発明の電子
部品封止用キヤツプの製造工程を示す断面図、第
２図〜第４図は本発明に係る電子部品封止用キヤ
ツプと回路形成したパツケージ基板とを半導体素
子などの電子部品を封止した状態で接合して一体
化したものを示すものであり、第２図〜第４図の
各ａのそれぞれはその各斜視図、第２図〜第４図
の各ｂのそれぞれはその断面図である。
符号の説明 １……有機系樹脂、２……離型用
の板又はフイルム、３……金属性の電子部品封止
用キヤツプ、４……有機系樹脂素材からなるパツ
ケージ基板、５……電子部品（半導体素子）、６
……ボンデイングワイヤー、７……導体回路、８
……外部リード、９……有機系樹脂素材からなる
ダム枠、１０……接着層。
Each of a, b, and c in FIG. 1 is a cross-sectional view showing the manufacturing process of a cap for encapsulating an electronic component according to the present invention, and FIGS. This figure shows an integrated package board that has been bonded to a package board with electronic components such as semiconductor elements sealed therein. Each b in FIGS. 4 to 4 is a sectional view thereof. Explanation of symbols 1...Organic resin, 2...Release plate or film, 3...Cap for sealing metallic electronic components, 4...Package substrate made of organic resin material, 5...Electronic Parts (semiconductor elements), 6
...Bonding wire, 7...Conductor circuit, 8
... External lead, 9 ... Dam frame made of organic resin material, 10 ... Adhesive layer.
Claims (1)
イルム２に塗布する工程と、 (b) 前記有機系樹脂１を乾燥又はＢ−ステージの
状態に硬化させる工程と、 (c) 前記有機系樹脂１を電子部品封止用キヤツプ
３の接着面側に熱圧着により転写させる工程
と、 (d) この有機系樹脂１から前記離型用の板又はフ
イルム２を剥離させる工程 とからなる電子部品封止用キヤツプの製造方法。 ２ 前記有機系樹脂１は、スクリーン印刷法、デ
イスペンサー、ロールコーター、カーテンコータ
ーを用いて前記離型用の板又はフイルム２に所定
の形状に塗布されていることを特徴とする特許請
求の範囲第１項記載の電子部品封止用キヤツプの
製造方法。 ３ 金属材を基材とするとともに、この基材の表
面に酸化被膜が形成されてなり、前記基材の接着
面側に有機系樹脂１を乾燥又はＢ−ステージの状
態で均一な厚みに形成した接着層からなつてお
り、この接着層を熱圧着によつてパツケージ基板
に固着するものとしたことを特徴とする電子部品
封止用キヤツプ。[Claims] 1. (a) A step of applying liquid organic resin 1 to a release plate or film 2; (b) Drying or curing the organic resin 1 to a B-stage state. (c) Transferring the organic resin 1 to the adhesive surface side of the electronic component sealing cap 3 by thermocompression bonding; and (d) Transferring the mold release plate or film 2 from the organic resin 1. A method for producing a cap for encapsulating electronic components, comprising the step of peeling off the cap. 2. Claims characterized in that the organic resin 1 is applied to the release plate or film 2 in a predetermined shape using a screen printing method, a dispenser, a roll coater, or a curtain coater. 2. A method for manufacturing a cap for encapsulating an electronic component according to item 1. 3 A metal material is used as a base material, an oxide film is formed on the surface of this base material, and organic resin 1 is formed on the adhesive surface side of the base material to a uniform thickness in a dry or B-stage state. 1. A cap for encapsulating electronic components, characterized in that the cap is made of an adhesive layer, and the adhesive layer is fixed to a package substrate by thermocompression bonding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60257425A JPS62117349A (en) | 1985-11-16 | 1985-11-16 | Cap for sealing electronic parts and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60257425A JPS62117349A (en) | 1985-11-16 | 1985-11-16 | Cap for sealing electronic parts and manufacture thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62117349A JPS62117349A (en) | 1987-05-28 |
| JPH0380348B2 true JPH0380348B2 (en) | 1991-12-24 |
Family
ID=17306188
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60257425A Granted JPS62117349A (en) | 1985-11-16 | 1985-11-16 | Cap for sealing electronic parts and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62117349A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6165816A (en) * | 1996-06-13 | 2000-12-26 | Nikko Company | Fabrication of electronic components having a hollow package structure with a ceramic lid |
-
1985
- 1985-11-16 JP JP60257425A patent/JPS62117349A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62117349A (en) | 1987-05-28 |
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