JP4408015B2 - A method of manufacturing a semiconductor device - Google Patents

A method of manufacturing a semiconductor device Download PDF

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JP4408015B2
JP4408015B2 JP2002316076A JP2002316076A JP4408015B2 JP 4408015 B2 JP4408015 B2 JP 4408015B2 JP 2002316076 A JP2002316076 A JP 2002316076A JP 2002316076 A JP2002316076 A JP 2002316076A JP 4408015 B2 JP4408015 B2 JP 4408015B2
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resin layer
semiconductor device
semiconductor element
semi
adhesive
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JP2004152983A (en )
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光孝 佐藤
雅光 生雲
哲也 藤沢
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富士通マイクロエレクトロニクス株式会社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19Manufacturing methods of high density interconnect preforms
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73267Layer and HDI connectors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92222Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92224Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a build-up interconnect
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12044OLED

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device wherein a resin filling layer is in close contact with the side face of a semiconductor element, and also to provide a method of manufacturing the same. <P>SOLUTION: The semiconductor element 2 is mounted on a substrate 1, and the resin filling layer 4 is formed around the semiconductor element 2. The resin filling layer 4 is semi-cured resin having such a property that, when heated in a semi-cured state, it is softened and liquidated. By heating the resin filling layer 4 in a semi-cured state, a space between the resin filling layer 4 and the semiconductor element 2 is filled with the liquidated resin filling layer 4. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】 [0001]
【発明の属する技術分野】 BACKGROUND OF THE INVENTION
本発明は半導体装置に係り、より詳細には半導体素子の周囲に樹脂層が設けられた半導体装置及びその製造方法に関る。 The present invention relates to a semiconductor device, Sekiru to a semiconductor device and a manufacturing method thereof a resin layer is provided around the semiconductor device and more.
【0002】 [0002]
【従来の技術】 BACKGROUND OF THE INVENTION
基板上に半導体素子を搭載して形成する半導体装置では、一般的に半導体素子の周囲を樹脂で覆うことにより、半導体素子を確実に基板に固定する。 In the semiconductor device formed by mounting a semiconductor element on a substrate, by generally covering the periphery of the semiconductor element with resin, securely fixed to the substrate of the semiconductor device. またマルチチップモジュール等のように基板上に複数の半導体素子が搭載される場合、半導体素子の間に樹脂が充填される。 In the case where a plurality of semiconductor elements on a substrate as such as a multi-chip module is mounted, the resin is filled between the semiconductor element. この充填樹脂層により各半導体素子は確実に基板へ固定され、また、半導体素子間が確実に絶縁される。 Each semiconductor device by filling the resin layer is securely fixed to the substrate and, between the semiconductor element is reliably insulated.
【0003】 [0003]
充填樹脂層は、半導体素子を基板に搭載する前に予め形成しておくこともでき、また、半導体素子を基板に搭載した後に充填することもできる。 Filling resin layer, can also be previously formed before the semiconductor element is mounted on the substrate, it can also be filled with a semiconductor device after mounting the substrate.
【0004】 [0004]
【特許文献1】 [Patent Document 1]
特開2002−110714号公報【0005】 Japanese Unexamined Patent Publication No. 2002-110714 Publication [0005]
【発明が解決しようとする課題】 [Problems that the Invention is to Solve
上述の充填樹脂層を半導体素子の搭載前に予め形成しておく場合、基板上に形成された充填樹脂層の一部を除去して基板の表面が露出した開口を形成し、この開口に半導体素子を配置して搭載する。 If previously formed filling resin layer described above before mounting of the semiconductor element to form an opening surface of the substrate is exposed by removing a portion of the filled resin layer formed on a substrate, a semiconductor in the opening mounted by placing the element. したがって、開口は半導体素子よりも僅かに大きい寸法で形成されるため、開口の内壁と半導体素子の側面との間に間隙が形成される。 Thus, the openings to be formed in slightly larger than the semiconductor element, a gap is formed between the side surface of the opening of the inner wall and the semiconductor element.
【0006】 [0006]
また、充填樹脂層を半導体素子の搭載後に形成する場合、例えば、半導体素子をマスキングして基板上に樹脂を印刷塗布し、塗布した樹脂硬化させるといった方法がある。 In the case of forming a filled resin layer after mounting the semiconductor element, for example, a resin applied by printing onto the substrate to mask the semiconductor element, there are methods such be applied resin cured. この場合でも、充填樹脂層を半導体素子の側面に密着させることは難しく、充填樹脂層と半導体素子の側面との間に間隙が形成される。 Even in this case, be brought into close contact with the filling resin layer on the side surfaces of the semiconductor device is difficult, a gap is formed between the side surface of the filling resin layer and the semiconductor element.
【0007】 [0007]
上述のように、半導体素子側面と充填樹脂層との間に隙間が形成されると、充填樹脂による半導体素子の固定効果を得ることができない。 As described above, a gap is formed between the semiconductor element side and the filling resin layer, it is impossible to obtain a fixed effect of the semiconductor device according to the filled resin. また、この間隙は、半導体素子と充填樹脂層の上での配線形成の妨げとなる。 Furthermore, this gap hinders wiring formation on the semiconductor element and filling the resin layer. 半導体素子及び充填樹脂層の上に樹脂絶縁層をもうける場合、樹脂絶縁層の形成段階で、樹脂絶縁層の一部が隙間に入り込むことで、この隙間が充填されるが、隙間を完全に充填することはできない。 Case where the resin insulating layer on the semiconductor element and filling the resin layer, the formation stage of the resin insulating layer, that portion of the resin insulating layer from entering the gap, but the gap is filled, completely filled the gap It can not be.
【0008】 [0008]
本発明は上記の点に鑑みてなされたものであり、充填樹脂層が半導体素子の側面に密着した半導体装置の製造方法を提供することを目的とする。 The present invention has been made in view of the above, and an object thereof is to provide a method of manufacturing a semiconductor equipment which filling resin layer is in close contact with the side surface of the semiconductor element.
【0009】 [0009]
【課題を解決するための手段】 In order to solve the problems]
上記の課題を解決するために本発明によれば、 回路形成面が基板と反対方向に向いた半導体素子が間に配置された半硬化状態の充填樹脂層を該基板上に形成し、該半硬化状態の充填樹脂層を加熱して流動化させ、前記半導体素子と前記充填樹脂層の間の間隙に前記充填樹脂層を流動させて間隙をなくし、前記充填樹脂層を加熱して完全に硬化させることを特徴とする半導体装置の製造方法が提供される。 According to the present invention in order to solve the above problems, to form a filled resin layer in a semi-cured state in which the circuit forming surface is disposed between the semiconductor element facing in the direction opposite to the substrate on the substrate, semi and heating the filled resin layer in cured state are fluidized, eliminate gaps the by flow filling the resin layer in the gap between the filler resin layer and the semiconductor element, fully cured by heating the filled resin layer the method of manufacturing a semiconductor device, characterized in that to is provided.
【0011】 [0011]
上述の発明によれば、充填樹脂層の材料として半硬化性樹脂を用いることにより、半導体素子と充填樹脂層との間の間隙を、軟化した半硬化性樹脂で充填することができ、半導体素子と充填樹脂層との間に間隙がない半導体装置を容易に製造することができる。 According to the invention described above, by using a semi-cured resin as the material of the filling resin layer, the gap between the semiconductor element and the filling resin layer, can be filled with a semi-cured resin was softened, the semiconductor device the semiconductor device has no gap between the filling resin layer can be easily manufactured.
【0012】 [0012]
また、本発明によれば、開口を有する充填樹脂層を基板上に形成し、且つ半硬化性樹脂よりなる接着剤が設けられた半導体素子を準備し、該開口に前記半導体素子を配置し、半硬化状態における前記接着剤を加熱して流動化させながら、前記半導体素子を前記接着剤を介して前記基板に対して押圧し、前記半導体素子の上面が前記充填樹脂層の上面と同一面となる位置で前記半導体素子を維持しながら、前記接着剤を加熱し硬化させることを特徴とする半導体装置の製造方法が提供される。 Further, according to the present invention, the filling resin layer having an opening is formed on a substrate, and preparing a semiconductor device adhesive is provided made of a semi-cured resin, the semiconductor element arranged in the opening, while heated to fluidize the adhesive in a semi-cured state, the semiconductor device is pressed against the substrate through the adhesive, the upper surface flush with the upper surface of the semiconductor element is the filling resin layer and while maintaining the semiconductor element in a position, a method of manufacturing a semiconductor device, characterized in that to heat to cure the adhesive agent.
【0013】 [0013]
上述の発明によれば、半導体素子と充填樹脂層との間の間隙を接着剤により充填することができ、且つ半導体素子の上面と充填樹脂層の上面とを精度よく同一平面とすることができる。 According to the invention described above, the gap between the semiconductor element and filling the resin layer can be filled with an adhesive, and a top surface of the upper surface and the filling resin layer of the semiconductor element can be precisely flush . また、接着剤間隙を充填することができるような量が塗布され、半導体素子による押圧力により間隙を充填していくので、接着材は基板と完全に密着し、接着剤の濡れ不足や這い上がり現象が防止される。 The amount that can be filled with an adhesive gap is applied, so continue to fill the gap by the pressing force by the semiconductor device, the adhesive is completely adhered to the substrate, crawling and poor wetting of the adhesive up phenomenon can be prevented.
【発明の実施の形態】 DETAILED DESCRIPTION OF THE INVENTION
次に、本発明の実施の形態について図面と共に説明する。 It will be described with reference to the accompanying drawings embodiments of the present invention.
【0014】 [0014]
図1は本発明の第1実施例による半導体装置の製造工程を説明するための図である。 Figure 1 is a diagram for explaining a manufacturing process of a semiconductor device according to a first embodiment of the present invention. 図1(a)は半導体装置の形成工程の途中の状態を示す断面図であり、充填樹脂層と半導体素子との間に間隙が形成されている。 1 (a) is a sectional view showing a state of forming process of a semiconductor device, a gap is formed between the filling resin layer and the semiconductor element. 図1(b)は充填樹脂層を流動させて、間隙を埋めた状態の半導体装置の断面図である。 1 (b) is allowed to flow to fill the resin layer, a cross-sectional view of a semiconductor device in a state in which fills the gap.
【0015】 [0015]
図1(b)に示すように、本発明の第1実施例による半導体装置は、基板1上に半導体素子2が搭載された構成を有する。 As shown in FIG. 1 (b), the semiconductor device according to a first embodiment of the present invention has a structure in which the semiconductor element 2 is mounted on the substrate 1. 半導体素子2は接着材3により基板に固定される。 The semiconductor element 2 is fixed to the substrate by an adhesive 3. 半導体素子2の周囲には充填樹脂層4が形成される。 Filling resin layer 4 is formed around the semiconductor element 2. 充填樹脂層4は半導体素子2の側面に密着しており、間隙は形成されていない。 Filling resin layer 4 is in close contact with the side surface of the semiconductor element 2, the gap is not formed.
【0016】 [0016]
充填樹脂層4を形成し、且つ半導体素子2を基板1上に搭載した状態では、図1(a)に示すように充填樹脂層4と半導体素子2の側面2aとの間に間隙が形成されている。 Forming a filling resin layer 4, and the state of mounting the semiconductor element 2 on the substrate 1, a gap is formed between the side surface 2a of FIG filling resin layer 4 as shown in (a) and the semiconductor element 2 ing. この間隙を埋めるため、本実施例では充填樹脂層4を形成する樹脂として、いわゆるB−ステージ樹脂を用いている。 Therefore to fill the gaps, as a resin for forming the filled resin layer 4 in this embodiment uses a so-called B- stage resin. B−ステージ樹脂とは、一般的にエポキシ樹脂であり、液体状の樹脂から完全に硬化するまでの途中で硬化を止めることができる樹脂である。 B- A-stage resin is generally an epoxy resin, a resin which can be stopped in the middle cured from liquid resin until complete hardening. 硬化が途中で止まった状態を半硬化状態と称する。 A state in which the cure is stopped on the way is referred to as a semi-cured state. この半硬化状態での硬化率は50%程度である。 Cure rate in the semi-cured state is about 50%.
【0017】 [0017]
B-ステージ樹脂は、半硬化状態においては個体であるが、加熱することにより軟化して流動性を示すようになる。 B- stage resin is a solid in a semi-cured state, it softened comes to show fluidity by heating. すなわち、B-ステージ樹脂は、半硬化状態において加熱することにより、軟化して流動する特性を有している。 That, B- stage resin, by heating in a semi-cured state, and has the property of flowing softened. また、B−ステージ樹脂は、半硬化状態から加熱して流動性が増した後に更に加熱することにより完全に硬化させることができる。 Further, B- stage resin can be fully cured by further heating after the increased fluidity by heating a semi-cured state.
【0018】 [0018]
本実施例では、充填樹脂層4を形成する材料として上述のB−ステージ樹脂を用いている。 In this embodiment, using the above B- stage resin materials for forming the filled resin layer 4. これにより、半硬化状態の充填樹脂層4を基板1上に形成して、半導体素子2を基板1に搭載した状態(図1(a)に示す状態)において、充填樹脂層4を加熱して流動させることにより、図1(b)に示すように半導体素子2の側面2aと充填樹脂層4との間の間隙に充填樹脂層4が流動して間隙が充填される。 Thus, the filling resin layer 4 in a semi-cured state is formed on the substrate 1, in a state mounted with the semiconductor element 2 to the substrate 1 (the state shown in FIG. 1 (a)), by heating the filled resin layer 4 by flowing, gap filling the gaps resin layer 4 is to flow between the side surface 2a and the filling resin layer 4 of the semiconductor element 2 as shown in FIG. 1 (b) is filled. その後、更に充填樹脂層4を加熱することにより、充填樹脂層4を完全に硬化させる。 Then, by further heating the filled resin layer 4, thereby completely cure the filled resin layer 4. したがって、充填樹脂層4は半導体素子2の側面に密着して半導体素子2を側面から支持し、半導体素子2の固定をより確実にすることができる。 Therefore, the filled resin layer 4 may be a semiconductor element 2 is supported from the side in close contact with the side surface of the semiconductor element 2, to secure the fixed semiconductor element 2.
【0019】 [0019]
ここで、充填樹脂層4は、図2に示すように半導体素子2を基板1に搭載した後に、半硬化状態で形成することとしてもよく、あるいは、図3に示すように半硬化状態の充填樹脂層4を基板1上に予め形成しておき、開口4a内に半導体素子2を配置して基板1に搭載することとしてもよい。 Here, the filling resin layer 4, after the semiconductor element 2 mounted on the substrate 1 as shown in FIG. 2, it may be be formed of a semi-cured state, or, as shown in Figure 3 filled in a semi-cured state the resin layer 4 is previously formed on the substrate 1, the semiconductor element 2 may be mounted on the substrate 1 placed in the opening 4a. また、半硬化状態の充填樹脂層4を、周知の刷法を用いて基板1に転写することとしてもよい。 Further, the filling resin layer 4 in a semi-cured state, may be transferred to the substrate 1 by a known printing method.
【0020】 [0020]
半硬化状態の充填樹脂層4は加熱して流動性が増しても液体のように自由に流動するものではなく、間隙の幅(ギャップG)が半導体素子2の厚み(チップ厚Tc)より大きくなると、充填樹脂層4が流動して変形しても間隙を完全に埋めることができなくなる。 Filling resin layer 4 in a semi-cured state is not to be increased fluidity by heating a free-flowing like a liquid, the gap width (gap G) is greater than the thickness of the semiconductor element 2 (chip thickness Tc) It comes to, filling resin layer 4 will not be able to completely fill the gap be modified to flow. 半硬化状態の充填樹脂層4を流動させて半導体素子2との間の間隙を完全になくすには、図4に示すように、半導体素子2の厚み(チップ厚Tc)が間隙の幅(ギャップG)より大きいこと、すなわちTc>Gとすることが好ましい。 The filling resin layer 4 in a semi-cured state to flow completely eliminate the gap between the semiconductor element 2, as shown in FIG. 4, the thickness of the semiconductor element 2 (chip thickness Tc) of the gap width (gap G) greater than, that it is preferable that the Tc> G.
【0021】 [0021]
充填樹脂層4を形成するB−ステージ樹脂は、半硬化状態において流動性が現れる温度(軟化点)が60℃以上であることが好ましい。 B- stage resin forming the filled resin layer 4 is preferably a temperature at which fluidity appears in the semi-cured state (softening point) of 60 ° C. or higher. これは、軟化点が60℃より低いと、室温あるいは製造工程中の温度において充填樹脂層4が流動してしまうおそれがあるからである。 This is because, if the softening point is lower than 60 ° C., because the filling resin layer 4 at a temperature of room temperature or manufacturing process which may result in flow.
【0022】 [0022]
半硬化状態の充填樹脂層4の厚みは、半導体素子2を固定するために基板との間に設けられる接着剤3の厚みを考慮し、また、完全に硬化した後の充填樹脂層4の高さと半導体素子2の高さをほぼ同じ高さとするために、半導体素子2の厚みより5μm〜20μm大きいことが好ましい。 The thickness of the filled resin layer 4 in a semi-cured state, taking into account the thickness of the adhesive 3 provided between the substrate in order to fix the semiconductor element 2, also fully cured filling resin layer 4 after high to the height of the semiconductor element 2 and substantially the same height to is, it is preferable 5μm~20μm greater than the thickness of the semiconductor element 2.
【0023】 [0023]
上述の実施例では、充填樹脂層として、B−ステージエポキシ樹脂を用いたが、同様な特性を示す樹脂であれば、例えば、ノボラックやフェノール樹脂等も用いることができる。 In the above embodiment, as the filling resin layer, B- was used stage epoxy resin, as long as it is a resin exhibiting similar properties, for example, can be used novolac resins and phenolic resins.
【0024】 [0024]
次に、本発明の第2実施例による半導体装置について、図5を参照しながら説明する。 Next, a semiconductor device according to a second embodiment of the present invention will be described with reference to FIG. 図5は本発明の第2実施例による半導体装置の製造工程を説明するための図である。 Figure 5 is a diagram for explaining a manufacturing process of a semiconductor device according to a second embodiment of the present invention. 本発明の第2実施例による半導体装置は、図5(d)に示すように、充填樹脂層4の上面4bと半導体素子2の上面2bとが同一面となっている。 The semiconductor device according to the second embodiment of the present invention, as shown in FIG. 5 (d), the upper surface 2b of the upper surface 4b and the semiconductor element 2 of the filling resin layer 4 is in the same plane.
【0025】 [0025]
まず、上述の第1実施例と同様に、基板1上に半硬化状態の充填樹脂層4を形成し、且つ半導体素子2を搭載する。 First, as in the first embodiment described above, the filling resin layer 4 in a semi-cured state is formed on the substrate 1, and mounting the semiconductor element 2. ここで、半硬化状態の充填樹脂層4には、後工程で使用するビアホールのような貫通孔4cが形成されている。 Here, the filling resin layer 4 in a semi-cured state, the through hole 4c, such as via holes for use in a later step are formed. 次に、図5(a)に示すように、充填樹脂層4と半導体素子2とにまたがって、感光性フィルム5を貼り付ける。 Next, as shown in FIG. 5 (a), across the semiconductor element 2 packed resin layer 4, pasting a photosensitive film 5. 本実施例では充填樹脂層4に貫通孔4cを形成するため、貫通孔4cの部分では充填樹脂層4が流動しないことが好ましい。 In the present embodiment for forming a through hole 4c in the filling resin layer 4, it is preferable to fill the resin layer 4 does not flow in the portion of the through hole 4c. そこで、図5(b)に示すように、貫通孔4cを覆っている部分の感光性フィルム5を感光させ、この部分を取り除く。 Therefore, as shown in FIG. 5 (b), to expose the photosensitive film 5 of the portion covering the through hole 4c, remove this portion. すなわち、充填樹脂層4の流動させたくない部分は、感光性フィルム5により覆われないようにする。 That is, the portion not desired to be fluidized in the filled resin layer 4, so as not to be covered by the photosensitive film 5.
【0026】 [0026]
そして、図5(c)に示すように、半硬化状態の充填樹脂層4を加熱して流動させる。 Then, as shown in FIG. 5 (c), to flow by heating the filled resin layer 4 in a semi-cured state. これにより、感光性フィルム5により覆われている間隙には充填樹脂層4が流動して間隙がなくなる。 Thus, a gap is eliminated filled resin layer 4 is to flow in the gap is covered by a photosensitive film 5. 一方、感光性フィルム5により覆われていない貫通孔4cの部分では、充填樹脂層4はほとんど流動することはなく、貫通孔4cが塞がれることはない。 On the other hand, in the portion of the through hole 4c not covered by photosensitive film 5, the filled resin layer 4 is not that most flowing, is not a through hole 4c is closed. すなわち、充填樹脂層4をテープやフィルムで覆うことにより、充填樹脂層4の流動を促進することができる。 That is, the filling resin layer 4 by covering with a tape or film, can facilitate the flow of the filler resin layer 4.
【0027】 [0027]
その後、図5(d)に示すように、充填樹脂層4を完全に硬化させてから感光性フィルム5を剥離して取り除く。 Thereafter, as shown in FIG. 5 (d), removing by peeling the photosensitive film 5 by completely cure the filled resin layer 4. この状態では、半導体素子2と充填樹脂層4の間の間隙がなく、且つ半導体素子2の上面2bと充填樹脂層4の上面4bとが同一面となっている。 In this state, no gap between the semiconductor element 2 and the filling resin layer 4, and the upper surface 2b of the semiconductor element 2 and the upper surface 4b of the filling resin layer 4 is in the same plane. また、充填樹脂層4には半硬化状態において形成された貫通孔4cはそのまま残っている。 Further, the filling resin layer 4 through holes 4c formed in the semi-cured state is left as it is.
【0028】 [0028]
なお、感光性フィルム5で覆われない部分に充填樹脂層4が流動しないことは、実験で明らかになったものであり、詳細な理由については明らかではないが、十分に再現性のある現象であり、実用上問題なく実施することができる。 Incidentally, the photosensitive film 5 portion filling resin layer 4 which is not covered with no flow, which has become evident in experiments, is not clear detailed reason, a phenomenon is sufficiently reproducible There may be implemented without any practical problem.
【0029】 [0029]
また、上述の実施例では流動させたくない部分(貫通孔4c)の位置に開口を設けるために感光性フィルム5を用いたが、そのような必要がない場合には、感光性フィルム以外のフィルムあるいはテープを用いることができる。 Although in the above embodiment using the photosensitive film 5 in order to provide an opening to the position of the portion not desired to flow (through holes 4c), in which case no such requirement, other than photosensitive film Film or it can be used tape. 例えば、ダイシングテープを貼り付けることとしてもよい。 For example, it is also possible to paste a dicing tape.
【0030】 [0030]
次に、本発明の第3実施例による半導体装置について、図6を参照しながら説明する。 Next, a semiconductor device according to a third embodiment of the present invention will be described with reference to FIG. 図6は本発明の第3実施例による半導体装置の断面図である。 6 is a cross-sectional view of a semiconductor device according to a third embodiment of the present invention.
【0031】 [0031]
本発明の第3実施例による半導体装置は、複数の半導体素子(図6では2個の半導体素子2A,2Bが示されている)を有するマルチチップモジュールである。 The semiconductor device according to a third embodiment of the present invention is a multi-chip module having a plurality of semiconductor elements (FIG. 6, two semiconductor elements 2A, and 2B are shown). 半導体素子2A,2Bの各々は、回路形成面を上に向けた状態で、背面が接着剤3により基板1に接合されて搭載される。 Semiconductor devices 2A, 2B each is in a state of facing upward circuit forming surface, the rear surface is mounted is bonded to the substrate 1 by an adhesive 3.
【0032】 [0032]
半導体素子2A,2Bの周囲及びそれらの間には充填樹脂層4が設けられ、充填樹脂層4の上面と各半導体素子2A,2Bの上面(回路形成面)とは略同一面となっている。 Semiconductor devices 2A, 2B filling resin layer 4 is provided around and between those upper surface and the semiconductor element 2A of the filled resin layer 4 are substantially the same plane as the upper surface of 2B (circuit forming surface) . 充填樹脂層4は上述の第1実施例と同様の材料で形成され、各半導体素子2A,2Bの側面に密着している。 Filling resin layer 4 is formed of the same material as the first embodiment described above, the semiconductor elements 2A, is in close contact with the side surface of 2B. また、半導体素子2A,2Bの回路形成面及び充填樹脂層4の上面にまたがって、絶縁層及び導電層を重ねた配線層6が形成され、配線層6の上面に外部接続端子としてハンダボール7が設けられる。 Further, the semiconductor device 2A, across the circuit forming surface and the upper surface of the filling resin layer 4 of 2B, the wiring layer 6 stacked insulating layer and the conductive layer is formed, solder balls 7 on the top surface of the wiring layer 6 as the external connection terminal It is provided. 各半導体素子2A,2Bの回路形成面に設けられた電極は、配線層6内の配線を介して対応するハンダボール7に電気的に接続される。 Each semiconductor element 2A, the electrodes provided on the circuit forming surface of 2B, is electrically connected to the solder balls 7 corresponding through the interconnection of the interconnection layer 6. なお、配線層の形成は周知の半導体製造技術を用いることにより可能であり、その説明は省略する。 The formation of the wiring layer is possible by using known semiconductor fabrication techniques, and a description thereof will be omitted.
【0033】 [0033]
半導体素子2A,2Bの厚みは50μm程度であり、接着剤3の厚みは5μm〜20μm程度である。 Semiconductor devices 2A, 2B of the thickness is about 50 [mu] m, the thickness of the adhesive 3 is about 5Myuemu~20myuemu. したがって、充填樹脂層4を、厚みが50+5〜20μmとなるように形成することにより、半導体素子2A,2Bの上面(回路形成面)と充填樹脂層4の上面とを略同一平面とすることができる。 Thus, the filling resin layer 4, by the thickness be formed to be 50 + 5 to 20 [mu] m, be a semiconductor element 2A, 2B of the upper surface and the upper surface (circuit forming surface) and the filling resin layer 4 substantially coplanar it can. 接着剤3の厚みは半導体素子の厚みには依存しないため、充填樹脂層4の厚みを、(半導体素子の厚み)+(5μm〜20μm)とすることで半導体素子の上面(回路形成面)と充填樹脂層4の上面とを略同一平面とすることができる。 Because the thickness of the adhesive 3 does not depend on the thickness of the semiconductor element, the thickness of the filled resin layer 4, and (the thickness of the semiconductor device) + upper surface of the semiconductor element by a (5Myuemu~20myuemu) (circuit forming surface) it can be the upper surface of the filling resin layer 4 substantially the same plane.
【0034】 [0034]
なお、上述の実施例では、接着剤3は半導体素子2A,2Bの背面を固定するためであり、回路形成面に塗布されるものではない。 In the above embodiment, the adhesive 3 is for fixing the back surface of the semiconductor element 2A, 2B, but the present invention is applied to the circuit formation surface. このため、接着剤3は特別な特性を必要とせず、充填樹脂層4と同じ材料とすることもできる。 Therefore, the adhesive 3 does not require any special characteristics, may be the same material as the filling resin layer 4. この場合、充填樹脂層4を流動させる工程において、接着剤3も流動させることができ、接着剤3と充填樹脂層4の密着性をより一層向上することができる。 In this case, in the step of flowing the filling resin layer 4, also the adhesive 3 can flow, the adhesion of the adhesive 3 and the filling resin layer 4 can be further improved.
【0035】 [0035]
次に、本発明の第4実施例について図7を参照しながら説明する。 It will be described below with reference to FIG. 7, a fourth embodiment of the present invention. 本発明の第4実施例による半導体装置は、半導体素子を基板に固定するための接着剤を、上述の第1実施例と同様な半硬化特性を有する樹脂としたものである。 The semiconductor device according to a fourth embodiment of the present invention, an adhesive for fixing the semiconductor element on the substrate, in which a resin having similar semi-curing characteristics to the first embodiment described above.
【0036】 [0036]
まず、図7(a)に示すように、基板1上に形成した充填樹脂層8に開口8aを形成し、半導体素子2を開口8a内に配置する。 First, as shown in FIG. 7 (a), the opening 8a is formed in the filling resin layer 8 formed on the substrate 1, placing the semiconductor element 2 in the opening 8a. 充填樹脂層8は、上述の実施例とは異なり、完全に硬化した状態である。 Filling resin layer 8 is different from the above embodiments, a fully cured state. 半導体素子2の背面には上述の充填樹脂層4と同様な材料の接着剤3Aが予め塗布され、半硬化状態とされている。 Adhesive 3A of similar to filling resin layer 4 of the above material is previously applied to the back surface of the semiconductor element 2, there is a semi-cured state. 次に、図7(b)に示すように接着剤3Aを加熱して流動可能な状態としながら、ボンディングツール10を下降させる。 Next, with a flowable state by heating the adhesive 3A, as shown in FIG. 7 (b), lowering the bonding tool 10. この際、接着剤3Aは半導体素子2により押圧されて流動し、半導体素子2と充填樹脂層8の側面8bとの間に入り込む。 At this time, the adhesive 3A is pressed and fluidized by the semiconductor element 2, enters between the semiconductor element 2 and the side surface 8b of the filled resin layer 8. 流動性の増した充填樹脂層8は、基板1への粘着性が増すため、半導体素子2を基板1に接着することができる。 Filling resin layer 8 of increased fluidity, since the adhesion to the substrate 1 is increased, it is possible to bond the semiconductor element 2 to the substrate 1. そして、ボンディングツール10の下面が充填樹脂層8の上面8cに当接した位置でボンディングツール10の下降を止め、この状態で接着剤3Aを200℃以上に加熱して、ほぼ完全(90%以上)に硬化させる。 Then, stop the lowering of the bonding tool 10 lower surface of the bonding tool 10 is in contact with the position on the upper surface 8c of the filled resin layer 8, by heating the adhesive 3A in 200 ° C. or higher in this state, almost completely (90% ) is cured in.
【0037】 [0037]
以上の方法によれば、半導体素子2と充填樹脂層8との間の間隙を接着剤3Aにより充填することができ、且つ半導体素子2の上面と充填樹脂層8の上面8cとを精度よく同一平面とすることができる。 According to the above method, the gap between the semiconductor element 2 and the filling resin layer 8 can be filled with an adhesive 3A, and accurately identical to the upper surface of the semiconductor element 2 and the upper surface 8c of the filling resin layer 8 it can be a plane.
【0038】 [0038]
また、ボンディングツール10の下面が充填樹脂層8の上面に当接して充填樹脂層8を押さえているため、接着剤3Aの硬化時の収縮に起因して半導体素子2が変形することを防止することができる。 Further, since the lower surface of the bonding tool 10 is pressing the contact with the filling resin layer 8 on the upper surface of the filling resin layer 8, the semiconductor element 2 due to shrinkage during curing of the adhesive 3A is prevented from being deformed be able to. さらに、接着剤3Aは間隙を充填することができるような量が塗布され、半導体素子2による押圧力により間隙を充填していくので、接着材3Aは基板1と完全に密着し、接着剤の濡れ不足や這い上がり現象が防止される。 Furthermore, the adhesive 3A is an amount such that it is possible to fill the gap is applied, so continue to fill the gap by the pressing force by the semiconductor element 2, adhesive 3A is completely adhered to the substrate 1, the adhesive poor wetting and creeping phenomenon can be prevented.
【0039】 [0039]
ここで、図7に示す半導体素子2に接着剤3Aを塗布して半硬化状態とする工程について、図8を参照しながら説明する。 Here, an adhesive 3A is applied to the semiconductor device 2 shown in FIG. 7, step of a semi-cured state, will be described with reference to FIG.
【0040】 [0040]
まず、図8(a)に示すように、ウェハ9上に回路を形成して複数の半導体素子を形成する。 First, as shown in FIG. 8 (a), forming a plurality of semiconductor elements by forming a circuit on the wafer 9. 次に、図8(b)に示すように、ウェハ9の回路形成面とは反対側の背面に接着剤3Aを塗布し、100℃以下で硬化させて接着剤3Aを半硬化状態とする。 Next, as shown in FIG. 8 (b), the circuit forming surface of the wafer 9 adhesive 3A was applied to the back of the opposite side, and cured at 100 ° C. or less to the adhesive 3A a semi-cured state. 接着剤3Aを100℃以下で硬化させることにより、50μm程度の厚みの薄型ウェハを用いた半導体素子に対しても、本実施例による方法を適用することが可能となる。 By curing the adhesive 3A at 100 ° C. or less, even for a semiconductor device using a thin wafer of 50μm thickness on the order of, it is possible to apply the method according to the present embodiment. そして、図8(c)に示すように、ウェハ9を個片化して、半硬化状態の接着剤3Aが背面に設けられた半導体素子2とする。 Then, as shown in FIG. 8 (c), and the wafer 9 singulation, the semiconductor element 2 in which the adhesive 3A in a semi-cured state is provided on the back. この状態が、図7(a)に示すボンディングツール10に支持された半導体素子2に相当する。 This state corresponds to the semiconductor device 2 supported by the bonding tool 10 shown in Figure 7 (a).
【0041】 [0041]
なお、上述のように、ボンディングツール10の下面を充填樹脂層8の上面8cに当接させながら接着剤を硬化させる方法は、半硬化状態の接着剤でなくても適用することができる。 As described above, the method of the adhesive is cured while in contact with the lower surface of the bonding tool 10 on the upper surface 8c of the filled resin layer 8 may be applied without an adhesive semi-cured. すなわち、半導体素子2を基板1に固定するための接着剤が、B−ステージ樹脂ではなく通常の接着剤であっても、半導体素子2の上面と充填樹脂層8の上面8cとを精度よく同一平面とすることができるとういう効果を得ることができる。 That is, the adhesive for fixing the semiconductor element 2 to the substrate 1, B- be an ordinary adhesive instead of a-stage resin, high accuracy and top surface of the semiconductor element 2 and the upper surface 8c of the filling resin layer 8 same it is possible to obtain the effect that shaking may be planar.
【0042】 [0042]
まず、基板1上に形成した充填樹脂層8に開口8aを形成し、半導体素子2を開口8a内に配置する。 First, the opening 8a is formed in the filling resin layer 8 formed on the substrate 1, placing the semiconductor element 2 in the opening 8a. 充填樹脂層8は、完全に硬化した状態である。 Filling resin layer 8 is a state of complete cure. 半導体素子2の背面には通常の接着剤3Bが予め塗布されている。 Conventional adhesive 3B is previously applied on the back of the semiconductor element 2. 次に、図9(a)に示すように、ボンディングツール10を下降させて、ボンディングツール10の下面が充填樹脂層8の上面8cに当接した位置でボンディングツール10の下降を止める。 Next, as shown in FIG. 9 (a), it lowers the bonding tool 10, the lower surface of the bonding tool 10 stops lowering of the bonding tool 10 in contact with the position on the upper surface 8c of the filled resin layer 8. この状態で接着剤3Bを加熱して完全に硬化させる。 And heating the adhesive 3B is fully cured in this state. 接着剤3Bが硬化した後、ボンディングツール10を充填樹脂層8の上面8cから離すと、図9(b)に示すように、充填樹脂層8の上面8cと半導体素子の上面とは精度よく同一平面となる。 After the adhesive 3B is cured, release the bonding tool 10 from the upper surface 8c of the filling resin layer 8, as shown in FIG. 9 (b), the same good precision and upper surfaces 8c and the semiconductor device of the filling resin layer 8 the plane.
【0043】 [0043]
以上のように、本明細書は以下の発明を開示する。 As described above, this specification discloses the following invention.
【0044】 [0044]
(付記1) 基板と、 (Supplementary Note 1) and the substrate,
該基板上に搭載された半導体素子と、 A semiconductor element mounted on the substrate,
該半導体素子の周囲に設けられ、前記半導体素子の高さを同じ高さになるように形成された樹脂充填層とを有する半導体装置であって、 The provided around the semiconductor element, wherein a semiconductor device having a resin filling layer formed so as to the height of the semiconductor device at the same height,
前記充填樹脂層は、半硬化状態において加熱された際に軟化し流動化する特性を有する半硬化性樹脂であり、前記充填樹脂層は前記半導体素子の側面に密着していることを特徴とする半導体装置。 The filled resin layer is a semi-cured resin having the property of softening fluidized when heated in the semi-cured state, the filled resin layer is characterized in that in close contact with the side surface of the semiconductor element semiconductor device.
【0045】 [0045]
(付記2) 付記1記載の半導体装置であって、 The semiconductor device (Supplementary Note 2) Supplementary Note 1, wherein,
前記充填樹脂層を形成する半硬化性樹脂の、半硬化状態における軟化点は60℃以上であることを特徴とする半導体装置。 The semi-cured resin forming the filled resin layer, the softening point of the semi-cured state is wherein a is 60 ° C. or higher.
【0046】 [0046]
(付記3) 付記1記載の半導体装置であって、 The semiconductor device (Supplementary Note 3) Supplementary Note 1, wherein,
前記充填樹脂層を形成する半硬化性樹脂は、B−ステージエポキシ樹脂であることを特徴とする半導体装置。 Semi-cured resin forming the filled resin layer is a semiconductor device which is a B- staged epoxy resin.
【0047】 [0047]
(付記4) 付記1記載の半導体装置であって、 The semiconductor device (Supplementary Note 4) Supplementary Note 1, wherein,
前記半導体素子は接着剤により前記基板に固定され、該接着剤は前記半硬化性樹脂よりなることを特徴とする半導体装置。 Said semiconductor element is fixed to the substrate by an adhesive, a semiconductor device adhesive is characterized by consisting of the semi-cured resin.
【0048】 [0048]
(付記5) 付記1記載の半導体装置であって、 (Supplementary Note 5) In the semiconductor device according to Note 1, wherein,
前記半導体素子の厚みは50μm以下であることを特徴とする半導体装置。 Wherein a thickness of said semiconductor element is 50μm or less.
【0049】 [0049]
(付記6) 付記1記載の半導体装置であって、 The semiconductor device (Supplementary Note 6) Supplementary Note 1, wherein,
複数個の半導体素子が前記基板上に搭載され、半導体素子間に前記充填樹脂層が設けられていることを特徴とする半導体装置。 A plurality of semiconductor elements mounted on the substrate, a semiconductor device, characterized in that said filling resin layer is provided between the semiconductor element.
【0050】 [0050]
(付記7) 半導体素子が間に配置された半硬化状態の充填樹脂層を基板上に形成し、 The (Supplementary Note 7) filled resin layer in a semi-cured state in which a semiconductor element is disposed between and formed on a substrate,
該半硬化状態の充填樹脂層を加熱して流動化させ、半導体素子と前記充填樹脂層の間の間隙に前記充填樹脂層を流動させて間隙をなくし、 Semi are fluidized by heating the filled resin layer cured state, eliminating the gap by the in flowing filled resin layer in the gap between the semiconductor element and the filler resin layer,
前記充填樹脂層を加熱して完全に硬化させることを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device characterized by completely curing by heating the filled resin layer.
【0051】 [0051]
(付記8) 付記7記載の半導体装置の製造方法であって、 A manufacturing method (Note 8) The semiconductor device according to Note 7,
前記半導体素子を前記基板に搭載した後に、前記半硬化状態の充填樹脂層を前記半導体素子の周囲に形成することを特徴とする半導体装置の製造方法。 Wherein the semiconductor device after mounting on the substrate, a method of manufacturing a semiconductor device and forming a filled resin layer of the semi-cured state around said semiconductor element.
【0052】 [0052]
(付記9) 付記7記載の半導体装置の製造方法であって、 A manufacturing method (Note 9) The semiconductor device according to Note 7,
前記半導体素子を前記基板に搭載する前に、前記半導体素子配置するための開口を有する前記半硬化状態の充填樹脂層を前記基板上に形成することを特徴とする半導体装置の製造方法。 It said semiconductor device prior to mounting to the substrate, method of manufacturing a semiconductor device and forming a filled resin layer of the semi-cured state having an opening for placing the semiconductor device on the substrate.
【0053】 [0053]
(付記10) 付記7記載の半導体装置の製造方法であって、 A manufacturing method (Note 10) The semiconductor device according to Note 7,
前記半硬化状態の充填樹脂層を、印刷法を用いて前記基板に転写することを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device, characterized in that said filling resin layer in a semi-cured state, transferred to the substrate by a printing method.
【0054】 [0054]
(付記11) 付記7記載の半導体装置の製造方法であって、 (Supplementary Note 11) In the method of Supplementary Note 7, wherein,
前記半硬化状態の充填樹脂層の側面と前記半導体素子の側面との間の距離を、前記半導体素子の厚みより小さくなるように前記半硬化状態の充填樹脂層を前記基板上に形成することを特徴とする半導体装置の製造方法。 That said distance between the side surface of the filling resin layer in a semi-cured state with the side surface of the semiconductor element, to form a filled resin layer of the semi-cured state to be less than the thickness of the semiconductor element on the substrate the method of manufacturing a semiconductor device according to claim.
【0055】 [0055]
(付記12) 付記7記載の半導体装置の製造方法であって、 A manufacturing method (Note 12) The semiconductor device according to Note 7,
前記硬化状態の充填樹脂層を加熱して流動化させる前に、前記充填樹脂層と前記半導体素子にわたってフィルムを貼り付けることを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device characterized by prior to fluidize by heating the filled resin layer of the cured paste the film over the semiconductor element and the filler resin layer.
【0056】 [0056]
(付記13) 付記12記載の半導体装置の製造方法であって、 (Supplementary Note 13) The method of manufacturing a semiconductor device according to Note 12, wherein,
前記半硬化状態の充填樹脂層において流動化させたくない部分の前記フィルムの部分を除去しておくことを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device, characterized in that to keep removing portions of the film of the portion not desired to fluidize the filler resin layer of the semi-cured state.
【0057】 [0057]
(付記14) 付記13記載の半導体装置の製造方法であって、 (Supplementary Note 14) In the method of Supplementary Note 13, wherein,
前記フィルムとして感光性フィルムを用い、部分的に感光させて除去することを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device, wherein the using the photosensitive film as a film, partially exposed to light is removed.
【0058】 [0058]
(付記15) 付記7記載の半導体装置の製造方法であって、 A manufacturing method (Note 15) The semiconductor device according to Note 7,
前記半硬化状態の充填樹脂層を、100℃以上の温度で加熱して流動化させることを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device, characterized in that said filling resin layer in a semi-cured state, to flow by heating at 100 ° C. or higher.
【0059】 [0059]
(付記16) 付記7記載の半導体装置の製造方法であって、 A manufacturing method (Note 16) The semiconductor device according to Note 7,
前記半硬化状態の充填樹脂層の厚みが、前記半導体素子の厚みより大きくなるように形成することを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device wherein the thickness of the filled resin layer in a semi-cured state, and forming so as to be larger than the thickness of the semiconductor device.
【0060】 [0060]
(付記17) 付記7記載の半導体装置の製造方法であって、 (Supplementary Note 17) In the method of Supplementary Note 7, wherein,
前記半導体素子に接着剤を5μm〜20μmの厚みに塗布し、該接着剤により前記半導体素子を前記基板に固定することを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device, characterized in that said adhesive is applied to a thickness of 5μm~20μm the semiconductor element, to fix the semiconductor element to the substrate by adhesive.
【0061】 [0061]
(付記18) 付記17記載の半導体装置の製造方法であって、 (Supplementary Note 18) A manufacturing method of a semiconductor device according appendix 17,
前記接着剤として前記半硬化性樹脂を用いることを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device which is characterized by using the semi-cured resin as the adhesive.
【0062】 [0062]
(付記19) 付記18記載の半導体装置の製造方法であって、 A manufacturing method (Note 19) The semiconductor device according to Note 18, wherein,
前記接着剤を100℃以下の温度で加熱して半硬化状態とすることを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device characterized by a heating to a semi-cured state the adhesive at 100 ° C. or lower.
【0063】 [0063]
(付記20) 付記7記載の半導体装置の製造方法であって、 (Supplementary Note 20) In the method of Supplementary Note 7, wherein,
前記半導体素子として、厚みが50μm以下の半導体素子を用いることを特徴とする半導体装置の製造方法。 Wherein the semiconductor device, a method of manufacturing a semiconductor device characterized by thickness using the following semiconductor devices 50 [mu] m.
【0064】 [0064]
(付記21) 開口を有する充填樹脂層を基板上に形成し、且つ半硬化性樹脂よりなる接着剤が設けられた半導体素子を準備し、 (Supplementary Note 21) The filling resin layer having an opening is formed on a substrate, preparing a semiconductor device and made of a semi-cured resin adhesive is provided,
該開口に前記半導体素子を配置し、 The semiconductor element arranged in the opening,
半硬化状態における前記接着剤を加熱して流動化させながら、前記半導体素子を前記接着剤を介して前記基板に対して押圧し、 While heated to fluidize the adhesive in a semi-cured state, it is pressed against the substrate through the adhesive the semiconductor element,
前記半導体素子の上面が前記充填樹脂層の上面と同一面となる位置で前記半導体素子を維持しながら、前記接着剤を加熱し硬化させることを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device, characterized in that said keeping said semiconductor element at a position where the upper surface of the semiconductor element becomes top flush of the filled resin layer is cured by heating the adhesive.
【0065】 [0065]
(付記22) 付記21記載の半導体装置の製造方法であって、 A manufacturing method (Note 22) The semiconductor device according to Note 21, wherein,
前記半導体装置の上面をボンディングツールの下面で支持し、該ボンディングツールの下面が前記充填樹脂層の上面に当接した状態で、前記接着剤を硬化させることを特徴とする半導体装置の製造方法。 Wherein the top surface of the semiconductor device is supported by the lower surface of the bonding tool, with the lower surface of the bonding tool is brought into contact with the upper surface of the filled resin layer, a method of manufacturing a semiconductor device characterized by curing the adhesive.
【0066】 [0066]
(付記23) 開口を有する充填樹脂層を基板上に形成し、且つ接着剤が設けられた半導体素子を準備し、 A filling resin layer having a (Supplementary Note 23) opening is formed on a substrate, preparing a semiconductor device and the adhesive is provided,
前記半導体装置の上面をボンディングツールの下面で支持して該開口に前記半導体素子を配置し、 It said semiconductor elements are arranged to the opening in favor of the upper surface of the semiconductor device in the lower surface of the bonding tool,
ボンディングツールの下面が前記充填樹脂層の上面に当接した状態で、前記接着剤を硬化させることを特徴とする半導体装置の製造方法。 In a state where the lower surface of the bonding tool is brought into contact with the upper surface of the filled resin layer, a method of manufacturing a semiconductor device characterized by curing the adhesive.
【0067】 [0067]
【発明の効果】 【Effect of the invention】
上述の発明によれば、充填樹脂層の材料として半硬化性樹脂を用いることにより、半導体素子と充填樹脂層との間の間隙を、軟化した半硬化性樹脂で充填することができ、半導体素子と充填樹脂層との間に間隙がない半導体装置を容易に製造することができる。 According to the invention described above, by using a semi-cured resin as the material of the filling resin layer, the gap between the semiconductor element and the filling resin layer, can be filled with a semi-cured resin was softened, the semiconductor device the semiconductor device has no gap between the filling resin layer can be easily manufactured.
【0068】 [0068]
また、本発明によれば、半導体素子と充填樹脂層との間の間隙を接着剤により充填することができ、且つ半導体素子の上面と充填樹脂層の上面とを精度よく同一平面とすることができる。 Further, according to the present invention, the gap between the semiconductor element and filling the resin layer can be filled with an adhesive, and a top surface of the upper surface and the filling resin layer of the semiconductor device be accurately flush it can. 接着剤間隙を充填することができるような量が塗布され、半導体素子による押圧力により間隙を充填していくので、接着材は基板と完全に密着し、接着剤の濡れ不足や這い上がり現象が防止される。 The amount such that it can be filled with an adhesive gap is applied, so continue to fill the gap by the pressing force by the semiconductor device, the adhesive is completely adhered to the substrate, is insufficient wetting and creeping behavior of the adhesive It is prevented.
【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS
【図1】本発明の第1実施例による半導体装置の製造工程を説明するための図である。 1 is a diagram for a manufacturing process will be described a semiconductor device according to a first embodiment of the present invention.
【図2】充填樹脂層の形成工程を説明するための図である。 Figure 2 is a diagram for explaining a process of forming the filled resin layer.
【図3】充填樹脂層の形成工程を説明するための図である。 3 is a diagram for explaining a process of forming the filled resin layer.
【図4】充填樹脂層と半導体素子の厚みとの関係を説明するための図である。 4 is a diagram for explaining a relationship between the thickness of the filled resin layer and the semiconductor element.
【図5】本発明の第2実施例による半導体装置の製造工程を説明するための図である。 5 is a diagram for a manufacturing process will be described a semiconductor device according to a second embodiment of the present invention.
【図6】本発明の第3実施例による半導体装置の断面図である。 6 is a cross-sectional view of a semiconductor device according to a third embodiment of the present invention.
【図7】本発明の第4実施例による半導体装置の製造工程を説明するための図である。 7 is a diagram for a manufacturing process will be described a semiconductor device according to a fourth embodiment of the present invention.
【図8】半導体素子に接着剤を塗布して半硬化状態とする工程を説明するための図である。 8 is a diagram for explaining a step of applying an adhesive to a semiconductor device and a semi-cured state.
【図9】充填樹脂層の上面と半導体素子の上面とを同一平面にする方法を説明するための図である。 9 is a diagram for explaining a method of the same plane with the upper surface of the upper surface of the semiconductor device of the filling resin layer.
【符号の説明】 DESCRIPTION OF SYMBOLS
1 基板2 半導体素子3,3A,3B 接着剤4,8 充填樹脂層6 配線層5 感光性フィルム7 ハンダボール9 ウェハ10 ボンディングツール 1 substrate 2 the semiconductor element 3, 3A, 3B adhesive 4,8 filler resin layer 6 wiring layers 5 photosensitive film 7 solder balls 9 wafer 10 bonding tool

Claims (6)

  1. 回路形成面が基板と反対方向に向いた半導体素子が間に配置された半硬化状態の充填樹脂層を該基板上に形成し、 The filling resin layer in a semi-cured state in which the circuit forming surface is disposed between the semiconductor element facing in the direction opposite to the substrate is formed on the substrate,
    該半硬化状態の充填樹脂層を加熱して流動化させ、前記半導体素子と前記充填樹脂層の間の間隙に前記充填樹脂層を流動させて間隙をなくし、 Heating the filled resin layer of semi-cured state by fluidizing eliminate gaps the by flow filling the resin layer in the gap between the filler resin layer and the semiconductor element,
    前記充填樹脂層を加熱して完全に硬化させる ことを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device characterized by completely curing by heating the filled resin layer.
  2. 請求項記載の半導体装置の製造方法であって、 A method according to claim 1, wherein,
    前記半硬化状態の充填樹脂層の側面と前記半導体素子の側面との間の距離を、前記半導体素子の厚みより小さくなるように前記半硬化状態の充填樹脂層を前記基板上に形成することを特徴とする半導体装置の製造方法。 That said distance between the side surface of the filling resin layer in a semi-cured state with the side surface of the semiconductor element, to form a filled resin layer of the semi-cured state to be less than the thickness of the semiconductor element on the substrate the method of manufacturing a semiconductor device according to claim.
  3. 請求項記載の半導体装置の製造方法であって、 A method according to claim 1, wherein,
    前記硬化状態の充填樹脂層を加熱して流動化させる前に、前記充填樹脂層と前記半導体素子にわたってフィルムを貼り付けることを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device characterized by prior to fluidize by heating the filled resin layer of the cured paste the film over the semiconductor element and the filler resin layer.
  4. 請求項記載の半導体装置の製造方法であって、 A method of manufacturing a semiconductor device according to claim 3,
    前記半硬化状態の充填樹脂層において流動化させたくない部分の前記フィルムの部分を除去しておくことを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device, characterized in that to keep removing portions of the film of the portion not desired to fluidize the filler resin layer of the semi-cured state.
  5. 開口を有する充填樹脂層を基板上に形成し、且つ半硬化性樹脂よりなる接着剤が設けられた半導体素子を準備し、 A filling resin layer having an opening is formed on a substrate, preparing a semiconductor device and made of a semi-cured resin adhesive is provided,
    該開口に前記半導体素子を配置し、 The semiconductor element arranged in the opening,
    半硬化状態における前記接着剤を加熱して流動化させながら、前記半導体素子を前記接着剤を介して前記基板に対して押圧し、 While heated to fluidize the adhesive in a semi-cured state, it is pressed against the substrate through the adhesive the semiconductor element,
    前記半導体素子の上面が前記充填樹脂層の上面と同一面となる位置で前記半導体素子を維持しながら、前記接着剤を加熱し硬化させる ことを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device, characterized in that said keeping said semiconductor element at a position where the upper surface of the semiconductor element becomes top flush of the filled resin layer is cured by heating the adhesive.
  6. 請求項記載の半導体装置の製造方法であって、 A method according to claim 5, wherein,
    前記半導体装置の上面をボンディングツールの下面で支持し、該ボンディングツールの下面が前記充填樹脂層の上面に当接した状態で、前記接着剤を硬化させることを特徴とする半導体装置の製造方法。 Wherein the top surface of the semiconductor device is supported by the lower surface of the bonding tool, with the lower surface of the bonding tool is brought into contact with the upper surface of the filled resin layer, a method of manufacturing a semiconductor device characterized by curing the adhesive.
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