JPH0357386A - Picture signal reproducing device - Google Patents

Abstract

PURPOSE:To accurately reproduce an original picture by controlling the write of a reproduction picture signal into a memory according to a clock signal and a synchronizing signal based on a pilot signal separated from the reproduction picture signal. CONSTITUTION:A pilot signal is extracted from a reproduction picture from a disk 1 via a BPF band a clock synchronously with a pilot signal is formed via a PLL comprising a phase comparator 14, a VCO 15, an LPF 17 or the like, retarded by a phase shifter 19 to control an A/D converter 11. on the other hand, a corrected simulating horizontal synchronizing signal HD' is outputted from a D FF by using a clock from a 1/2 frequency divider 16 and a horizontal synchronizing signal HD separated from the reproduction picture signal via a synchronizing separator circuit 10 and fed to a memory controller 13 controlling a memory 20. Then a digital picture signal via a converter 11 is written in the memory 20 while the deviation of write onto the disk 1 is corrected. Thus, when the memory 20 is read by a normal clock from a clock oscillator 24, the original picture is accurately reproduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image signal reproducing device for reproducing image signals recorded on a recording medium.

[Prior Art] For example, an electronic still video system has been known as a system for recording image signals on a recording medium.

The electronic still video system reproduces still image signals recorded on a magnetic disk called a video floppy and displays them on a television monitor or video printer.

In addition, in an electronic still video system, the resolution of still images recorded on the video floppy depends on the image sensor (for example, Charge Coupled Devi (:e, etc.) of the video camera section used to form the still image signal).
It depends on the number of pixels.

That is, the horizontal resolution of a still image signal is limited by the number of horizontal pixels of the image sensor, and the vertical resolution is determined by the number of scans and liIs defined by the current television signal system (for example, the NTSC system).

Therefore, in order to improve the resolution, 500 pixels in the vertical direction,
Two image sensors having a pixel count of 1200 pixels in the horizontal direction are prepared, and the two image sensors are installed at positions shifted by 172 pixels in the vertical direction with respect to the optical image to be formed. A system is being considered in which a high-resolution still image signal is generated using the image signal formed by the system, and is recorded on a recording medium and reproduced.

In the above system, the positional relationship of pixels on the imaging planes of the first and second imaging elements is shown in FIG.

Out of the image signals output from each image sensor, the signals corresponding to the pixels marked with ○ in Figure 3 are sampled, and the sampled image signals are transferred onto a video floppy using a two-channel magnetic head. recorded, forming a total of four tracks.

4.1k is a diagram showing a recording pattern of four tracks formed on a video floppy, and tracks A and C in FIG. 4 record image signals output from the first image pickup device. Track B. D records an image signal output from the second image sensor.

Also, during playback, as described above, the image signals recorded on the four tracks on the video floppy containing the still image signals are played back, and the played image signals are transferred to the memory.
By reconstructing and performing further interpolation processing,
A still image signal having a resolution of 200 pixels and 1000 pixels in the vertical direction can be obtained, and by supplying this to a television monitor or a video printer, a high resolution still image can be displayed.

By the way, as mentioned above, a part of the signal is extracted from the image signal output from the image sensor, and the extracted signal is converted into a video signal.
The transmission method of recording on a video floppy and reconstructing the signal reproduced from the video floppy on the memory is a kind of analog transmission of sampled values, and the total amplitude and phase characteristics of the transmission path are strictly controlled. Furthermore, when reconstructing the image signal sampled during recording during playback, time axis fluctuations that occur in the recording and playback systems must be accurately corrected in order to resample accurately. Must be. Therefore, as shown in Fig. 5, a pilot signal for time axis correction is continuously frequency-multiplexed between the color difference FM modulation signal band and the luminance FM modulation signal band, and is recorded. forming a sampling clock signal having the same jitter precept as the sampling clock signal, and sampling the reproduced image signal according to the sampling clock signal;
A structure has been proposed in which the image signal is temporarily stored in a memory or the like, and the time axis fluctuation is corrected by reading out the stored image signal according to an accurate clock signal with no time axis fluctuation.

[Problems to be Solved by the Invention] Incidentally, in the electronic still video system as described above, when the FM modulated image signal reproduced from the video floppy is demodulated on the reproduction side and stored in the memory, the demodulated image is Generally, the horizontal address of the image signal storage memory is reset in synchronization with the horizontal synchronization signal and vertical synchronization signal added to the signal. , for example, as shown in Figure 7(a),
If waveform distortion occurs in the synchronization signal part of the image signal after 4, or if the SN is poor, even if the waveform of this part is shaped, the time axis of the edge part of the waveform will change as shown in Figure 7(b). The timing of the edge part of the sync signal is distorted,
When the horizontal address of the image signal storage memory is reset, the image signal will be stored at a different address from the normal address of the memory.In this way, the image signal stored in the memory can be read using an accurate readout clock signal. Even if the image is read out, the atres at the time of 3-recording are shifted, so the restored image will also be shifted, making it impossible to accurately restore the original image.

SUMMARY OF THE INVENTION An object of the present invention is to provide an image signal reproducing apparatus that can solve the above-mentioned problems and accurately restore an original image signal from a signal recorded on a recording medium.

[Means for Solving the Problem] The image signal reproducing device of the present invention is a device for reproducing an image signal from a recording medium in which a pilot signal is frequency-multiplexed and recorded on an image signal, and the image signal is reproduced from a recording medium. a storage means for storing a reproduced image signal; a clock signal generating means for generating a clock signal phase-synchronized with the reproduced pilot signal reproduced from the recording medium; and a synchronization signal generated from the reproduced image signal reproduced from the recording medium. synchronization signal separation means for separating and outputting; control means for controlling storage operations in the storage means according to the clock signal generated by the clock signal generation means; and the synchronization signal separated by the synchronization signal separation means. It is equipped with the following.

[Operation] With the above configuration, it becomes possible to accurately restore the original RI image signal from the signal recorded on the recording medium.

[Example] The present invention will be explained below using an example of the present invention. FIG. 1 is a diagram showing a schematic configuration of an embodiment of the present invention in which the present invention is applied to a playback device in an electronic still video system.

In order to simplify the explanation, the embodiment shown in FIG. 1 shows only the luminance signal processing system, and the explanation regarding the color signal processing system will be omitted.

In Fig. 1, l is a video floppy disk, on which pilot signals are multiplexed as shown in section 5 above, and image signals, each screen consisting of 4 fields, are arranged in a track pattern as shown in Fig. 4 above. Fifty recording tracks are concentrically arranged, and the video floppy l is rotated once by a motor 2 at l/60 seconds during playback operation.

Of the tracks formed on the video floppy 1, a desired track to be played is specified by operating an operation section (not shown), and a head moving mechanism (not shown) is used to specify the track to be played back. The magnetic head 3 is moved onto the track that has been moved, and the magnetic head 3 reproduces the signal recorded on the destination track and supplies it to the reproduction amplifier 4. Then, the reproduction amplifier 4 amplifies the signal reproduced by the magnetic head 3, and a high-pass filter (HPF) 5. It is supplied to a band pass filter (BPF) 6.

HPF5 uses the signal supplied from reproduction amplifier 4 to
The modulated luminance signal is separated, and the separated FM modulated luminance signal is
The BPF 6 separates the pilot signal from the signal supplied from the regenerative amplifier 4 and supplies the separated pilot signal to an automatic gain control (AGC) circuit 8 .

and. In the FM demodulator 7, the FM modulated luminance signal separated from the reproduced signal by the HPF 5 is demodulated into the original luminance signal, and then in the de-emphasis circuit 9, processing opposite to the emphasis processing performed at the time of recording is performed. , a synchronizing signal separation circuit lO, and an analog/digital (A/D) converter 11. The synchronization signal separation circuit IO separates the horizontal synchronization signal HD and vertical synchronization signal VD added to the slope signal supplied from the de-emphasis circuit 9, and HD is 1/2 H killer circuit 1
2, VD is supplied to the memory controller l3. On the other hand, the pilot signal separated from the reproduced signal in the BPF 6 is subjected to WR mode in the AGC circuit 8 so as to have a constant amplitude, and is supplied to one terminal of the phase comparator l4.

The other terminal of the phase comparator l4 has a free running frequency of approximately 6 f.
The oscillation signal generated by the SC's voltage controlled oscillator (VCO) 15 is divided by a 1/7 frequency divider 16 to a frequency of 1/7, that is, approximately 195fh (fh is the Kihira scan frequency), and is further passed through a low-pass filter. (LPF) 17 eliminates the high frequency component and supplies it, and a voltage signal corresponding to the phase difference between the pilot signal output from the AGC circuit 8 and the signal output from LPF 17 is output from the phase comparator 14. is output.

The signal output from the phase comparator 15 is then supplied to the loop filter l8, which is
P L L (Pha
The frequency of the oscillation signal output from the VCO 15 is controlled according to the voltage signal output from the loop filter 18, which determines the loop gain of the Locked Loop) circuit. The time axis fluctuation is the same as that of the reproduction signal reproduced from the floppy disk, and the frequency is approximately 6 fH (approximately 1 3 6
A clock signal of 5 f I+) is generated and the phase shifter l
9 is supplied. , the phase shifter 19 is the video floppy 1
according to each playback track position. By delaying the clock signal output from vcots, the phase difference between the reproduced luminance signal, which is different for each reproduced track I0-, and the {1f raw pilot signal, the timing that is sunblinked by the clock signal '-]- can be adjusted. There is a method to ensure that there are no differences between each playback track. Then, as mentioned above, the phase shifter l
At 9, the clock signal delayed according to the playback track position is supplied to the A/D converter l1 and the memory controller l3.

By the way, as mentioned above, the A/D converter 1l is supplied with a signal once from the de-emphasis circuit 9, and ^/D
The converter 11 A/D converts the luminance signal supplied from the de-emphasis circuit 9 in accordance with the clock signal output from the phase shifter 19, outputs it, and supplies it to the memory 20.
The digital luminance signal supplied from the A/D converter 'jAll is stored in the memory 20 whose write operation is controlled by the memory controller l3.

By the way, as mentioned above, in the synchronization signal separation circuit IO,
The HD separated from the reproduced luminance signal is connected to the l/2 killer circuit 1.
2, the 1/2 H killer circuit 12 removes the equivalent pulse from the supplied HD, and the HD from which the equivalent pulse has been removed (see Figure 2 (a)) is converted into a monostable multi-high inflator. (mono multivibrator) 21.

Then, in the mono multipitor 21, the 21st m (a
) from the HD standing f retiming with the equivalent pulse shown in T. A pulse signal with a pulse width of (second port (b)
(see) occurs. Note that T is the period 1/f of the pilot signal. =]/195f. and memory 20
The time required for resetting is set. As mentioned above, the pulse signal output from the mono multivibrator 2l is applied to the D flip-flop 22.
is supplied to the ata terminal (D in the figure), and is also supplied to the VCO1
5 and 177 by the 1/'7 frequency divider l6.
The frequency-divided clock signal (see FIG. 2(c)) which is phase-synchronized with the regenerated pilot signal is supplied to the Clock terminal (CK in the figure) of the D flip-flop 22, and the output terminal (CK in the figure) of the D flip-flop 22 is Same member Q〉
From then on, the pulse signal shown in Fig. 2(b) is latched by the rise of the clock signal shown in Fig. 2(c) (arrow in the figure), and a pseudo Kihira synchronization signal as shown in Fig. 2(d) is generated. HD' is output and supplied to the memory controller 13.

It should be noted that the pseudo horizontal synchronization signal HD' formed as described above
is a signal whose phase is precisely synchronized with the clock signal generated by the VCO 15 and whose edges are not disturbed.

The memory controller 3 is a pseudo horizontal synchronizing signal HD output from the D flip-flop 22 as described above.
' and the vertical synchronization signal VD separated by the synchronization signal separation circuit 10, a specified write address is formed in the memory 20, and the digital luminance signal output from the A/D converter 11 is output from the phase shifter 19. The data is stored in the memory 20 in synchronization with the clock signal.

Then, the luminance signals (pixels indicated by circles in FIG. 6) recorded on l screens, that is, the four recording tracks on the video floppy l, are temporarily stored, and the luminance signals are stored in the memory 20. When the operation is completed, the memory controller 13 controls the interpolation processing circuit 23, and uses the luminance signal stored in the memos 20 to detect the portions not recorded on the video floppy 1 (pixels marked with an x in FIG. 7). ), and the shaped interpolated luminance signal is also stored in the memory 20. As described above, when the storage of the luminance signal reproduced from the video floppy l and the interpolated luminance signal formed by the interpolation processing circuit 23 in the memory 20 is completed. The memory controller l3 reads out the luminance signal stored in the memory 20 according to an accurate clock signal without time base fluctuations supplied from the clock oscillator 24, and supplies it to the digital-to-analog (D/A) converter 25. do. Then, it is read out from the memory 20 and sent to the D/A converter 26.
The luminance signal supplied to the clock oscillator 24 is D/A converted according to the clock signal generated by the clock oscillator 24, and is outputted as a luminance signal without time axis fluctuation to the output terminal 26.
It is output from

As explained above, in this embodiment, the luminance signal reproduced from the video floppy is temporarily stored in the memory in synchronization with a clock signal that includes time axis fluctuations that occur during reproduction, and then stored in the memory. By reconstructing the luminance signal for one screen and reading the luminance signal stored in memory in synchronization with an accurate clock signal that does not have time axis fluctuations, the time that occurs in the reproduced luminance signal during playback can be calculated. When removing axis fluctuations, a pseudo-horizontal synchronization signal is formed in synchronization with a write clock signal synchronized with a reproduction pilot signal without using a horizontal synchronization signal separated from the reproduction luminance signal to set the address for the memory. Since this is done using , it becomes possible to accurately restore the luminance signal without time axis fluctuations.

Although the above embodiment has been explained using a reproduction device having a luminance signal processing system, the present invention is not limited to this, and the present invention can be similarly applied to a device having a color signal processing system. It is.

[Effects of the Invention] As explained above, according to the present invention, it is possible to provide an image signal reproducing device that can accurately restore an original image signal from a signal recorded on a recording medium. You will be able to do this.

[Brief explanation of drawings]

FIG. 1 shows one embodiment of the present invention in which the present invention is applied to a playback device in an electronic still video recording system.
This is a diagram schematically showing the configuration. FIG. 2 is a diagram showing a timing chart of some signals in the reproducing apparatus shown in FIG. 1. FIG. 3 is a diagram showing the positional relationship of pixels on the imaging surfaces of two image sensors in an electronic still video system. Figure 4 (2l) is a diagram showing a recording track pattern formed on a video floppy in an electronic still video system. Figure 5 is a diagram showing frequency allocation of pilot signals in an electronic still video system. Figure 6 is a diagram showing the positional relationship between recording pixels and interpolation pixels in an electronic still video system. Figure 7 is a diagram to explain the waveform deterioration of the horizontal synchronization signal that occurs during playback. ...Video floppy l3...Memory controller l5...vC0 20...Memory 21...Mono multi-hybrator 22...-D flip-flop 24...Clock oscillator 3rd group 1st imaging Miao Higashi 2 Image scratching elements No. 5 Fig. 7

Claims (1)

[Scope of Claims] A device for reproducing an image signal from a recording medium in which a pilot signal is frequency-multiplexed and recorded on an image signal, comprising: a storage means for storing the reproduced image signal reproduced from the recording medium; and the recording medium. a clock signal generating means for forming a clock signal phase-synchronized with a reproduced pilot signal reproduced from a medium; a synchronizing signal separating means for separating and outputting a synchronizing signal from a reproduced image signal reproduced from the recording medium; and the clock. An image signal reproducing apparatus comprising: a control means for controlling a storage operation in the storage means according to a clock signal generated by the signal generation means and a synchronization signal separated by the synchronization signal separation means.