JPH0356480B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electronic musical instrument that can effectively perform self-study on performance by determining the state of performance on a keyboard section.

[Conventional technology]

To practice playing a keyboard instrument, students operate the keys in accordance with the musical score, and repeat this process to faithfully reproduce the content expressed in the musical score.The teacher is responsible for determining the content of the performance. Listen to and do it. That is, the teacher points out mistakes while listening to the student's performance, and instructs the student to use accurate keystrokes and develop a good sense of music. Therefore, this type of teaching method provides a 1:1 relationship between teacher and student.
Although it is a very effective individual lesson,
It is extremely difficult to conduct group lessons where one teacher has a large number of students.

In addition, when teachers themselves judge and grade students' performance techniques, it is difficult to objectively assess the occurrence of errors in performance numerically, and they judge the progress of performance practice only subjectively. There must be. Therefore, the direction of instruction for students' performance practice is also
This requires relying on the teacher's subjective judgment, making it difficult to always provide appropriate instruction.

[Problems to be Solved by the Invention] This invention has been made in view of the above-mentioned points. When practicing playing a keyboard instrument, the content of the practice, especially whether the correct keys are played at the correct timing. It is possible to objectively monitor the errors at all times, and it is possible to point out to the student practicing the performance the state of the occurrence of errors in the performance, especially at the point when the student makes the error. The present invention aims to provide an electronic musical instrument in which the effect of practicing performance timing can be effectively exhibited.

[Means for Solving the Problems] That is, in the electronic musical instrument according to the present invention, performance information corresponding to the practice piece to be played is sequentially read out as the performance progresses, and the keyboard on which the student is practicing playing is read out sequentially as the performance progresses. The performance information is sequentially compared with the performance information from the above, and in particular, the invention timings of both of the performance information are compared to determine whether the keyboard operation is correct or incorrect.The results of this determination are successively displayed.

[Operation] In the electronic musical instrument configured as described above, the performance information set in the storage section is sequentially read out, and the student proceeds with performance practice on the keyboard section in accordance with this. The performance information generated by the keyboard section and the performance information read from the storage device are successively compared as the performance progresses, and erroneous operation of the keyboard section is detected. . In this case, in particular, the pitch and the occurrence timing corresponding to the key-on of both pieces of performance information are compared, and it is determined whether the operation on the keyboard was performed at the correct pitch and at the correct timing, and the judgment result is is displayed each time. Therefore, as the students practice their performance, they are able to confirm the occurrence of errors as the performance progresses, which means that the practice effect is equivalent to that of direct instruction from the teacher, and the performance of the ensemble is improved. It is particularly effective for practicing the important musical tones/voice start timings.

[Embodiment of the Invention] An embodiment of the invention will be described below with reference to the drawings. FIG. 1 schematically shows this configuration, and performance information representing an exercise piece to be performed is written and set in a storage device 11 such as RAN. The performance information written in this storage device 11 is, for example, a magnetic recording part 1 formed on the musical score 12.
2a, and by setting this musical score 12 on, for example, a musical instrument music stand, it can be read by a reading device 13 attached to this music stand. The performance information read by the reading device 13 is then written into the storage device 11.

In this storage device 11, for example, musical notes (notes or rests) written in a musical score 12 are written and set in address order along with note length information in accordance with the order. , the note information (note information, that is, pitch information and note length information or rest information [note information without pitch information]) corresponding to each note is sequentially addressed and read out. In this case, the readout circuit 14 is supplied with a tempo clock signal from a tempo oscillator 15 used for automatic rhythm generation, which will be described later, and measures a time interval corresponding to note length information to obtain pitch information. They are read out sequentially every time the time corresponding to the note length elapses. The pitch information read out by the readout circuit 14 is sequentially latched and stored in the data latch circuit 16.

On the other hand, a student practicing playing operates the keys on the keyboard 17. The keyboard 17 generates performance information including timing information, pitch information representing the pitch of the operated key, and note length information in response to key operations. At step 18, a musical tone signal is obtained by appropriately forming a musical tone based on the performance information obtained from the key performance operation.
This musical tone signal is suitably amplified by an amplifier 19 and supplied to a speaker 20, where it is produced as a performance sound.

Performance information associated with key operations from the keyboard 17 is supplied together with the latched note information from the data latch circuit 16 to a correctly pressed key determination circuit 21, and the two pieces of information are compared. Then, the key corresponding to the musical note information (pitch information) latched in the data latch circuit 16 is
When it is determined that the keyboard 17 has been operated correctly, a correct key press signal is generated and supplied to the scoring circuit 22.

Parameter information from a parameter counter 23 is also supplied to this scoring circuit 22 . This population counter 23
For example, the number of musical note information read out sequentially is counted based on the information from the data latch circuit 16, and the scoring circuit 22 determines the correct answer based on the relationship between the exact number of pressed keys and the count value of the parameter counter 23. A score such as a percentage is calculated and the score is displayed on the display circuit 24.

On the other hand, the tempo clock signal from the tempo oscillator 15 is supplied to an automatic rhythm generator 25. The automatic rhythm generator 25 includes a counter that counts the supplied tempo clock signal.
The binary count value information is appropriately combined to form various rhythm pattern signals, and a rhythm sound source signal based on the selected type of rhythm pattern signal is generated. This rhythm sound source signal is then supplied to the amplifier 19 so that an automatic rhythm performance sound can be obtained from the speaker 20. In this case, the automatic rhythm generator 25 is driven and controlled in response to a start command from the readout circuit 14.

FIG. 2 shows in detail the storage information readout control unit shown surrounded by a chain line in FIG. It will be done. The format of the information stored in this storage device 11 is, for example, a combination of uk (upper keyboard) information representing the pitch and note length (LENGTH) information representing the note length, as shown in FIG. Addresses are arranged serially. Specifically, after the information "uk1" for the first note, there is the note length information "LENGTH1", followed by the information "uk2" and "LENGTH" for the next note.
2''... Continuous in series, each piece of information is read out in sequence in response to address conversion by the address counter 26. Finally, the end (FINISH) indicates the end of the performance song.
Information is set.

In this case, the uk information consists of a uk mark that identifies the note and a key code that expresses the pitch, and the note length information consists of a note length mark and numerical information that expresses the length. And, if the note information is a rest,
The above key code is expressed as all "0".

Information read from storage device 11 in response to the address designation from address counter 26 is supplied to latch circuits 27 and 28. The latch circuits 27 and 28 are given latch commands by mark detection signals from a uk mark detection circuit 29 and a note length mark detection circuit 30, respectively.
For the mark detection circuits 29 and 30, respectively,
The uk mark and note length mark are detected from the information read from the storage device 11. In the case of the latch circuit 27, the key code indicating the pitch is
Numerical information indicating the note length is stored in the latch circuit 28 in a latch manner.

The detection signal from the uk mark detection circuit 29 is further supplied to an AND circuit 31 and a one-shot circuit 32, and the output signal from this one-shot circuit 32 is driven by a tempo lock signal TCL (for example, TCL = quarter note x 12). The signal is output as a key-off signal AΔ1 corresponding to the UK mark reading through a delay circuit 33 consisting of a delayed flip-flop. In addition, the AND circuit 31 has
Further, an output signal is supplied from an OR circuit 34 that detects the presence of a key code whose read key code from the storage device 11 is not all "0", and a signal corresponding to the presence of a note excluding a rest is generated from an AND circuit 31. to be done. This signal is then supplied to a one-shot circuit 35, and the one-shot pulse signal is taken out as a key-on signal AΔ2 serving as sound generation start timing information via a delay circuit 36 driven by the signal TCL.

The latch information stored in the latch circuit 28 is compared with the count value of a note length counter 38 which counts the tempo clock signal TCL in a comparator circuit 37. The note length counter 38 is reset each time the note length information is read out by the detection signal from the note length mark detection circuit 30. Therefore, after the note length information is read out from the storage device 11, , when the time corresponding to the note length information has elapsed, the count value of the counter 38 and the information stored in the latch circuit 28 match, and the equal signal EQ is generated from the comparison circuit 37.

The equal signal from the comparison circuit 37 is differentiated by a differentiating circuit 39 and supplied to an OR circuit 40, which gives a set command to a flip-flop circuit 41 for address control. This flip-flop circuit 41
is reset by the detection signal from the note length mark detection circuit 30, and at the time of reset, a gate signal is given to the AND circuit 42, and the clock signal φ is supplied to the address counter 26 as a counting step signal. It becomes.

Further, this electronic musical instrument is provided with a start switch 43 that generates a start command. The start switch 43 is constructed as a self-resetting type, and generates a signal of "1" when operated, and a start pulse signal is generated from the differentiating circuit 44 in response to this signal. The output pulse signal from the differentiating circuit 44 is used as a start signal STRT for initialization as appropriate, and sets the flip-flop circuit 41 via the OR circuit 40.
The other flip-flop circuit 45 is reset.
In its set state, this flip-flop circuit 45 receives a signal from the differentiating circuit 44 as well as an OR circuit 46.
The output signal from the OR circuit 46 is supplied to the address counter 26 as a reset command. Moreover, this flip-flop circuit 45
supplies a rhythm start command to the automatic rhythm generating device 25 in the reset state, and gives an execution command for automatic rhythm performance. This flip-flop circuit 45 is set by a detection signal from an end code detection circuit 47, and this detection circuit 47 detects the reading of finish (FINISH) information from the information read from the storage device 11.

That is, when a start command is given by turning on the switch 43, the flip-flop circuit 41 is set by the differential pulse signal from the differentiating circuit 44, the flip-flop circuit 45 is reset, and the output signal from the OR circuit 46 is reset. Confirm that the address counter 26 has been reset with
Initialize this. Then, by setting the flip-flop circuit 41, a gate signal is given to the AND circuit 42, and the address counter 26 is incremented by the clock φ.
The stored information is read out sequentially starting from the first address. That is, first, the uk information "uk1" at the first address shown in FIG. . Subsequent note length information "LENGTH1" is stored in the latch circuit 28 in response to the mark detection signal from the note length mark detection circuit 30.

When the note length mark detection signal is generated from the note length mark detection circuit 30, the note length information is latched and stored as described above, and the note length counter 38 is reset and initialized. is reset, the address counter 26 stops incrementing with the uk information and note length information corresponding to one note being read out, and the next reading from the storage device 11 is stopped.

In this way, after the first uk information is read out, when the time corresponding to the note length information has elapsed, the count value of the note length counter 38 is changed to the latch circuit 28.
The comparison circuit 37 generates an equal signal EQ, and the flip-flop circuit 41
is set to provide a gate signal to the AND circuit 42. Then address counter 2 again
6 with the clock φ, reads out the next stored information "uk2" and "LENGTH2" from the storage device 11,
The latch circuits 27 and 28 carry out latch storage. Thereafter, stored information is read out from the storage device 11 in the same manner, but in this case, if the uk information is a rest, the latch circuit 27 is activated as described above.
Since all 0s are latched and stored for a time corresponding to the note length information, the result is a pause (non-sounding) state.

That is, a large number of data stored in the storage device 11
The uk information is sequentially read out at time intervals according to the corresponding note length information, and the musical notes written on the musical score 12 are read out and expressed as performance information. Further, in synchronization with the reading of the performance information from the storage device 11, a rhythm sound source signal is generated from the automatic rhythm generator 25, and is expressed as a rhythm performance sound from the speaker 20. Therefore, if the musical notes written on the musical score 12 are performed on the keyboard 17 in accordance with this automatic rhythm performance sound, the performance information from the keyboard 17 and the latch circuit 27 that constitutes the data latch circuit 16 will be transmitted. uk
The information (pitch information or rest information) matches, and a correct key press signal can be obtained from the correct key press judgment circuit 21.

FIG. 4 shows the correct key press determination means and related parts in more detail, and shows the storage device 1.
The key-on signal AΔ2 and the key-off signal AΔ1 obtained in response to the read information from 1 are transmitted to the first and second population counters 23a and 2, respectively.
3b as a count signal. The first parameter counter 23a counts the uk information read from the storage device 11, excluding rest marks, as the performance information is read out, and generates the first parameter information "BoSu1". and the second population counter 23b
The second parameter information "BoSu2" is generated by counting the number of musical notes including pauses. The parameter counters 23a and 23b are reset and initialized by the signal STRT generated together with the start command.

Furthermore, performance information accompanying key operations from the keyboard 17 is supplied to the input terminal A of the comparison circuit 47, and
The signal is supplied to the input terminal B of the comparator circuit 47 via a delay circuit 48 driven by the clock TCL. When the performance information supplied to the input terminals A and B become different (A≠B), that is, when the previously pressed key on the keyboard 17 is released, or when a new key is released from the comparison circuit 47, An output signal is generated when a key is operated and the performance information changes, and the output signal from the comparison circuit 47 is used as the signal MΔ1 and is also supplied to the AND circuit 49. That is, this signal MΔ1 becomes a signal on the keyboard 17 side corresponding to the key-off signal AΔ1 corresponding to the read signal from the storage device 11. Further, the presence of performance information from the keyboard 17 (key being pressed) is detected by an OR circuit 50, and the signal from this OR circuit 50 is supplied to the AND circuit 49 together with the output of the comparison circuit 47. Then, the AND circuit 49 generates a sound generation start timing signal MΔ2 serving as sound generation start timing information on the keyboard 17 side corresponding to the key-on signal AΔ2.

Here, if the performance information stored in the storage device 11 is in the state of quarter notes, quarter notes, quarter rests, etc., as shown in FIG. 5, for example, it corresponds to the clock signal TCL. The signal AΔ1 is generated corresponding to each note and rest as shown in the figure, and the signal AΔ1 is generated corresponding to each note and rest as shown in the figure.
AΔ2 is generated in correspondence with the start timing of sounding each note corresponding to a key operation, excluding rests. If a correct key operation is performed on the keyboard 17 in accordance with the above note, signals MΔ1 and MΔ2 are generated in synchronization with signals AΔ1 and AΔ2, respectively, as shown in FIG. .

The signals AΔ2 and MΔ2 are supplied to delay circuits 51 and 52 driven by the clock TCL, respectively, and OR circuits 53 and 54 detect the signals on the input and output sides of the delay circuits 51 and 52, respectively. That is, output signals are generated from the OR circuits 53 and 54 while the signals AΔ2 and MΔ2 are present, and for a period corresponding to the clock TCL after falling, and this output signal is sent to the AND circuit 55. supply Therefore, when a key is operated on the keyboard 17 in synchronization with the sound generation start timing corresponding to the reading of information corresponding to a note from the storage device 11, the AND circuit 55 outputs a coincidence signal of the key operation timing. The output signal from the AND circuit 55 is
It is counted by a counter 56. This counter 56 is reset by the signal STRT and is initially set, and it adds up the number of key operations that coincide with the sound generation start timing of the performance information read out from the storage device 11, that is, the number of correct answers to the sound generation start timing. Start counting.

The pitch information latched in the latch circuit 27, which corresponds to the information read from the storage device 11, is supplied to the comparison circuit 57 together with the performance information generated in response to key operations on the keyboard 17, where they are compared. That is, when the correct key corresponding to the pitch information is operated, the comparison circuit 57 generates a coincidence signal EQ, and this coincidence signal is given as a set command to the flip-flop circuit 59 via the delay circuit 58. It will be done. This flip-flop circuit 59
is reset by the signal AΔ1 before the comparison output is generated from the delay circuit 58, and the set is inverted every time the correct key is operated. The set inversion state of this flip-flop circuit 59 is detected by a differentiating circuit 60, and a signal
It is counted by the counter 61 which is reset by STRT. Further, the output signal from the flip-flop circuit 59 is passed through a delay circuit 62 to a latch circuit 63.
, and is latched with the next generated signal AΔ1.

Signals AΔ1 and AΔ2 are supplied to a 3-bit shift register 64 and a 4-bit shift register 65, respectively. This shift register 6
4 and 65 are both driven by the clock TCL, and the shift register 65 takes out the output signal from the first bit and sends it to the flip-flop circuit 66.
is set, the output of the 4th bit is taken out via the OR circuit 67, and the output of the 4th bit is taken out through the flip-flop circuit 66.
It is set to reset. That is, the flip-flop circuit 66 receives the clock TCL1 from the rising edge of the signal AΔ2, as shown by F1 in FIG.
It is set with a delay of 3 clocks TCL, and is reset after 3 clocks TCL. Further, the signal AΔ1 on the input side of the shift register 64 sets a flip-flop circuit 68, and this flip-flop circuit 68 is reset by the output signal of an OR circuit 69 which detects the signal at the output end of the shift register 64. That is, this flip-flop circuit 6
8 is set and reset controlled as shown by F2 in FIG. 5 with respect to the signal AΔ1. A signal STRT is supplied to each of the OR circuits 67 and 69,
The flip-flop circuits 66 and 68 are reset to their initial states.

Signals generated in response to key operations on the keyboard 17
MΔ1 and MΔ2 are the differentiating circuit 70,
After being differentiated by 71, it is supplied to 8-bit and 10-bit shift registers 72 and 73. The shift registers 72 and 73 are driven by the clock 4TCL, which has a frequency four times that of the clock TCL.
The signal MΔ1, as shown by KOFF and KON in the figure,
From MΔ2 clock TCL8/4 clock, 1
The output signal is taken out with a delay of 0/8 clock. Then, the output signal KON from the shift register 73
is supplied to the AND circuit 74 together with the set output signal F1 from the flip-flop circuit 66,
The flip-flop circuit 75 is set by the output signal shown by AND in FIG. 5 from the AND circuit 74. This flip-flop circuit 7
5 is supplied with the signal STRT and the signal KOFF
It is reset by an OR circuit 77 supplied with the output signal from the 4TCL delay circuit 76, and the output signal of this flip-flop circuit 75 when set is as shown by F3 in FIG.

Then, the output signal F3 from the flip-flop circuit 75, the output signal F2 from the flip-flop circuit 68, and the output signal KOFF from the shift register 72 are supplied to an AND circuit 78, which is shown by LR in FIG. Generate an output signal.

In other words, the AND circuit 74 determines the key press timing (signal AΔ2) corresponding to reading of stored information.
and the timing of key presses on the keyboard 17 (signal
MΔ2) and if they match, the flip-flop circuit 75 is set. Also, the AND circuit 78
Now, with the timing of the above key press matching, the key release timing (signal AΔ1) of the stored information and the keyboard 17
The signal LR is generated when the note length of the stored information matches the note length of the key press operation on the keyboard 17. This comparison allowable range of note lengths can be set as appropriate using shift registers 64, 65, 72, and 73.

The output signal from the AND circuit 78 is supplied to the counter 79 as a counting signal, and together with the information stored in the latch circuit 63, the AND circuit 8
0, and the counter 81 counts with the output signal of the AND circuit 80. This counter 79, 81
is reset and initialized by the signal SSTRT.

That is, the pitch information read out sequentially from the storage device 11 in accordance with the note length timing and the keyboard 17
The counter 56 counts when the key operation timing matches the key operation timing, and the counter 61 counts when the pitch information and the operated key pitch match, and is further expressed by the key operation duration period. When the note length matches the memorized note length, the counter 79 counts. Therefore, count value information A1 to A3 of the counters 56, 61, and 79 are supplied to arithmetic circuits 82, 83, and 84, respectively, and each is divided by the population information from the population counter 23a or 23b as a denominator. As a result, correctly pressed key determination information such as timing accuracy rate, pitch accuracy rate, and note length accuracy rate can be obtained. This correctly pressed key judgment information is
The percentages are calculated and displayed as appropriate on display devices 85, 86, and 87, respectively.

Note that the arithmetic circuits 82 and 84 that determine the accuracy rate of timing and note length use "BoSu1" that corresponds to a note as parameter information, and the arithmetic circuit 83 that determines the pitch uses "BoSu2" that also includes a rest. Use as a number.

The count value information of the counter 81 is calculated by dividing the count value information of the counter 81 using "BoSu1" as the denominator in the arithmetic circuit 88.
At step 9, the state of one note correct is displayed as a percentage.

In addition, count value information of counters 56, 61, 79
A1, A2, A3 are added in an adder circuit 90,
The addition information is calculated in the calculation circuit 91.
This arithmetic circuit 91 performs a division operation using the information from the adder circuit 92 as a denominator.The adder circuit 92 is supplied with information "BoSu1" and "BoSu2" from the parameter counters 23a and 23b, and "BoSu
1×2+BoSu2” calculation is performed. Then, the partial average correct answer rate is calculated and displayed as a percentage on the display device 93.

That is, in the case of the electronic musical instrument configured as described above, after performance information of a predetermined song is stored and set in the storage device 11, performance operations are performed on the keyboard 17 corresponding to the score of the performance song. It is something to do. When starting a performance on the keyboard 17, the start switch 43 is operated to cause the automatic rhythm generation circuit 25 to generate an automatic rhythm performance sound as appropriate, and the performance operation is performed in accordance with the rhythm.

In this case, when the start switch 43 is turned on, pitch information is read out from the storage device 11 in accordance with the stored score information as described above, and this pitch information is read out for each condition of timing, pitch, and note length. , and the state of key presses on the keyboard 17, and accurate key presses are monitored and counted.

In other words, the number of correct keys pressed is counted as the performance progresses, and calculated at each point in time according to the number of keys pressed up to that point, and the correct answer rate is calculated and displayed. The self-study content will be automatically displayed. Therefore, the player can clearly know the content and accuracy of his or her own performance without being specifically pointed out by the teacher, and the effect of self-study is effectively improved.

In the embodiment, the result of determining the correct key press is shown as a percentage of the performance progress up to that point; however, if the arithmetic circuits 82 to 84 and 88 are configured as subtraction circuits, it is possible to calculate the number of errors or correct answers. This allows for concrete calculations and display, and by setting the parameters "BoSu1" and "BoSu2" to the final values in advance, the correct answer rate results can be obtained at the end of the performance. It is what it is. In addition, this correct answer judgment display can be arbitrarily selected.

〔Effect of the invention〕

As described above, according to the present invention, the performance state on the keyboard is monitored while comparing with pre-stored performance data, the performance on the keyboard is judged, and a score is displayed as the performance practice progresses. In particular, it is possible to carry out self-study of performance practice on keyboard instruments effectively,
It is also possible to receive objective guidance while effectively making one's own judgment.

[Brief explanation of drawings]

FIG. 1 is a diagram schematically showing an electronic musical instrument according to an embodiment of the present invention, FIG. 2 is a configuration diagram showing a storage information control section of the electronic musical instrument, and FIG. 3 is a memory used in the electronic musical instrument. FIG. 4 is a diagram illustrating the format of the information, FIG. 4 is a configuration diagram illustrating means for determining whether a key has been pressed correctly on the keyboard, and FIG. 5 is a signal waveform diagram illustrating the above determination operation. 11...Storage device, 16...Data latch circuit, 17...Keyboard, 18...Tone forming circuit, 21
...Correct key press judgment circuit, 22...Scoring circuit, 23...
. . . Population counter, 24 . . . Display device, 25 . . . Automatic rhythm generation circuit.

Claims (1)

[Scope of Claims] 1. A storage device that stores performance information including pitch information and note length information that designate performance operation keys; and a storage device that stores performance information including pitch information and note length information that designate performance operation keys; means for controlling readout according to the playing order at intervals; means for generating sound generation start timing information along with pitch information in response to reading of the performance information; a keyboard for performing performance operations; and a means for controlling key operations from this keyboard. a correctly pressed key determining circuit that sequentially compares performance information consisting of pitch information and sound generation start timing information generated accordingly with performance information read from the storage device; and a counter that counts the results determined by this determining circuit. circuit, and a display means for displaying a scoring result corresponding to the count value of the counting circuit, and the correctly pressed key determination circuit receives sound generation start timing information of the performance information read from the storage device, and a display means for displaying a scoring result corresponding to the counted value of the counting circuit. and a comparison circuit to which pitch information of the performance information from the storage device and pitch information of the performance information from the keyboard are supplied, As the performance progresses on the keyboard, the scoring results obtained based on the performance information read from the storage device and the comparison results of the sound generation start timing information and pitch information of the performance information obtained by key operations on the keyboard are An electronic musical instrument characterized in that it is displayed by the display means described above.