JPH0353657B2 - - Google Patents

Info

Publication number
JPH0353657B2
JPH0353657B2 JP57000648A JP64882A JPH0353657B2 JP H0353657 B2 JPH0353657 B2 JP H0353657B2 JP 57000648 A JP57000648 A JP 57000648A JP 64882 A JP64882 A JP 64882A JP H0353657 B2 JPH0353657 B2 JP H0353657B2
Authority
JP
Japan
Prior art keywords
cache
memory
data
signal
central processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57000648A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57169990A (en
Inventor
Eichi Changu Horeisu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wang Laboratories Inc
Original Assignee
Wang Laboratories Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wang Laboratories Inc filed Critical Wang Laboratories Inc
Publication of JPS57169990A publication Critical patent/JPS57169990A/ja
Publication of JPH0353657B2 publication Critical patent/JPH0353657B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0855—Overlapped cache accessing, e.g. pipeline
    • G06F12/0857—Overlapped cache accessing, e.g. pipeline by multiple requestors

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
JP57000648A 1981-01-07 1982-01-07 Processor for data Granted JPS57169990A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US22315481A 1981-01-07 1981-01-07

Publications (2)

Publication Number Publication Date
JPS57169990A JPS57169990A (en) 1982-10-19
JPH0353657B2 true JPH0353657B2 (cs) 1991-08-15

Family

ID=22835271

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57000648A Granted JPS57169990A (en) 1981-01-07 1982-01-07 Processor for data

Country Status (10)

Country Link
JP (1) JPS57169990A (cs)
BE (1) BE891723A (cs)
CA (1) CA1175581A (cs)
CH (1) CH656470A5 (cs)
DE (1) DE3200042A1 (cs)
FR (1) FR2497596B1 (cs)
GB (1) GB2090681B (cs)
IT (1) IT1154407B (cs)
NL (1) NL8200043A (cs)
SE (1) SE445270B (cs)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010095554A1 (ja) 2009-02-20 2010-08-26 旭硝子株式会社 エレクトレットの製造方法及び静電誘導型変換素子

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS617967A (ja) * 1984-06-15 1986-01-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Ｉ／ｏコントロ−ラ
AU5634086A (en) * 1985-05-06 1986-11-13 Wang Laboratories, Inc. Information processing system with enhanced instruction execution and support control
US4814981A (en) * 1986-09-18 1989-03-21 Digital Equipment Corporation Cache invalidate protocol for digital data processing system
DE3920883A1 (de) * 1989-06-26 1991-01-03 Siemens Ag Verfahren und anordnung zur erhoehung der verarbeitungsgeschwindigkeit der zentraleinheit einer datenverarbeitungsanlage
JPH03189845A (ja) * 1989-12-13 1991-08-19 Internatl Business Mach Corp <Ibm> 階層メモリ・システムおよびキヤツシユ・メモリ・サブシステム
JPH0756815A (ja) * 1993-07-28 1995-03-03 Internatl Business Mach Corp <Ibm> キャッシュ動作方法及びキャッシュ

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3588829A (en) * 1968-11-14 1971-06-28 Ibm Integrated memory system with block transfer to a buffer store
JPS51148334A (en) * 1975-06-16 1976-12-20 Hitachi Ltd Buffer memory control method
JPS5441291A (en) * 1977-09-09 1979-04-02 Sagami Chem Res Center Cluster fixed substance, production thereof and catalyst
US4169284A (en) * 1978-03-07 1979-09-25 International Business Machines Corporation Cache control for concurrent access
US4208716A (en) * 1978-12-11 1980-06-17 Honeywell Information Systems Inc. Cache arrangement for performing simultaneous read/write operations
GB2037039B (en) * 1978-12-11 1983-08-17 Honeywell Inf Systems Cache memory system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010095554A1 (ja) 2009-02-20 2010-08-26 旭硝子株式会社 エレクトレットの製造方法及び静電誘導型変換素子

Also Published As

Publication number Publication date
DE3200042C2 (cs) 1991-03-07
GB2090681B (en) 1985-11-20
GB2090681A (en) 1982-07-14
CA1175581A (en) 1984-10-02
JPS57169990A (en) 1982-10-19
DE3200042A1 (de) 1982-08-19
IT8267010A0 (it) 1982-01-06
SE8107832L (sv) 1982-07-08
FR2497596A1 (fr) 1982-07-09
FR2497596B1 (fr) 1989-03-03
IT1154407B (it) 1987-01-21
BE891723A (fr) 1982-04-30
SE445270B (sv) 1986-06-09
NL8200043A (nl) 1982-08-02
CH656470A5 (de) 1986-06-30

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